From 2665fded52079d13c59326b0c6c26206cf46abf1 Mon Sep 17 00:00:00 2001 From: Dmytro Laktyushkin Date: Wed, 3 Jun 2020 13:33:46 -0400 Subject: [PATCH] drm/amd/display: fix 4to1 odm MPC_OUT_FLOW_CONTROL_COUNT Signed-off-by: Dmytro Laktyushkin Reviewed-by: Chris Park Acked-by: Rodrigo Siqueira Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c index 789e33f..5621c95 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c @@ -618,7 +618,7 @@ static int calc_mpc_flow_ctrl_cnt(const struct dc_stream_state *stream, bool hblank_halved = optc2_is_two_pixels_per_containter(&stream->timing); int flow_ctrl_cnt; - if (opp_cnt == 2) + if (opp_cnt >= 2) hblank_halved = true; flow_ctrl_cnt = stream->timing.h_total - stream->timing.h_addressable - -- 2.7.4