From 261a8c502f4b8369cb6fae44cba1440ece91e155 Mon Sep 17 00:00:00 2001 From: Joonyoung Shim Date: Tue, 24 May 2016 11:57:22 +0900 Subject: [PATCH] ARM: dts: exynos4x12: fix g3d nodes This fixes order of reg resources. First has to be resource that has lowest address because mali400 r5p2 version requires it. This also adds interrupt-names for g3d nodes. The interrupt-names needs at mali400 r5p2 version. Signed-off-by: Joonyoung Shim --- arch/arm/boot/dts/exynos4x12.dtsi | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index cf697fc..185faa05 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -401,15 +401,18 @@ gpu@13000000 { compatible = "samsung,exynos4x12-g3d"; - reg = <0x13001000 0x200>, - <0x13000000 0x100>, <0x13003000 0x100>, + reg = <0x13000000 0x100>, <0x13003000 0x100>, <0x13008000 0x1100>, <0x13004000 0x100>, <0x1300a000 0x1100>, <0x13005000 0x100>, <0x1300c000 0x1100>, <0x13006000 0x100>, - <0x1300e000 0x1100>, <0x13007000 0x100>; + <0x1300e000 0x1100>, <0x13007000 0x100>, + <0x13001000 0x200>; interrupts = <0 127 0>, <0 122 0>, <0 123 0>, <0 118 0>, <0 124 0>, <0 119 0>, <0 125 0>, <0 120 0>, <0 126 0>, <0 121 0>; + interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", + "IRQPP1", "IRQPPMMU1", "IRQPP2", "IRQPPMMU2", + "IRQPP3", "IRQPPMMU3"; clock-names = "pll", "mux1", "mux2", "sclk", "g3d"; clocks = <&clock 11>, <&clock 393>, <&clock 394>, <&clock 172>, <&clock 276>; -- 2.7.4