From 25f11ed965bb57b6e25d5464a8cd8b3657319056 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Tue, 26 May 2015 15:29:24 +0200 Subject: [PATCH] greybus: gpio: fix atomic sleep when using interrupts The irq-chip callbacks are made in atomic context where we must not do any synchronous greybus operations. Fix the current gpio-interrupt implementation by using the bus-lock functionality provided by the irq subsystem. Signed-off-by: Johan Hovold Signed-off-by: Greg Kroah-Hartman --- drivers/staging/greybus/gpio.c | 115 ++++++++++++++++++++++++++++++++--------- 1 file changed, 90 insertions(+), 25 deletions(-) diff --git a/drivers/staging/greybus/gpio.c b/drivers/staging/greybus/gpio.c index 0220a9f..6cf3bb1 100644 --- a/drivers/staging/greybus/gpio.c +++ b/drivers/staging/greybus/gpio.c @@ -13,6 +13,8 @@ #include #include #include +#include + #include "greybus.h" struct gb_gpio_line { @@ -22,6 +24,11 @@ struct gb_gpio_line { direction: 1, /* 0 = output, 1 = input */ value: 1; /* 0 = low, 1 = high */ u16 debounce_usec; + + u8 irq_type; + bool irq_type_pending; + bool masked; + bool masked_pending; }; struct gb_gpio_controller { @@ -38,6 +45,7 @@ struct gb_gpio_controller { unsigned int irq_base; irq_flow_handler_t irq_handler; unsigned int irq_default_type; + struct mutex irq_lock; }; #define gpio_chip_to_gb_gpio_controller(chip) \ container_of(chip, struct gb_gpio_controller, chip) @@ -211,68 +219,121 @@ static int gb_gpio_set_debounce_operation(struct gb_gpio_controller *ggc, return ret; } -static void gb_gpio_irq_mask(struct irq_data *d) +static void _gb_gpio_irq_mask(struct gb_gpio_controller *ggc, u8 hwirq) { - struct gpio_chip *chip = irq_data_to_gpio_chip(d); - struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip); struct gb_gpio_irq_mask_request request; int ret; - request.which = d->hwirq; + request.which = hwirq; ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_IRQ_MASK, &request, sizeof(request), NULL, 0); if (ret) - dev_err(chip->dev, "failed to mask irq: %d\n", ret); + dev_err(ggc->chip.dev, "failed to mask irq: %d\n", ret); } -static void gb_gpio_irq_unmask(struct irq_data *d) +static void _gb_gpio_irq_unmask(struct gb_gpio_controller *ggc, u8 hwirq) { - struct gpio_chip *chip = irq_data_to_gpio_chip(d); - struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip); struct gb_gpio_irq_unmask_request request; int ret; - request.which = d->hwirq; + request.which = hwirq; ret = gb_operation_sync(ggc->connection, GB_GPIO_TYPE_IRQ_UNMASK, &request, sizeof(request), NULL, 0); if (ret) - dev_err(chip->dev, "failed to unmask irq: %d\n", ret); + dev_err(ggc->chip.dev, "failed to unmask irq: %d\n", ret); } -static int gb_gpio_irq_set_type(struct irq_data *d, unsigned int type) +static void _gb_gpio_irq_set_type(struct gb_gpio_controller *ggc, + u8 hwirq, u8 type) { - struct gpio_chip *chip = irq_data_to_gpio_chip(d); - struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip); struct gb_gpio_irq_type_request request; - int ret = 0; + int ret; - request.which = d->hwirq; + request.which = hwirq; request.type = type; + ret = gb_operation_sync(ggc->connection, + GB_GPIO_TYPE_IRQ_TYPE, + &request, sizeof(request), NULL, 0); + if (ret) + dev_err(ggc->chip.dev, "failed to set irq type: %d\n", ret); +} + +static void gb_gpio_irq_mask(struct irq_data *d) +{ + struct gpio_chip *chip = irq_data_to_gpio_chip(d); + struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip); + struct gb_gpio_line *line = &ggc->lines[d->hwirq]; + + line->masked = true; + line->masked_pending = true; +} + +static void gb_gpio_irq_unmask(struct irq_data *d) +{ + struct gpio_chip *chip = irq_data_to_gpio_chip(d); + struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip); + struct gb_gpio_line *line = &ggc->lines[d->hwirq]; + + line->masked = false; + line->masked_pending = true; +} + +static int gb_gpio_irq_set_type(struct irq_data *d, unsigned int type) +{ + struct gpio_chip *chip = irq_data_to_gpio_chip(d); + struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip); + struct gb_gpio_line *line = &ggc->lines[d->hwirq]; + switch (type) { case IRQ_TYPE_NONE: - break; case IRQ_TYPE_EDGE_RISING: case IRQ_TYPE_EDGE_FALLING: case IRQ_TYPE_EDGE_BOTH: case IRQ_TYPE_LEVEL_LOW: case IRQ_TYPE_LEVEL_HIGH: - ret = gb_operation_sync(ggc->connection, - GB_GPIO_TYPE_IRQ_TYPE, - &request, sizeof(request), NULL, 0); - if (ret) { - dev_err(chip->dev, "failed to set irq type: %d\n", - ret); - } break; default: dev_err(chip->dev, "unsupported irq type: %u\n", type); - ret = -EINVAL; + return -EINVAL; } - return ret; + line->irq_type = type; + line->irq_type_pending = true; + + return 0; +} + +static void gb_gpio_irq_bus_lock(struct irq_data *d) +{ + struct gpio_chip *chip = irq_data_to_gpio_chip(d); + struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip); + + mutex_lock(&ggc->irq_lock); +} + +static void gb_gpio_irq_bus_sync_unlock(struct irq_data *d) +{ + struct gpio_chip *chip = irq_data_to_gpio_chip(d); + struct gb_gpio_controller *ggc = gpio_chip_to_gb_gpio_controller(chip); + struct gb_gpio_line *line = &ggc->lines[d->hwirq]; + + if (line->irq_type_pending) { + _gb_gpio_irq_set_type(ggc, d->hwirq, line->irq_type); + line->irq_type_pending = false; + } + + if (line->masked_pending) { + if (line->masked) + _gb_gpio_irq_mask(ggc, d->hwirq); + else + _gb_gpio_irq_unmask(ggc, d->hwirq); + line->masked_pending = false; + } + + mutex_unlock(&ggc->irq_lock); } static int gb_gpio_request_recv(u8 type, struct gb_operation *op) @@ -578,8 +639,12 @@ static int gb_gpio_connection_init(struct gb_connection *connection) irqc->irq_mask = gb_gpio_irq_mask; irqc->irq_unmask = gb_gpio_irq_unmask; irqc->irq_set_type = gb_gpio_irq_set_type; + irqc->irq_bus_lock = gb_gpio_irq_bus_lock; + irqc->irq_bus_sync_unlock = gb_gpio_irq_bus_sync_unlock; irqc->name = "greybus_gpio"; + mutex_init(&ggc->irq_lock); + gpio = &ggc->chip; gpio->label = "greybus_gpio"; -- 2.7.4