From 25c338ccb6e2acac8ed782ad229974c464126216 Mon Sep 17 00:00:00 2001 From: Nikita Popov Date: Tue, 3 Jan 2023 14:35:10 +0100 Subject: [PATCH] [LSR] Convert test to check IR (NFC) Convert this llc -O3 test to instead check the IR after -loop-reduce. --- .../LoopStrengthReduce/X86/2012-01-13-phielim.ll | 191 +++++++++++---------- 1 file changed, 97 insertions(+), 94 deletions(-) diff --git a/llvm/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll b/llvm/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll index 7944b52..cb6fe1f 100644 --- a/llvm/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll +++ b/llvm/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll @@ -1,61 +1,43 @@ -; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -O3 -mtriple=x86_64-- -mcpu=core2 | FileCheck %s +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -S -loop-reduce -mtriple=x86_64-- -mcpu=core2 | FileCheck %s declare i1 @check() nounwind declare i1 @foo(i8*, i8*, i8*) nounwind ; Check that redundant phi elimination ran define i32 @test(i8* %base) nounwind uwtable ssp { -; CHECK-LABEL: test: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: pushq %r15 -; CHECK-NEXT: .cfi_def_cfa_offset 16 -; CHECK-NEXT: pushq %r14 -; CHECK-NEXT: .cfi_def_cfa_offset 24 -; CHECK-NEXT: pushq %r13 -; CHECK-NEXT: .cfi_def_cfa_offset 32 -; CHECK-NEXT: pushq %r12 -; CHECK-NEXT: .cfi_def_cfa_offset 40 -; CHECK-NEXT: pushq %rbx -; CHECK-NEXT: .cfi_def_cfa_offset 48 -; CHECK-NEXT: .cfi_offset %rbx, -48 -; CHECK-NEXT: .cfi_offset %r12, -40 -; CHECK-NEXT: .cfi_offset %r13, -32 -; CHECK-NEXT: .cfi_offset %r14, -24 -; CHECK-NEXT: .cfi_offset %r15, -16 -; CHECK-NEXT: movq %rdi, %rbx -; CHECK-NEXT: leaq 16(%rdi), %r15 -; CHECK-NEXT: movl $16, %eax -; CHECK-NEXT: xorl %r12d, %r12d -; CHECK-NEXT: .p2align 4, 0x90 -; CHECK-NEXT: .LBB0_1: # %while.body.i -; CHECK-NEXT: # =>This Loop Header: Depth=1 -; CHECK-NEXT: # Child Loop BB0_2 Depth 2 -; CHECK-NEXT: movslq %r12d, %r14 -; CHECK-NEXT: movq %rax, %r12 -; CHECK-NEXT: leaq (%r15,%r14), %r13 -; CHECK-NEXT: addq $16, %r14 -; CHECK-NEXT: .p2align 4, 0x90 -; CHECK-NEXT: .LBB0_2: # %for.body.i -; CHECK-NEXT: # Parent Loop BB0_1 Depth=1 -; CHECK-NEXT: # => This Inner Loop Header: Depth=2 -; CHECK-NEXT: callq check@PLT -; CHECK-NEXT: incq %r13 -; CHECK-NEXT: testb $1, %al -; CHECK-NEXT: je .LBB0_2 -; CHECK-NEXT: # %bb.3: # %for.end.i -; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1 -; CHECK-NEXT: addq %rbx, %r14 -; CHECK-NEXT: movq %r14, %rdi -; CHECK-NEXT: movq %r14, %rsi -; CHECK-NEXT: callq foo@PLT -; CHECK-NEXT: testb $1, %al -; CHECK-NEXT: je .LBB0_5 -; CHECK-NEXT: # %bb.4: # %cond.true29.i -; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1 -; CHECK-NEXT: leaq 16(%r12), %rax -; CHECK-NEXT: jmp .LBB0_1 -; CHECK-NEXT: .LBB0_5: # %cond.false35.i +; CHECK-LABEL: @test( +; CHECK-NEXT: entry: +; CHECK-NEXT: br label [[WHILE_BODY_LR_PH_I:%.*]] +; CHECK: while.body.lr.ph.i: +; CHECK-NEXT: br label [[WHILE_BODY_I:%.*]] +; CHECK: while.body.i: +; CHECK-NEXT: [[INDVARS_IV7_I:%.*]] = phi i64 [ 16, [[WHILE_BODY_LR_PH_I]] ], [ [[INDVARS_IV_NEXT8_I:%.*]], [[COND_TRUE29_I:%.*]] ] +; CHECK-NEXT: [[I_05_I:%.*]] = phi i64 [ 0, [[WHILE_BODY_LR_PH_I]] ], [ [[INDVARS_IV7_I]], [[COND_TRUE29_I]] ] +; CHECK-NEXT: [[SEXT_I:%.*]] = shl i64 [[I_05_I]], 32 +; CHECK-NEXT: [[IDX_EXT_I:%.*]] = ashr exact i64 [[SEXT_I]], 32 +; CHECK-NEXT: [[ADD_PTR_SUM_I:%.*]] = add i64 [[IDX_EXT_I]], 16 +; CHECK-NEXT: br label [[FOR_BODY_I:%.*]] +; CHECK: for.body.i: +; CHECK-NEXT: [[INDVARS_IV_I:%.*]] = phi i64 [ 0, [[WHILE_BODY_I]] ], [ [[INDVARS_IV_NEXT_I:%.*]], [[FOR_BODY_I]] ] +; CHECK-NEXT: [[ADD_PTR_SUM:%.*]] = add i64 [[ADD_PTR_SUM_I]], [[INDVARS_IV_I]] +; CHECK-NEXT: [[ARRAYIDX22_I:%.*]] = getelementptr inbounds i8, i8* [[BASE:%.*]], i64 [[ADD_PTR_SUM]] +; CHECK-NEXT: [[TMP0:%.*]] = load i8, i8* [[ARRAYIDX22_I]], align 1 +; CHECK-NEXT: [[INDVARS_IV_NEXT_I]] = add i64 [[INDVARS_IV_I]], 1 +; CHECK-NEXT: [[CMP:%.*]] = call i1 @check() #[[ATTR3:[0-9]+]] +; CHECK-NEXT: br i1 [[CMP]], label [[FOR_END_I:%.*]], label [[FOR_BODY_I]] +; CHECK: for.end.i: +; CHECK-NEXT: [[ADD_PTR_I144:%.*]] = getelementptr inbounds i8, i8* [[BASE]], i64 [[ADD_PTR_SUM_I]] +; CHECK-NEXT: [[CMP2:%.*]] = tail call i1 @foo(i8* [[ADD_PTR_I144]], i8* [[ADD_PTR_I144]], i8* undef) #[[ATTR3]] +; CHECK-NEXT: br i1 [[CMP2]], label [[COND_TRUE29_I]], label [[COND_FALSE35_I:%.*]] +; CHECK: cond.true29.i: +; CHECK-NEXT: [[INDVARS_IV_NEXT8_I]] = add i64 [[INDVARS_IV7_I]], 16 +; CHECK-NEXT: br i1 false, label [[EXIT:%.*]], label [[WHILE_BODY_I]] +; CHECK: cond.false35.i: +; CHECK-NEXT: unreachable +; CHECK: exit: +; CHECK-NEXT: ret i32 0 +; entry: br label %while.body.lr.ph.i @@ -105,19 +87,30 @@ exit: ; preds = %cond.true29.i, %cond.true.i ; interesting GEP. ; define void @test2(i32 %n) nounwind uwtable { -; CHECK-LABEL: test2: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: testb %al, %al -; CHECK-NEXT: je .LBB1_1 -; CHECK-NEXT: # %bb.3: # %while.end -; CHECK-NEXT: retq -; CHECK-NEXT: .LBB1_1: # %for.cond468.preheader -; CHECK-NEXT: cmpl $2, %edi -; CHECK-NEXT: .p2align 4, 0x90 -; CHECK-NEXT: .LBB1_2: # %for.inc498 -; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 -; CHECK-NEXT: jmp .LBB1_2 +; CHECK-LABEL: @test2( +; CHECK-NEXT: entry: +; CHECK-NEXT: br i1 undef, label [[WHILE_END:%.*]], label [[FOR_COND468_PREHEADER:%.*]] +; CHECK: for.cond468.preheader: +; CHECK-NEXT: br label [[FOR_COND468:%.*]] +; CHECK: for.cond468: +; CHECK-NEXT: [[INDVARS_IV1163:%.*]] = phi i64 [ [[INDVARS_IV_NEXT1164:%.*]], [[IF_THEN477:%.*]] ], [ 1, [[FOR_COND468_PREHEADER]] ] +; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[INDVARS_IV1163]] to i32 +; CHECK-NEXT: [[CMP469:%.*]] = icmp slt i32 [[TMP0]], [[N:%.*]] +; CHECK-NEXT: br i1 [[CMP469]], label [[FOR_BODY471:%.*]], label [[FOR_INC498_PREHEADER:%.*]] +; CHECK: for.body471: +; CHECK-NEXT: [[FIRST:%.*]] = getelementptr inbounds [5000 x %struct.anon.7.91.199.307.415.475.559.643.751.835.943.1003.1111.1219.1351.1375.1399.1435.1471.1483.1519.1531.1651.1771], [5000 x %struct.anon.7.91.199.307.415.475.559.643.751.835.943.1003.1111.1219.1351.1375.1399.1435.1471.1483.1519.1531.1651.1771]* @tags, i64 0, i64 [[INDVARS_IV1163]], i32 1 +; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[FIRST]], align 4 +; CHECK-NEXT: br i1 false, label [[IF_THEN477]], label [[FOR_INC498_PREHEADER]] +; CHECK: for.inc498.preheader: +; CHECK-NEXT: br label [[FOR_INC498:%.*]] +; CHECK: if.then477: +; CHECK-NEXT: [[INDVARS_IV_NEXT1164]] = add i64 [[INDVARS_IV1163]], 1 +; CHECK-NEXT: br label [[FOR_COND468]] +; CHECK: for.inc498: +; CHECK-NEXT: br label [[FOR_INC498]] +; CHECK: while.end: +; CHECK-NEXT: ret void +; entry: br i1 undef, label %while.end, label %for.cond468 @@ -151,35 +144,45 @@ while.end: ; preds = %entry ; itself a phi. ; define fastcc void @test3(double* nocapture %u) nounwind uwtable ssp { -; CHECK-LABEL: test3: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: testb %al, %al -; CHECK-NEXT: jne .LBB2_6 -; CHECK-NEXT: # %bb.1: -; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: .p2align 4, 0x90 -; CHECK-NEXT: .LBB2_2: # %meshBB1 -; CHECK-NEXT: # =>This Loop Header: Depth=1 -; CHECK-NEXT: # Child Loop BB2_4 Depth 2 -; CHECK-NEXT: # implicit-def: $rcx -; CHECK-NEXT: testb %al, %al -; CHECK-NEXT: jne .LBB2_2 -; CHECK-NEXT: .p2align 4, 0x90 -; CHECK-NEXT: .LBB2_4: # %meshBB -; CHECK-NEXT: # Parent Loop BB2_2 Depth=1 -; CHECK-NEXT: # => This Inner Loop Header: Depth=2 -; CHECK-NEXT: incq %rcx -; CHECK-NEXT: testb %al, %al -; CHECK-NEXT: je .LBB2_4 -; CHECK-NEXT: jmp .LBB2_2 -; CHECK-NEXT: .LBB2_6: # %meshBB5 -; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: testb %al, %al -; CHECK-NEXT: je .LBB2_5 -; CHECK-NEXT: # %bb.7: # %eval_At_times_u.exit -; CHECK-NEXT: retq -; CHECK-NEXT: .LBB2_5: # %for.inc8.us.i2 +; CHECK-LABEL: @test3( +; CHECK-NEXT: entry: +; CHECK-NEXT: br i1 undef, label [[MESHBB1_PREHEADER:%.*]], label [[MESHBB5:%.*]] +; CHECK: meshBB1.preheader: +; CHECK-NEXT: br label [[MESHBB1:%.*]] +; CHECK: for.inc8.us.i: +; CHECK-NEXT: br i1 true, label [[MESHBB1_LOOPEXIT:%.*]], label [[MESHBB:%.*]] +; CHECK: for.body3.us.i: +; CHECK-NEXT: [[INDVARS_IV_I_SV_PHI:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_I:%.*]], [[MESHBB]] ], [ 0, [[FOR_BODY3_LR_PH_US_I:%.*]] ] +; CHECK-NEXT: [[OPQ_SA_CALC12:%.*]] = sub i32 undef, 227 +; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[INDVARS_IV_I_SV_PHI]], [[INDVARS_IV8_I_SV_PHI26:%.*]] +; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32 +; CHECK-NEXT: [[MUL_I_US_I:%.*]] = mul nsw i32 0, [[TMP1]] +; CHECK-NEXT: [[ARRAYIDX5_US_I:%.*]] = getelementptr inbounds double, double* [[U:%.*]], i64 [[INDVARS_IV_I_SV_PHI]] +; CHECK-NEXT: [[TMP2:%.*]] = load double, double* [[ARRAYIDX5_US_I]], align 8 +; CHECK-NEXT: [[INDVARS_IV_NEXT_I]] = add i64 [[INDVARS_IV_I_SV_PHI]], 1 +; CHECK-NEXT: br i1 undef, label [[FOR_INC8_US_I:%.*]], label [[MESHBB]] +; CHECK: for.body3.lr.ph.us.i.loopexit: +; CHECK-NEXT: br label [[FOR_BODY3_LR_PH_US_I]] +; CHECK: for.body3.lr.ph.us.i: +; CHECK-NEXT: [[INDVARS_IV8_I_SV_PHI26]] = phi i64 [ undef, [[MESHBB1]] ], [ [[INDVARS_IV8_I_SV_PHI24:%.*]], [[FOR_BODY3_LR_PH_US_I_LOOPEXIT:%.*]] ] +; CHECK-NEXT: [[ARRAYIDX_US_I:%.*]] = getelementptr inbounds double, double* undef, i64 [[INDVARS_IV8_I_SV_PHI26]] +; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[INDVARS_IV8_I_SV_PHI26]], 1 +; CHECK-NEXT: br label [[FOR_BODY3_US_I:%.*]] +; CHECK: for.inc8.us.i2: +; CHECK-NEXT: unreachable +; CHECK: eval_At_times_u.exit: +; CHECK-NEXT: ret void +; CHECK: meshBB: +; CHECK-NEXT: [[INDVARS_IV8_I_SV_PHI24]] = phi i64 [ undef, [[FOR_BODY3_US_I]] ], [ [[TMP3]], [[FOR_INC8_US_I]] ] +; CHECK-NEXT: [[MESHSTACKVARIABLE_PHI:%.*]] = phi i32 [ [[OPQ_SA_CALC12]], [[FOR_BODY3_US_I]] ], [ undef, [[FOR_INC8_US_I]] ] +; CHECK-NEXT: br i1 true, label [[FOR_BODY3_LR_PH_US_I_LOOPEXIT]], label [[FOR_BODY3_US_I]] +; CHECK: meshBB1.loopexit: +; CHECK-NEXT: br label [[MESHBB1]] +; CHECK: meshBB1: +; CHECK-NEXT: br label [[FOR_BODY3_LR_PH_US_I]] +; CHECK: meshBB5: +; CHECK-NEXT: br i1 undef, label [[EVAL_AT_TIMES_U_EXIT:%.*]], label [[FOR_INC8_US_I2:%.*]] +; entry: br i1 undef, label %meshBB1, label %meshBB5 -- 2.7.4