From 2510538fa000dd13a3e57b79bf073ffb1748976c Mon Sep 17 00:00:00 2001 From: Takashi Iwai Date: Tue, 21 Jan 2014 14:34:51 -0800 Subject: [PATCH] drm/cirrus: correct register values for 16bpp When the mode is set with 16bpp on QEMU, the output gets totally broken. The culprit is the bogus register values set for 16bpp, which was likely copied from from a wrong place. Addresses https://bugzilla.novell.com/show_bug.cgi?id=799216 Signed-off-by: Takashi Iwai Signed-off-by: Jiri Slaby Cc: David Airlie Cc: Signed-off-by: Andrew Morton Signed-off-by: Dave Airlie --- drivers/gpu/drm/cirrus/cirrus_mode.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/cirrus/cirrus_mode.c b/drivers/gpu/drm/cirrus/cirrus_mode.c index 58dd900..530f78f 100644 --- a/drivers/gpu/drm/cirrus/cirrus_mode.c +++ b/drivers/gpu/drm/cirrus/cirrus_mode.c @@ -273,8 +273,8 @@ static int cirrus_crtc_mode_set(struct drm_crtc *crtc, sr07 |= 0x11; break; case 16: - sr07 |= 0xc1; - hdr = 0xc0; + sr07 |= 0x17; + hdr = 0xc1; break; case 24: sr07 |= 0x15; -- 2.7.4