From 24e249ec014e06da6744409c607a3c05f5f9f596 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 13 Mar 2019 19:46:32 +0000 Subject: [PATCH] SystemZ: Add ImmArg to intrinsics I found these by asserting in clang for any GCCBuiltin that doesn't require mangling and requires a constant for the builtin. This means that intrinsics are missing which don't use GCCBuiltin, don't have builtins defined in clang, or were missing the constant annotation in the builtin definition. llvm-svn: 356091 --- llvm/include/llvm/IR/IntrinsicsSystemZ.td | 38 +++--- llvm/test/Verifier/SystemZ/intrinsic-immarg.ll | 166 +++++++++++++++++++++++++ llvm/test/Verifier/SystemZ/lit.local.cfg | 2 + 3 files changed, 189 insertions(+), 17 deletions(-) create mode 100644 llvm/test/Verifier/SystemZ/intrinsic-immarg.ll create mode 100644 llvm/test/Verifier/SystemZ/lit.local.cfg diff --git a/llvm/include/llvm/IR/IntrinsicsSystemZ.td b/llvm/include/llvm/IR/IntrinsicsSystemZ.td index 91e66dd..68ac285 100644 --- a/llvm/include/llvm/IR/IntrinsicsSystemZ.td +++ b/llvm/include/llvm/IR/IntrinsicsSystemZ.td @@ -38,7 +38,8 @@ class SystemZBinaryConvCC : Intrinsic<[result, llvm_i32_ty], [arg, arg], [IntrNoMem]>; class SystemZBinaryConvIntCC - : Intrinsic<[result, llvm_i32_ty], [arg, llvm_i32_ty], [IntrNoMem]>; + : Intrinsic<[result, llvm_i32_ty], [arg, llvm_i32_ty], + [IntrNoMem, ImmArg<1>]>; class SystemZBinaryCC : SystemZBinaryConvCC; @@ -52,18 +53,20 @@ class SystemZTernary class SystemZTernaryInt : GCCBuiltin<"__builtin_s390_" ## name>, - Intrinsic<[type], [type, type, llvm_i32_ty], [IntrNoMem]>; + Intrinsic<[type], [type, type, llvm_i32_ty], [IntrNoMem, ImmArg<2>]>; class SystemZTernaryIntCC - : Intrinsic<[type, llvm_i32_ty], [type, type, llvm_i32_ty], [IntrNoMem]>; + : Intrinsic<[type, llvm_i32_ty], [type, type, llvm_i32_ty], + [IntrNoMem, ImmArg<2>]>; class SystemZQuaternaryInt : GCCBuiltin<"__builtin_s390_" ## name>, - Intrinsic<[type], [type, type, type, llvm_i32_ty], [IntrNoMem]>; + Intrinsic<[type], [type, type, type, llvm_i32_ty], + [IntrNoMem, ImmArg<3>]>; class SystemZQuaternaryIntCC : Intrinsic<[type, llvm_i32_ty], [type, type, type, llvm_i32_ty], - [IntrNoMem]>; + [IntrNoMem, ImmArg<3>]>; multiclass SystemZUnaryExtBHF { def b : SystemZUnaryConv; @@ -179,7 +182,8 @@ multiclass SystemZQuaternaryIntBHF { def f : SystemZQuaternaryInt; } -multiclass SystemZQuaternaryIntBHFG : SystemZQuaternaryIntBHF { +multiclass SystemZQuaternaryIntBHFG : + SystemZQuaternaryIntBHF { def g : SystemZQuaternaryInt; } @@ -231,11 +235,11 @@ let TargetPrefix = "s390" in { let TargetPrefix = "s390" in { def int_s390_lcbb : GCCBuiltin<"__builtin_s390_lcbb">, Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], - [IntrNoMem]>; + [IntrNoMem, ImmArg<1>]>; def int_s390_vlbb : GCCBuiltin<"__builtin_s390_vlbb">, Intrinsic<[llvm_v16i8_ty], [llvm_ptr_ty, llvm_i32_ty], - [IntrReadMem, IntrArgMemOnly]>; + [IntrReadMem, IntrArgMemOnly, ImmArg<1>]>; def int_s390_vll : GCCBuiltin<"__builtin_s390_vll">, Intrinsic<[llvm_v16i8_ty], [llvm_i32_ty, llvm_ptr_ty], @@ -244,7 +248,7 @@ let TargetPrefix = "s390" in { def int_s390_vpdi : GCCBuiltin<"__builtin_s390_vpdi">, Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty, llvm_i32_ty], - [IntrNoMem]>; + [IntrNoMem, ImmArg<2>]>; def int_s390_vperm : GCCBuiltin<"__builtin_s390_vperm">, Intrinsic<[llvm_v16i8_ty], @@ -310,7 +314,7 @@ let TargetPrefix = "s390" in { def int_s390_vsldb : GCCBuiltin<"__builtin_s390_vsldb">, Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty, llvm_i32_ty], - [IntrNoMem]>; + [IntrNoMem, ImmArg<2>]>; defm int_s390_vscbi : SystemZBinaryBHFG<"vscbi">; @@ -369,7 +373,7 @@ let TargetPrefix = "s390" in { def int_s390_vfidb : Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_i32_ty, llvm_i32_ty], - [IntrNoMem]>; + [IntrNoMem, ImmArg<1>, ImmArg<2>]>; // Instructions from the Vector Enhancements Facility 1 def int_s390_vbperm : SystemZBinaryConv<"vbperm", llvm_v2i64_ty, @@ -378,20 +382,20 @@ let TargetPrefix = "s390" in { def int_s390_vmslg : GCCBuiltin<"__builtin_s390_vmslg">, Intrinsic<[llvm_v16i8_ty], [llvm_v2i64_ty, llvm_v2i64_ty, llvm_v16i8_ty, - llvm_i32_ty], [IntrNoMem]>; + llvm_i32_ty], [IntrNoMem, ImmArg<3>]>; def int_s390_vfmaxdb : Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty, llvm_i32_ty], - [IntrNoMem]>; + [IntrNoMem, ImmArg<2>]>; def int_s390_vfmindb : Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty, llvm_i32_ty], - [IntrNoMem]>; + [IntrNoMem, ImmArg<2>]>; def int_s390_vfmaxsb : Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty], - [IntrNoMem]>; + [IntrNoMem, ImmArg<2>]>; def int_s390_vfminsb : Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty], - [IntrNoMem]>; + [IntrNoMem, ImmArg<2>]>; def int_s390_vfcesbs : SystemZBinaryConvCC; def int_s390_vfchsbs : SystemZBinaryConvCC; @@ -401,7 +405,7 @@ let TargetPrefix = "s390" in { def int_s390_vfisb : Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_i32_ty, llvm_i32_ty], - [IntrNoMem]>; + [IntrNoMem, ImmArg<1>, ImmArg<2>]>; // Instructions from the Vector Packed Decimal Facility def int_s390_vlrl : GCCBuiltin<"__builtin_s390_vlrl">, diff --git a/llvm/test/Verifier/SystemZ/intrinsic-immarg.ll b/llvm/test/Verifier/SystemZ/intrinsic-immarg.ll new file mode 100644 index 0000000..7f81849 --- /dev/null +++ b/llvm/test/Verifier/SystemZ/intrinsic-immarg.ll @@ -0,0 +1,166 @@ +; RUN: not llvm-as %s -o /dev/null 2>&1 | FileCheck %s + +declare <2 x double> @llvm.s390.vfidb(<2 x double>, i32, i32) +define void @test_vfidb(<2 x double> %arg0, i32 %arg1, i32 %arg2) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg1 + ; CHECK-NEXT: %ret0 = call <2 x double> @llvm.s390.vfidb(<2 x double> %arg0, i32 %arg1, i32 0) + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg2 + ; CHECK-NEXT: %ret1 = call <2 x double> @llvm.s390.vfidb(<2 x double> %arg0, i32 0, i32 %arg2) + %ret0 = call <2 x double> @llvm.s390.vfidb(<2 x double> %arg0, i32 %arg1, i32 0) + %ret1 = call <2 x double> @llvm.s390.vfidb(<2 x double> %arg0, i32 0, i32 %arg2) + ret void +} + +declare <2 x double> @llvm.s390.vfmaxdb(<2 x double>, <2 x double>, i32) +define <2 x double> @test_vfmaxdb(<2 x double> %arg0, <2 x double> %arg1, i32 %arg2) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg2 + ; CHECK-NEXT: %ret = call <2 x double> @llvm.s390.vfmaxdb(<2 x double> %arg0, <2 x double> %arg1, i32 %arg2) + %ret = call <2 x double> @llvm.s390.vfmaxdb(<2 x double> %arg0, <2 x double> %arg1, i32 %arg2) + ret <2 x double> %ret +} + +declare <2 x double> @llvm.s390.vfmindb(<2 x double>, <2 x double>, i32) +define <2 x double> @test_vfmindb(<2 x double> %arg0, <2 x double> %arg1, i32 %arg2) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg2 + ; CHECK-NEXT: %ret = call <2 x double> @llvm.s390.vfmindb(<2 x double> %arg0, <2 x double> %arg1, i32 %arg2) + %ret = call <2 x double> @llvm.s390.vfmindb(<2 x double> %arg0, <2 x double> %arg1, i32 %arg2) + ret <2 x double> %ret +} + +declare <2 x float> @llvm.s390.vfmaxsb(<2 x float>, <2 x float>, i32) +define <2 x float> @test_vfmaxsb(<2 x float> %arg0, <2 x float> %arg1, i32 %arg2) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg2 + ; CHECK-NEXT: %ret = call <2 x float> @llvm.s390.vfmaxsb(<2 x float> %arg0, <2 x float> %arg1, i32 %arg2) + %ret = call <2 x float> @llvm.s390.vfmaxsb(<2 x float> %arg0, <2 x float> %arg1, i32 %arg2) + ret <2 x float> %ret +} + +declare <2 x float> @llvm.s390.vfminsb(<2 x float>, <2 x float>, i32) +define <2 x float> @test_vfminsb(<2 x float> %arg0, <2 x float> %arg1, i32 %arg2) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg2 + ; CHECK-NEXT: %ret = call <2 x float> @llvm.s390.vfminsb(<2 x float> %arg0, <2 x float> %arg1, i32 %arg2) + %ret = call <2 x float> @llvm.s390.vfminsb(<2 x float> %arg0, <2 x float> %arg1, i32 %arg2) + ret <2 x float> %ret +} + +declare <4 x float> @llvm.s390.vfisb(<4 x float>, i32, i32) +define <4 x float> @test_vfisb(<4 x float> %arg0, i32 %arg1, i32 %arg2) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg1 + ; CHECK-NEXT: %ret0 = call <4 x float> @llvm.s390.vfisb(<4 x float> %arg0, i32 %arg1, i32 0) + %ret0 = call <4 x float> @llvm.s390.vfisb(<4 x float> %arg0, i32 %arg1, i32 0) + + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg2 + ; CHECK-NEXT: %ret1 = call <4 x float> @llvm.s390.vfisb(<4 x float> %ret0, i32 0, i32 %arg2) + %ret1 = call <4 x float> @llvm.s390.vfisb(<4 x float> %ret0, i32 0, i32 %arg2) + + ret <4 x float> %ret1 +} + +declare <16 x i8> @llvm.s390.vstrcb(<16 x i8>, <16 x i8>, <16 x i8>, i32) +define <16 x i8> @test_vstrcb(<16 x i8> %arg0, <16 x i8> %arg1, <16 x i8> %arg2, i32 %arg3) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg3 + ; CHECK-NEXT: %ret = call <16 x i8> @llvm.s390.vstrcb(<16 x i8> %arg0, <16 x i8> %arg1, <16 x i8> %arg2, i32 %arg3) + %ret = call <16 x i8> @llvm.s390.vstrcb(<16 x i8> %arg0, <16 x i8>%arg1, <16 x i8> %arg2, i32 %arg3) + ret <16 x i8> %ret +} + +declare <8 x i16> @llvm.s390.vstrch(<8 x i16>, <8 x i16>, <8 x i16>, i32) +define <8 x i16> @test_vstrch(<8 x i16> %arg0, <8 x i16> %arg1, <8 x i16> %arg2, i32 %arg3) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg3 + ; CHECK-NEXT: %ret = call <8 x i16> @llvm.s390.vstrch(<8 x i16> %arg0, <8 x i16> %arg1, <8 x i16> %arg2, i32 %arg3) + %ret = call <8 x i16> @llvm.s390.vstrch(<8 x i16> %arg0, <8 x i16>%arg1, <8 x i16> %arg2, i32 %arg3) + ret <8 x i16> %ret +} + +declare <4 x i32> @llvm.s390.vstrcf(<4 x i32>, <4 x i32>, <4 x i32>, i32) +define <4 x i32> @test_vstrcf(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, i32 %arg3) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg3 + ; CHECK-NEXT: %ret = call <4 x i32> @llvm.s390.vstrcf(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, i32 %arg3) + %ret = call <4 x i32> @llvm.s390.vstrcf(<4 x i32> %arg0, <4 x i32>%arg1, <4 x i32> %arg2, i32 %arg3) + ret <4 x i32> %ret +} + +declare <16 x i8> @llvm.s390.verimb(<16 x i8>, <16 x i8>, <16 x i8>, i32) +define <16 x i8> @test_verimb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, i32 %d) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %d + ; CHECK-NEXT: %res = call <16 x i8> @llvm.s390.verimb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, i32 %d) + %res = call <16 x i8> @llvm.s390.verimb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, i32 %d) + ret <16 x i8> %res +} + +declare <8 x i16> @llvm.s390.verimh(<8 x i16>, <8 x i16>, <8 x i16>, i32) +define <8 x i16> @test_verimh(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c, i32 %d) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %d + ; CHECK-NEXT: %res = call <8 x i16> @llvm.s390.verimh(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c, i32 %d) + %res = call <8 x i16> @llvm.s390.verimh(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c, i32 %d) + ret <8 x i16> %res +} + +declare <4 x i32> @llvm.s390.verimf(<4 x i32>, <4 x i32>, <4 x i32>, i32) +define <4 x i32> @test_verimf(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, i32 %d) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %d + ; CHECK-NEXT: %res = call <4 x i32> @llvm.s390.verimf(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, i32 %d) + %res = call <4 x i32> @llvm.s390.verimf(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, i32 %d) + ret <4 x i32> %res +} + +declare <2 x i64> @llvm.s390.verimg(<2 x i64>, <2 x i64>, <2 x i64>, i32) +define <2 x i64> @test_verimg(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c, i32 %d) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %d + ; CHECK-NEXT: %res = call <2 x i64> @llvm.s390.verimg(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c, i32 %d) + %res = call <2 x i64> @llvm.s390.verimg(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c, i32 %d) + ret <2 x i64> %res +} + +declare {<2 x i64>, i32} @llvm.s390.vftcidb(<2 x double>, i32) +define i32 @test_vftcidb(<2 x double> %a, i32 %b) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %b + ; CHECK-NEXT: %call = call { <2 x i64>, i32 } @llvm.s390.vftcidb(<2 x double> %a, i32 %b) + %call = call {<2 x i64>, i32} @llvm.s390.vftcidb(<2 x double> %a, i32 %b) + %res = extractvalue {<2 x i64>, i32} %call, 1 + ret i32 %res +} + +declare {<4 x i32>, i32} @llvm.s390.vftcisb(<4 x float>, i32) +define i32 @test_vftcisb(<4 x float> %a, i32 %b) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %b + ; CHECK-NEXT: %call = call { <4 x i32>, i32 } @llvm.s390.vftcisb(<4 x float> %a, i32 %b) + %call = call {<4 x i32>, i32} @llvm.s390.vftcisb(<4 x float> %a, i32 %b) + %res = extractvalue {<4 x i32>, i32} %call, 1 + ret i32 %res +} + +declare <16 x i8> @llvm.s390.vfaeb(<16 x i8>, <16 x i8>, i32) +define <16 x i8> @test_vfaeb(<16 x i8> %a, <16 x i8> %b, i32 %c) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %c + ; CHECK-NEXT: %res = call <16 x i8> @llvm.s390.vfaeb(<16 x i8> %a, <16 x i8> %b, i32 %c) + %res = call <16 x i8> @llvm.s390.vfaeb(<16 x i8> %a, <16 x i8> %b, i32 %c) + ret <16 x i8> %res +} + +declare <16 x i8> @llvm.s390.vfaezb(<16 x i8>, <16 x i8>, i32) +define <16 x i8> @test_vfaezb(<16 x i8> %a, <16 x i8> %b, i32 %c) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %c + ; CHECK-NEXT: %res = call <16 x i8> @llvm.s390.vfaezb(<16 x i8> %a, <16 x i8> %b, i32 %c) + %res = call <16 x i8> @llvm.s390.vfaezb(<16 x i8> %a, <16 x i8> %b, i32 %c) + ret <16 x i8> %res +} diff --git a/llvm/test/Verifier/SystemZ/lit.local.cfg b/llvm/test/Verifier/SystemZ/lit.local.cfg new file mode 100644 index 0000000..2f3cf7d --- /dev/null +++ b/llvm/test/Verifier/SystemZ/lit.local.cfg @@ -0,0 +1,2 @@ +if not 'SystemZ' in config.root.targets: + config.unsupported = True -- 2.7.4