From 24dc75abcbe8262c9ef5f2eb17a4c026513289f2 Mon Sep 17 00:00:00 2001 From: Chia-I Wu Date: Wed, 11 Feb 2015 11:19:34 -0700 Subject: [PATCH] intel: always emit "post" WAs For workaround PIPE_CONTROLs that are needed "after" commands, they should never be skipped. --- icd/intel/cmd_pipeline.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/icd/intel/cmd_pipeline.c b/icd/intel/cmd_pipeline.c index e5b1123..8565bf9 100644 --- a/icd/intel/cmd_pipeline.c +++ b/icd/intel/cmd_pipeline.c @@ -1060,9 +1060,6 @@ static void cmd_wa_gen7_post_command_cs_stall(struct intel_cmd *cmd) { CMD_ASSERT(cmd, 7, 7.5); - if (!cmd->bind.draw_count) - return; - /* * From the Ivy Bridge PRM, volume 2 part 1, page 61: * @@ -1084,9 +1081,6 @@ static void cmd_wa_gen7_post_command_depth_stall(struct intel_cmd *cmd) { CMD_ASSERT(cmd, 7, 7.5); - if (!cmd->bind.draw_count) - return; - cmd_wa_gen6_pre_depth_stall_write(cmd); gen6_PIPE_CONTROL(cmd, GEN6_PIPE_CONTROL_DEPTH_STALL, NULL, 0, 0); -- 2.7.4