From 24bdd2d65ab4169125840cee5c43ae075f316d0c Mon Sep 17 00:00:00 2001 From: froydnj Date: Tue, 21 Aug 2007 17:22:46 +0000 Subject: [PATCH] gcc/ * config/rs6000/rs6000.c (expand_block_clear): Add TARGET_SPE cases to set eight bytes at a time. (expand_block_move): Likewise. gcc/testsuite/ * gcc.target/powerpc/spe-vector-memset.c: New testcase. * gcc.target/powerpc/spe-vector-memcpy.c: New testcase. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@127670 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 6 ++++++ gcc/config/rs6000/rs6000.c | 19 ++++++++++++++++--- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/powerpc/spe-vector-memcpy.c | 10 ++++++++++ gcc/testsuite/gcc.target/powerpc/spe-vector-memset.c | 13 +++++++++++++ 5 files changed, 50 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/spe-vector-memcpy.c create mode 100644 gcc/testsuite/gcc.target/powerpc/spe-vector-memset.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 82b7685..6cbda5f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2007-08-21 Nathan Froyd + + * config/rs6000/rs6000.c (expand_block_clear): Add TARGET_SPE + cases to set eight bytes at a time. + (expand_block_move): Likewise. + 2007-08-21 Jakub Jelinek PR debug/32610 diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 5354e52..44e4928 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -9852,6 +9852,8 @@ expand_block_clear (rtx operands[]) clear_step = 16; else if (TARGET_POWERPC64 && align >= 32) clear_step = 8; + else if (TARGET_SPE && align >= 64) + clear_step = 8; else clear_step = 4; @@ -9870,10 +9872,15 @@ expand_block_clear (rtx operands[]) clear_bytes = 16; mode = V4SImode; } + else if (bytes >= 8 && TARGET_SPE && align >= 64) + { + clear_bytes = 8; + mode = V2SImode; + } else if (bytes >= 8 && TARGET_POWERPC64 - /* 64-bit loads and stores require word-aligned - displacements. */ - && (align >= 64 || (!STRICT_ALIGNMENT && align >= 32))) + /* 64-bit loads and stores require word-aligned + displacements. */ + && (align >= 64 || (!STRICT_ALIGNMENT && align >= 32))) { clear_bytes = 8; mode = DImode; @@ -9963,6 +9970,12 @@ expand_block_move (rtx operands[]) mode = V4SImode; gen_func.mov = gen_movv4si; } + else if (TARGET_SPE && bytes >= 8 && align >= 64) + { + move_bytes = 8; + mode = V2SImode; + gen_func.mov = gen_movv2si; + } else if (TARGET_STRING && bytes > 24 /* move up to 32 bytes at a time */ && ! fixed_regs[5] diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 002f824..9800a7f 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2007-08-21 Nathan Froyd + + * gcc.target/powerpc/spe-vector-memset.c: New testcase. + * gcc.target/powerpc/spe-vector-memcpy.c: New testcase. + 2007-08-21 Jakub Jelinek PR debug/32610 diff --git a/gcc/testsuite/gcc.target/powerpc/spe-vector-memcpy.c b/gcc/testsuite/gcc.target/powerpc/spe-vector-memcpy.c new file mode 100644 index 0000000..d12f669 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/spe-vector-memcpy.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target powerpc*-*-* } } */ +/* { dg-require-effective-target powerpc_spe } */ +/* { dg-options "-O -mspe=yes" } */ +/* { dg-final { scan-assembler "evstdd" } } */ + +void foo(void) +{ + int x[8] __attribute__((aligned(64))) = { 1, 1, 1, 1, 1, 1, 1, 1 }; + bar (x); +} diff --git a/gcc/testsuite/gcc.target/powerpc/spe-vector-memset.c b/gcc/testsuite/gcc.target/powerpc/spe-vector-memset.c new file mode 100644 index 0000000..7ecaf10 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/spe-vector-memset.c @@ -0,0 +1,13 @@ +/* { dg-do compile { target powerpc*-*-* } } */ +/* { dg-require-effective-target powerpc_spe } */ +/* { dg-options "-O -mspe=yes" } */ +/* { dg-final { scan-assembler "evstdd" } } */ + +#include + +void foo(void) +{ + int x[8] __attribute__((aligned(64))); + memset (x, 0, sizeof (x)); + bar (x); +} -- 2.7.4