From 240e176a96187ee84e63626ca0d1aac92da503aa Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Thu, 9 Jul 2020 15:30:16 -0700 Subject: [PATCH] irqchip/brcmstb-l2: Match UPG_AUX_AON_INTR2 compatible The UPG_AUX_AON_INTR2 Level 2 interrupt controller node is defined with the "brcm,upg-aux-aon-l2-intc" compatible string in Device Tree and behaves as an edge triggered standard Broadcom STB L2 interrupt controller. Signed-off-by: Florian Fainelli Signed-off-by: Marc Zyngier Link: https://lore.kernel.org/r/20200709223016.989-7-f.fainelli@gmail.com --- drivers/irqchip/irq-brcmstb-l2.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/irqchip/irq-brcmstb-l2.c b/drivers/irqchip/irq-brcmstb-l2.c index b10fe50..cdd6a42 100644 --- a/drivers/irqchip/irq-brcmstb-l2.c +++ b/drivers/irqchip/irq-brcmstb-l2.c @@ -278,6 +278,8 @@ static int __init brcmstb_l2_edge_intc_of_init(struct device_node *np, IRQCHIP_DECLARE(brcmstb_l2_intc, "brcm,l2-intc", brcmstb_l2_edge_intc_of_init); IRQCHIP_DECLARE(brcmstb_hif_spi_l2_intc, "brcm,hif-spi-l2-intc", brcmstb_l2_edge_intc_of_init); +IRQCHIP_DECLARE(brcmstb_upg_aux_aon_l2_intc, "brcm,upg-aux-aon-l2-intc", + brcmstb_l2_edge_intc_of_init); static int __init brcmstb_l2_lvl_intc_of_init(struct device_node *np, struct device_node *parent) -- 2.7.4