From 23f7b1a77602d335811aea80af1cacf5bff502af Mon Sep 17 00:00:00 2001
From: Lokesh Vutla <lokeshvutla@ti.com>
Date: Fri, 2 Nov 2018 19:51:03 +0530
Subject: [PATCH] armv7R: K3: am654: Enable MPU regions

Enable MPU regions for AM654 evm:
- Region0: 0x00000000 - 0xFFFFFFFF: Device memory, not executable
- Region1: 0x41c00000 - 0x42400000: Normal, executable, WB, Write alloc
- Region2: 0x80000000 - 0xFFFFFFFF: Normal, executable, WB, Write alloc
- region3-15: Disabled

With this dcache can be enabled either in SPL or U-Boot.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
 arch/arm/mach-k3/Makefile   |  1 +
 arch/arm/mach-k3/am6_init.c |  5 +++++
 arch/arm/mach-k3/common.h   | 11 +++++++++++
 arch/arm/mach-k3/r5_mpu.c   | 47 +++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 64 insertions(+)
 create mode 100644 arch/arm/mach-k3/common.h
 create mode 100644 arch/arm/mach-k3/r5_mpu.c

diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile
index e9b7ee5..619733f 100644
--- a/arch/arm/mach-k3/Makefile
+++ b/arch/arm/mach-k3/Makefile
@@ -5,3 +5,4 @@
 
 obj-$(CONFIG_SOC_K3_AM6) += am6_init.o
 obj-$(CONFIG_ARM64) += arm64-mmu.o
+obj-$(CONFIG_CPU_V7R) += r5_mpu.o
diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c
index 68f0b8c..fef0107 100644
--- a/arch/arm/mach-k3/am6_init.c
+++ b/arch/arm/mach-k3/am6_init.c
@@ -10,6 +10,7 @@
 #include <asm/io.h>
 #include <spl.h>
 #include <asm/arch/hardware.h>
+#include "common.h"
 
 #ifdef CONFIG_SPL_BUILD
 static void mmr_unlock(u32 base, u32 partition)
@@ -65,6 +66,10 @@ void board_init_f(ulong dummy)
 	/* Make all control module registers accessible */
 	ctrl_mmr_unlock();
 
+#ifdef CONFIG_CPU_V7R
+	setup_k3_mpu_regions();
+#endif
+
 	/* Init DM early in-order to invoke system controller */
 	spl_early_init();
 
diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h
new file mode 100644
index 0000000..ac7e80d
--- /dev/null
+++ b/arch/arm/mach-k3/common.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * K3: Architecture common definitions
+ *
+ * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+ *	Lokesh Vutla <lokeshvutla@ti.com>
+ */
+
+#include <asm/armv7_mpu.h>
+
+void setup_k3_mpu_regions(void);
diff --git a/arch/arm/mach-k3/r5_mpu.c b/arch/arm/mach-k3/r5_mpu.c
new file mode 100644
index 0000000..ee076ed
--- /dev/null
+++ b/arch/arm/mach-k3/r5_mpu.c
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * K3: R5 MPU region definitions
+ *
+ * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
+ *	Lokesh Vutla <lokeshvutla@ti.com>
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <linux/kernel.h>
+#include "common.h"
+
+struct mpu_region_config k3_mpu_regions[16] = {
+	/*
+	 * Make all 4GB as Device Memory and not executable. We are overriding
+	 * it with next region for any requirement.
+	 */
+	{0x00000000, REGION_0, XN_EN, PRIV_RW_USR_RW, SHARED_WRITE_BUFFERED,
+	 REGION_4GB},
+
+	/* SPL code area marking it as WB and Write allocate. */
+	{CONFIG_SPL_TEXT_BASE, REGION_1, XN_DIS, PRIV_RW_USR_RW,
+	 O_I_WB_RD_WR_ALLOC, REGION_8MB},
+
+	/* U-Boot's code area marking it as WB and Write allocate */
+	{CONFIG_SYS_SDRAM_BASE, REGION_2, XN_DIS, PRIV_RW_USR_RW,
+	 O_I_WB_RD_WR_ALLOC, REGION_2GB},
+	{0x0, 3, 0x0, 0x0, 0x0, 0x0},
+	{0x0, 4, 0x0, 0x0, 0x0, 0x0},
+	{0x0, 5, 0x0, 0x0, 0x0, 0x0},
+	{0x0, 6, 0x0, 0x0, 0x0, 0x0},
+	{0x0, 7, 0x0, 0x0, 0x0, 0x0},
+	{0x0, 8, 0x0, 0x0, 0x0, 0x0},
+	{0x0, 9, 0x0, 0x0, 0x0, 0x0},
+	{0x0, 10, 0x0, 0x0, 0x0, 0x0},
+	{0x0, 11, 0x0, 0x0, 0x0, 0x0},
+	{0x0, 12, 0x0, 0x0, 0x0, 0x0},
+	{0x0, 13, 0x0, 0x0, 0x0, 0x0},
+	{0x0, 14, 0x0, 0x0, 0x0, 0x0},
+	{0x0, 15, 0x0, 0x0, 0x0, 0x0},
+};
+
+void setup_k3_mpu_regions(void)
+{
+	setup_mpu_regions(k3_mpu_regions, ARRAY_SIZE(k3_mpu_regions));
+}
-- 
2.7.4