From 22b8edc46e11608c93317960398fff80104a9aed Mon Sep 17 00:00:00 2001
From: Serguei Katkov <serguei.katkov@azul.com>
Date: Tue, 4 Apr 2023 16:49:59 +0700
Subject: [PATCH] [InstCombine] Pre-land tests for maximum(a,b) +* minimum(a,b)
 => a +* b

---
 .../Transforms/InstCombine/fadd-maximum-minimum.ll | 112 ++++++++++++++++++++
 .../Transforms/InstCombine/fmul-maximum-minimum.ll | 113 +++++++++++++++++++++
 2 files changed, 225 insertions(+)
 create mode 100644 llvm/test/Transforms/InstCombine/fadd-maximum-minimum.ll
 create mode 100644 llvm/test/Transforms/InstCombine/fmul-maximum-minimum.ll

diff --git a/llvm/test/Transforms/InstCombine/fadd-maximum-minimum.ll b/llvm/test/Transforms/InstCombine/fadd-maximum-minimum.ll
new file mode 100644
index 0000000..98bbea1
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/fadd-maximum-minimum.ll
@@ -0,0 +1,112 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -passes=instcombine -S | FileCheck %s
+
+declare float    @llvm.minimum.f32(float %Val0, float %Val1)
+declare float    @llvm.maximum.f32(float %Val0, float %Val1)
+declare <4 x float>    @llvm.minimum.v4f32(<4 x float> %Val0, <4 x float> %Val1)
+declare <4 x float>    @llvm.maximum.v4f32(<4 x float> %Val0, <4 x float> %Val1)
+
+define float @test(float %a, float %b) {
+; CHECK-LABEL: @test(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[MIN:%.*]] = call float @llvm.minimum.f32(float [[A:%.*]], float [[B:%.*]])
+; CHECK-NEXT:    [[MAX:%.*]] = call float @llvm.maximum.f32(float [[A]], float [[B]])
+; CHECK-NEXT:    [[RES:%.*]] = fadd float [[MIN]], [[MAX]]
+; CHECK-NEXT:    ret float [[RES]]
+;
+entry:
+  %min = call float @llvm.minimum.f32(float %a, float %b)
+  %max = call float @llvm.maximum.f32(float %a, float %b)
+  %res = fadd float %min, %max
+  ret float %res
+}
+
+define float @test_comm1(float %a, float %b) {
+; CHECK-LABEL: @test_comm1(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[MIN:%.*]] = call float @llvm.minimum.f32(float [[A:%.*]], float [[B:%.*]])
+; CHECK-NEXT:    [[MAX:%.*]] = call float @llvm.maximum.f32(float [[A]], float [[B]])
+; CHECK-NEXT:    [[RES:%.*]] = fadd float [[MAX]], [[MIN]]
+; CHECK-NEXT:    ret float [[RES]]
+;
+entry:
+  %min = call float @llvm.minimum.f32(float %a, float %b)
+  %max = call float @llvm.maximum.f32(float %a, float %b)
+  %res = fadd float %max, %min
+  ret float %res
+}
+
+define float @test_comm2(float %a, float %b) {
+; CHECK-LABEL: @test_comm2(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[MIN:%.*]] = call float @llvm.minimum.f32(float [[A:%.*]], float [[B:%.*]])
+; CHECK-NEXT:    [[MAX:%.*]] = call float @llvm.maximum.f32(float [[B]], float [[A]])
+; CHECK-NEXT:    [[RES:%.*]] = fadd float [[MIN]], [[MAX]]
+; CHECK-NEXT:    ret float [[RES]]
+;
+entry:
+  %min = call float @llvm.minimum.f32(float %a, float %b)
+  %max = call float @llvm.maximum.f32(float %b, float %a)
+  %res = fadd float %min, %max
+  ret float %res
+}
+
+define float @test_comm3(float %a, float %b) {
+; CHECK-LABEL: @test_comm3(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[MIN:%.*]] = call float @llvm.minimum.f32(float [[A:%.*]], float [[B:%.*]])
+; CHECK-NEXT:    [[MAX:%.*]] = call float @llvm.maximum.f32(float [[B]], float [[A]])
+; CHECK-NEXT:    [[RES:%.*]] = fadd float [[MAX]], [[MIN]]
+; CHECK-NEXT:    ret float [[RES]]
+;
+entry:
+  %min = call float @llvm.minimum.f32(float %a, float %b)
+  %max = call float @llvm.maximum.f32(float %b, float %a)
+  %res = fadd float %max, %min
+  ret float %res
+}
+
+define <4 x float> @test_vect(<4 x float> %a, <4 x float> %b) {
+; CHECK-LABEL: @test_vect(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[MIN:%.*]] = call <4 x float> @llvm.minimum.v4f32(<4 x float> [[A:%.*]], <4 x float> [[B:%.*]])
+; CHECK-NEXT:    [[MAX:%.*]] = call <4 x float> @llvm.maximum.v4f32(<4 x float> [[B]], <4 x float> [[A]])
+; CHECK-NEXT:    [[RES:%.*]] = fadd <4 x float> [[MIN]], [[MAX]]
+; CHECK-NEXT:    ret <4 x float> [[RES]]
+;
+entry:
+  %min = call <4 x float> @llvm.minimum.v4f32(<4 x float> %a, <4 x float> %b)
+  %max = call <4 x float> @llvm.maximum.v4f32(<4 x float> %b, <4 x float> %a)
+  %res = fadd <4 x float> %min, %max
+  ret <4 x float> %res
+}
+
+define float @test_flags(float %a, float %b) {
+; CHECK-LABEL: @test_flags(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[MIN:%.*]] = call float @llvm.minimum.f32(float [[A:%.*]], float [[B:%.*]])
+; CHECK-NEXT:    [[MAX:%.*]] = call float @llvm.maximum.f32(float [[A]], float [[B]])
+; CHECK-NEXT:    [[RES:%.*]] = fadd fast float [[MIN]], [[MAX]]
+; CHECK-NEXT:    ret float [[RES]]
+;
+entry:
+  %min = call float @llvm.minimum.f32(float %a, float %b)
+  %max = call float @llvm.maximum.f32(float %a, float %b)
+  %res = fadd fast float %min, %max
+  ret float %res
+}
+
+define float @test_flags2(float %a, float %b) {
+; CHECK-LABEL: @test_flags2(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[MIN:%.*]] = call float @llvm.minimum.f32(float [[A:%.*]], float [[B:%.*]])
+; CHECK-NEXT:    [[MAX:%.*]] = call float @llvm.maximum.f32(float [[A]], float [[B]])
+; CHECK-NEXT:    [[RES:%.*]] = fadd reassoc ninf nsz arcp contract afn float [[MIN]], [[MAX]]
+; CHECK-NEXT:    ret float [[RES]]
+;
+entry:
+  %min = call float @llvm.minimum.f32(float %a, float %b)
+  %max = call float @llvm.maximum.f32(float %a, float %b)
+  %res = fadd reassoc ninf nsz arcp contract afn float %min, %max
+  ret float %res
+}
diff --git a/llvm/test/Transforms/InstCombine/fmul-maximum-minimum.ll b/llvm/test/Transforms/InstCombine/fmul-maximum-minimum.ll
new file mode 100644
index 0000000..42f451d
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/fmul-maximum-minimum.ll
@@ -0,0 +1,113 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -passes=instcombine -S | FileCheck %s
+
+declare float    @llvm.minimum.f32(float %Val0, float %Val1)
+declare float    @llvm.maximum.f32(float %Val0, float %Val1)
+declare <4 x float>    @llvm.minimum.v4f32(<4 x float> %Val0, <4 x float> %Val1)
+declare <4 x float>    @llvm.maximum.v4f32(<4 x float> %Val0, <4 x float> %Val1)
+
+define float @test(float %a, float %b) {
+; CHECK-LABEL: @test(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[MIN:%.*]] = call float @llvm.minimum.f32(float [[A:%.*]], float [[B:%.*]])
+; CHECK-NEXT:    [[MAX:%.*]] = call float @llvm.maximum.f32(float [[A]], float [[B]])
+; CHECK-NEXT:    [[RES:%.*]] = fmul float [[MIN]], [[MAX]]
+; CHECK-NEXT:    ret float [[RES]]
+;
+entry:
+  %min = call float @llvm.minimum.f32(float %a, float %b)
+  %max = call float @llvm.maximum.f32(float %a, float %b)
+  %res = fmul float %min, %max
+  ret float %res
+}
+
+define float @test_comm1(float %a, float %b) {
+; CHECK-LABEL: @test_comm1(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[MIN:%.*]] = call float @llvm.minimum.f32(float [[A:%.*]], float [[B:%.*]])
+; CHECK-NEXT:    [[MAX:%.*]] = call float @llvm.maximum.f32(float [[A]], float [[B]])
+; CHECK-NEXT:    [[RES:%.*]] = fmul float [[MAX]], [[MIN]]
+; CHECK-NEXT:    ret float [[RES]]
+;
+entry:
+  %min = call float @llvm.minimum.f32(float %a, float %b)
+  %max = call float @llvm.maximum.f32(float %a, float %b)
+  %res = fmul float %max, %min
+  ret float %res
+}
+
+define float @test_comm2(float %a, float %b) {
+; CHECK-LABEL: @test_comm2(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[MIN:%.*]] = call float @llvm.minimum.f32(float [[A:%.*]], float [[B:%.*]])
+; CHECK-NEXT:    [[MAX:%.*]] = call float @llvm.maximum.f32(float [[B]], float [[A]])
+; CHECK-NEXT:    [[RES:%.*]] = fmul float [[MIN]], [[MAX]]
+; CHECK-NEXT:    ret float [[RES]]
+;
+entry:
+  %min = call float @llvm.minimum.f32(float %a, float %b)
+  %max = call float @llvm.maximum.f32(float %b, float %a)
+  %res = fmul float %min, %max
+  ret float %res
+}
+
+
+define float @test_comm3(float %a, float %b) {
+; CHECK-LABEL: @test_comm3(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[MIN:%.*]] = call float @llvm.minimum.f32(float [[A:%.*]], float [[B:%.*]])
+; CHECK-NEXT:    [[MAX:%.*]] = call float @llvm.maximum.f32(float [[B]], float [[A]])
+; CHECK-NEXT:    [[RES:%.*]] = fmul float [[MAX]], [[MIN]]
+; CHECK-NEXT:    ret float [[RES]]
+;
+entry:
+  %min = call float @llvm.minimum.f32(float %a, float %b)
+  %max = call float @llvm.maximum.f32(float %b, float %a)
+  %res = fmul float %max, %min
+  ret float %res
+}
+
+define <4 x float> @test_vect(<4 x float> %a, <4 x float> %b) {
+; CHECK-LABEL: @test_vect(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[MIN:%.*]] = call <4 x float> @llvm.minimum.v4f32(<4 x float> [[A:%.*]], <4 x float> [[B:%.*]])
+; CHECK-NEXT:    [[MAX:%.*]] = call <4 x float> @llvm.maximum.v4f32(<4 x float> [[B]], <4 x float> [[A]])
+; CHECK-NEXT:    [[RES:%.*]] = fmul <4 x float> [[MIN]], [[MAX]]
+; CHECK-NEXT:    ret <4 x float> [[RES]]
+;
+entry:
+  %min = call <4 x float> @llvm.minimum.v4f32(<4 x float> %a, <4 x float> %b)
+  %max = call <4 x float> @llvm.maximum.v4f32(<4 x float> %b, <4 x float> %a)
+  %res = fmul <4 x float> %min, %max
+  ret <4 x float> %res
+}
+
+define float @test_flags(float %a, float %b) {
+; CHECK-LABEL: @test_flags(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[MIN:%.*]] = call float @llvm.minimum.f32(float [[A:%.*]], float [[B:%.*]])
+; CHECK-NEXT:    [[MAX:%.*]] = call float @llvm.maximum.f32(float [[A]], float [[B]])
+; CHECK-NEXT:    [[RES:%.*]] = fmul fast float [[MIN]], [[MAX]]
+; CHECK-NEXT:    ret float [[RES]]
+;
+entry:
+  %min = call float @llvm.minimum.f32(float %a, float %b)
+  %max = call float @llvm.maximum.f32(float %a, float %b)
+  %res = fmul fast float %min, %max
+  ret float %res
+}
+
+define float @test_flags2(float %a, float %b) {
+; CHECK-LABEL: @test_flags2(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[MIN:%.*]] = call float @llvm.minimum.f32(float [[A:%.*]], float [[B:%.*]])
+; CHECK-NEXT:    [[MAX:%.*]] = call float @llvm.maximum.f32(float [[A]], float [[B]])
+; CHECK-NEXT:    [[RES:%.*]] = fmul reassoc ninf nsz arcp contract afn float [[MIN]], [[MAX]]
+; CHECK-NEXT:    ret float [[RES]]
+;
+entry:
+  %min = call float @llvm.minimum.f32(float %a, float %b)
+  %max = call float @llvm.maximum.f32(float %a, float %b)
+  %res = fmul reassoc ninf nsz arcp contract afn float %min, %max
+  ret float %res
+}
-- 
2.7.4