From 220a8730fb0532eb0ec0739d2185b565b9470ddd Mon Sep 17 00:00:00 2001 From: Sanjay Patel Date: Wed, 28 Sep 2016 14:27:21 +0000 Subject: [PATCH] [InstSimplify] allow or-of-icmps folds with vector splat constants llvm-svn: 282592 --- llvm/lib/Analysis/InstructionSimplify.cpp | 23 ++++++++-------- llvm/test/Transforms/InstSimplify/AndOrXor.ll | 38 +++++---------------------- 2 files changed, 17 insertions(+), 44 deletions(-) diff --git a/llvm/lib/Analysis/InstructionSimplify.cpp b/llvm/lib/Analysis/InstructionSimplify.cpp index 5f38ffe..08e82cb 100644 --- a/llvm/lib/Analysis/InstructionSimplify.cpp +++ b/llvm/lib/Analysis/InstructionSimplify.cpp @@ -1687,27 +1687,26 @@ static Value *SimplifyOrOfICmps(ICmpInst *Op0, ICmpInst *Op1) { if (Value *X = simplifyUnsignedRangeCheck(Op0, Op1, /*IsAnd=*/false)) return X; - // FIXME: Use m_APInt to allow vector splat matches. + // (icmp (add V, C0), C1) | (icmp V, C0) ICmpInst::Predicate Pred0, Pred1; - ConstantInt *CI1, *CI2; + const APInt *C0, *C1; Value *V; - if (!match(Op0, m_ICmp(Pred0, m_Add(m_Value(V), m_ConstantInt(CI1)), - m_ConstantInt(CI2)))) + if (!match(Op0, m_ICmp(Pred0, m_Add(m_Value(V), m_APInt(C0)), m_APInt(C1)))) return nullptr; - if (!match(Op1, m_ICmp(Pred1, m_Specific(V), m_Specific(CI1)))) + if (!match(Op1, m_ICmp(Pred1, m_Specific(V), m_Value()))) return nullptr; - Type *ITy = Op0->getType(); - auto *AddInst = cast(Op0->getOperand(0)); + if (AddInst->getOperand(1) != Op1->getOperand(1)) + return nullptr; + + Type *ITy = Op0->getType(); bool isNSW = AddInst->hasNoSignedWrap(); bool isNUW = AddInst->hasNoUnsignedWrap(); - const APInt &CI1V = CI1->getValue(); - const APInt &CI2V = CI2->getValue(); - const APInt Delta = CI2V - CI1V; - if (CI1V.isStrictlyPositive()) { + const APInt Delta = *C1 - *C0; + if (C0->isStrictlyPositive()) { if (Delta == 2) { if (Pred0 == ICmpInst::ICMP_UGE && Pred1 == ICmpInst::ICMP_SLE) return getTrue(ITy); @@ -1721,7 +1720,7 @@ static Value *SimplifyOrOfICmps(ICmpInst *Op0, ICmpInst *Op1) { return getTrue(ITy); } } - if (CI1V.getBoolValue() && isNUW) { + if (C0->getBoolValue() && isNUW) { if (Delta == 2) if (Pred0 == ICmpInst::ICMP_UGE && Pred1 == ICmpInst::ICMP_ULE) return getTrue(ITy); diff --git a/llvm/test/Transforms/InstSimplify/AndOrXor.ll b/llvm/test/Transforms/InstSimplify/AndOrXor.ll index c31aa89..e66601c 100644 --- a/llvm/test/Transforms/InstSimplify/AndOrXor.ll +++ b/llvm/test/Transforms/InstSimplify/AndOrXor.ll @@ -170,8 +170,6 @@ define <2 x i1> @and_of_icmps5_vec(<2 x i32> %b) { ret <2 x i1> %cmp } -; FIXME: Vector splats should fold the same way as scalars in the next 6 pairs of tests. - define i1 @or_of_icmps0(i32 %b) { ; CHECK-LABEL: @or_of_icmps0( ; CHECK-NEXT: ret i1 true @@ -185,11 +183,7 @@ define i1 @or_of_icmps0(i32 %b) { define <2 x i1> @or_of_icmps0_vec(<2 x i32> %b) { ; CHECK-LABEL: @or_of_icmps0_vec( -; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> %b, -; CHECK-NEXT: [[TMP2:%.*]] = icmp uge <2 x i32> [[TMP1]], -; CHECK-NEXT: [[CMP3:%.*]] = icmp sle <2 x i32> %b, -; CHECK-NEXT: [[CMP:%.*]] = or <2 x i1> [[TMP2]], [[CMP:%.*]]3 -; CHECK-NEXT: ret <2 x i1> [[CMP]] +; CHECK-NEXT: ret <2 x i1> ; %1 = add <2 x i32> %b, %2 = icmp uge <2 x i32> %1, @@ -211,11 +205,7 @@ define i1 @or_of_icmps1(i32 %b) { define <2 x i1> @or_of_icmps1_vec(<2 x i32> %b) { ; CHECK-LABEL: @or_of_icmps1_vec( -; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i32> %b, -; CHECK-NEXT: [[TMP2:%.*]] = icmp sge <2 x i32> [[TMP1]], -; CHECK-NEXT: [[CMP3:%.*]] = icmp sle <2 x i32> %b, -; CHECK-NEXT: [[CMP:%.*]] = or <2 x i1> [[TMP2]], [[CMP:%.*]]3 -; CHECK-NEXT: ret <2 x i1> [[CMP]] +; CHECK-NEXT: ret <2 x i1> ; %1 = add nsw <2 x i32> %b, %2 = icmp sge <2 x i32> %1, @@ -237,11 +227,7 @@ define i1 @or_of_icmps2(i32 %b) { define <2 x i1> @or_of_icmps2_vec(<2 x i32> %b) { ; CHECK-LABEL: @or_of_icmps2_vec( -; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> %b, -; CHECK-NEXT: [[TMP2:%.*]] = icmp ugt <2 x i32> [[TMP1]], -; CHECK-NEXT: [[CMP3:%.*]] = icmp sle <2 x i32> %b, -; CHECK-NEXT: [[CMP:%.*]] = or <2 x i1> [[TMP2]], [[CMP:%.*]]3 -; CHECK-NEXT: ret <2 x i1> [[CMP]] +; CHECK-NEXT: ret <2 x i1> ; %1 = add <2 x i32> %b, %2 = icmp ugt <2 x i32> %1, @@ -263,11 +249,7 @@ define i1 @or_of_icmps3(i32 %b) { define <2 x i1> @or_of_icmps3_vec(<2 x i32> %b) { ; CHECK-LABEL: @or_of_icmps3_vec( -; CHECK-NEXT: [[TMP1:%.*]] = add nsw <2 x i32> %b, -; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt <2 x i32> [[TMP1]], -; CHECK-NEXT: [[CMP3:%.*]] = icmp sle <2 x i32> %b, -; CHECK-NEXT: [[CMP:%.*]] = or <2 x i1> [[TMP2]], [[CMP:%.*]]3 -; CHECK-NEXT: ret <2 x i1> [[CMP]] +; CHECK-NEXT: ret <2 x i1> ; %1 = add nsw <2 x i32> %b, %2 = icmp sgt <2 x i32> %1, @@ -289,11 +271,7 @@ define i1 @or_of_icmps4(i32 %b) { define <2 x i1> @or_of_icmps4_vec(<2 x i32> %b) { ; CHECK-LABEL: @or_of_icmps4_vec( -; CHECK-NEXT: [[TMP1:%.*]] = add nuw <2 x i32> %b, -; CHECK-NEXT: [[TMP2:%.*]] = icmp uge <2 x i32> [[TMP1]], -; CHECK-NEXT: [[CMP3:%.*]] = icmp ule <2 x i32> %b, -; CHECK-NEXT: [[CMP:%.*]] = or <2 x i1> [[TMP2]], [[CMP:%.*]]3 -; CHECK-NEXT: ret <2 x i1> [[CMP]] +; CHECK-NEXT: ret <2 x i1> ; %1 = add nuw <2 x i32> %b, %2 = icmp uge <2 x i32> %1, @@ -315,11 +293,7 @@ define i1 @or_of_icmps5(i32 %b) { define <2 x i1> @or_of_icmps5_vec(<2 x i32> %b) { ; CHECK-LABEL: @or_of_icmps5_vec( -; CHECK-NEXT: [[TMP1:%.*]] = add nuw <2 x i32> %b, -; CHECK-NEXT: [[TMP2:%.*]] = icmp ugt <2 x i32> [[TMP1]], -; CHECK-NEXT: [[CMP3:%.*]] = icmp ule <2 x i32> %b, -; CHECK-NEXT: [[CMP:%.*]] = or <2 x i1> [[TMP2]], [[CMP:%.*]]3 -; CHECK-NEXT: ret <2 x i1> [[CMP]] +; CHECK-NEXT: ret <2 x i1> ; %1 = add nuw <2 x i32> %b, %2 = icmp ugt <2 x i32> %1, -- 2.7.4