From 21d3cdd0391bb01b348a47ec117eff3b9615d3a9 Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Wed, 4 Nov 2020 19:48:40 +0300 Subject: [PATCH] dt-bindings: memory: tegra20: emc: Correct registers range in example There is superfluous zero in the registers base address and registers size should be twice bigger. Signed-off-by: Dmitry Osipenko Acked-by: Rob Herring Acked-by: Thierry Reding Link: https://lore.kernel.org/r/20201104164923.21238-5-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski --- .../devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt index add95367..567cffd 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt @@ -21,7 +21,7 @@ Example: #address-cells = < 1 >; #size-cells = < 0 >; compatible = "nvidia,tegra20-emc"; - reg = <0x7000f4000 0x200>; + reg = <0x7000f400 0x400>; interrupts = <0 78 0x04>; clocks = <&tegra_car TEGRA20_CLK_EMC>; } -- 2.7.4