From 21692163d6882cf2c5ad3974ed5ea675b48585d4 Mon Sep 17 00:00:00 2001 From: "Dmitry V. Levin" Date: Sat, 12 Dec 2020 19:50:57 +0300 Subject: [PATCH] libcpu: fix spelling typos in comments layed -> laid adressing -> addressing Signed-off-by: Dmitry V. Levin --- libcpu/ChangeLog | 5 +++++ libcpu/bpf_disasm.c | 2 +- libcpu/i386_disasm.c | 2 +- 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/libcpu/ChangeLog b/libcpu/ChangeLog index a342b7f..000105b 100644 --- a/libcpu/ChangeLog +++ b/libcpu/ChangeLog @@ -1,3 +1,8 @@ +2020-12-12 Dmitry V. Levin + + * bpf_disasm.c (bswap_bpf_insn): Fix spelling typo in comment. + * i386_disasm.c (i386_disasm): Likewise. + 2020-05-09 Mark Wielaard * i386_parse.y (new_bitfield): Call free newp on error. diff --git a/libcpu/bpf_disasm.c b/libcpu/bpf_disasm.c index 3d92d01..62643c8 100644 --- a/libcpu/bpf_disasm.c +++ b/libcpu/bpf_disasm.c @@ -74,7 +74,7 @@ static void bswap_bpf_insn (struct bpf_insn *p) { /* Note that the dst_reg and src_reg fields are 4-bit bitfields. - That means these two nibbles are (typically) layed out in the + That means these two nibbles are (typically) laid out in the opposite order between big- and little-endian hosts. This is not required by any standard, but does happen to be true for at least ppc, s390, arm and mips as big-endian hosts. */ diff --git a/libcpu/i386_disasm.c b/libcpu/i386_disasm.c index 32df8cd..fd7340c 100644 --- a/libcpu/i386_disasm.c +++ b/libcpu/i386_disasm.c @@ -588,7 +588,7 @@ i386_disasm (Ebl *ebl __attribute__((unused)), } /* We have a match. First determine how many bytes are - needed for the adressing mode. */ + needed for the addressing mode. */ param_start = codep; if (instrtab[cnt].modrm) { -- 2.7.4