From 20c43d6bd5ba4354e690c582aa7d6ce8c93040a6 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Fri, 20 Nov 2020 14:07:11 -0500
Subject: [PATCH] OpaquePtr: Bulk update tests to use typed sret

---
 llvm/test/Analysis/Lint/noalias-byval.ll      |  8 +-
 .../ValueTracking/memory-dereferenceable.ll   |  2 +-
 llvm/test/Assembler/invalid-immarg.ll         |  2 +-
 llvm/test/Bitcode/DIExpression-aggresult.ll   |  2 +-
 llvm/test/Bitcode/attributes-3.3.ll           |  2 +-
 llvm/test/Bitcode/attributes.ll               |  2 +-
 llvm/test/Bitcode/compatibility-3.6.ll        |  2 +-
 llvm/test/Bitcode/compatibility-3.7.ll        |  2 +-
 llvm/test/Bitcode/compatibility-3.8.ll        |  2 +-
 llvm/test/Bitcode/compatibility-3.9.ll        |  2 +-
 llvm/test/Bitcode/compatibility-4.0.ll        |  2 +-
 llvm/test/Bitcode/compatibility-5.0.ll        |  2 +-
 llvm/test/Bitcode/compatibility-6.0.ll        |  2 +-
 llvm/test/Bitcode/compatibility.ll            |  2 +-
 llvm/test/Bitcode/highLevelStructure.3.2.ll   |  6 +-
 .../call-translator-tail-call-sret.ll         |  6 +-
 .../CodeGen/AArch64/GlobalISel/swifterror.ll  |  4 +-
 .../AArch64/arm64-alloc-no-stack-realign.ll   |  2 +-
 .../CodeGen/AArch64/arm64-windows-calls.ll    |  6 +-
 .../CodeGen/AArch64/arm64-windows-tailcall.ll |  2 +-
 llvm/test/CodeGen/AArch64/arm64_32.ll         |  4 +-
 llvm/test/CodeGen/AArch64/func-argpassing.ll  |  2 +-
 llvm/test/CodeGen/AArch64/func-calls.ll       |  4 +-
 llvm/test/CodeGen/AArch64/swifterror.ll       |  4 +-
 .../CodeGen/AArch64/tailcall-explicit-sret.ll | 10 +--
 .../CodeGen/AArch64/tailcall-string-rvo.ll    | 10 +--
 .../AMDGPU/GlobalISel/function-returns.ll     |  4 +-
 llvm/test/CodeGen/AMDGPU/function-returns.ll  |  4 +-
 .../CodeGen/AMDGPU/rewrite-out-arguments.ll   |  4 +-
 .../CodeGen/ARM/2009-07-18-RewriterBug.ll     |  6 +-
 .../CodeGen/ARM/2009-08-21-PostRAKill2.ll     |  2 +-
 .../ARM/2009-09-21-LiveVariablesBug.ll        |  2 +-
 .../CodeGen/ARM/2009-09-28-LdStOptiBug.ll     |  2 +-
 llvm/test/CodeGen/ARM/2009-11-01-NeonMoves.ll |  2 +-
 .../test/CodeGen/ARM/2009-12-02-vtrn-undef.ll |  2 +-
 .../CodeGen/ARM/2012-01-26-CopyPropKills.ll   |  4 +-
 .../CodeGen/ARM/alloc-no-stack-realign.ll     |  4 +-
 llvm/test/CodeGen/ARM/cmse-errors.ll          |  4 +-
 llvm/test/CodeGen/ARM/coalesce-subregs.ll     |  2 +-
 .../test/CodeGen/ARM/interval-update-remat.ll |  8 +-
 llvm/test/CodeGen/ARM/swifterror.ll           |  4 +-
 llvm/test/CodeGen/ARM/vlddup.ll               |  6 +-
 llvm/test/CodeGen/ARM/vmov.ll                 |  4 +-
 llvm/test/CodeGen/Hexagon/calling-conv-2.ll   |  4 +-
 llvm/test/CodeGen/Hexagon/calling-conv.ll     |  4 +-
 .../Hexagon/expand-condsets-pred-undef.ll     |  2 +-
 llvm/test/CodeGen/Hexagon/regscavengerbug.ll  | 16 ++--
 .../CodeGen/Hexagon/tail-dup-subreg-map.ll    |  2 +-
 llvm/test/CodeGen/MIR/X86/diexpr-win32.mir    |  2 +-
 llvm/test/CodeGen/MSP430/struct-return.ll     |  4 +-
 llvm/test/CodeGen/Mips/2008-07-03-SRet.ll     |  2 +-
 .../GlobalISel/irtranslator/sret_pointer.ll   |  6 +-
 .../Mips/GlobalISel/llvm-ir/sret_pointer.ll   |  6 +-
 llvm/test/CodeGen/Mips/cconv/return-struct.ll |  2 +-
 llvm/test/CodeGen/Mips/fastcc_byval.ll        |  4 +-
 llvm/test/CodeGen/Mips/mips64-sret.ll         |  4 +-
 .../PowerPC/2008-10-28-UnprocessedNode.ll     |  2 +-
 .../PowerPC/2008-12-02-LegalizeTypeAssert.ll  |  2 +-
 .../CodeGen/PowerPC/MMO-flags-assertion.ll    |  4 +-
 llvm/test/CodeGen/PowerPC/a2-fp-basic.ll      |  2 +-
 llvm/test/CodeGen/PowerPC/aix-sret-param.ll   |  8 +-
 llvm/test/CodeGen/PowerPC/emptystruct.ll      |  6 +-
 llvm/test/CodeGen/PowerPC/fsl-e500mc.ll       |  2 +-
 llvm/test/CodeGen/PowerPC/fsl-e5500.ll        |  2 +-
 llvm/test/CodeGen/PowerPC/ppc-empty-fs.ll     |  2 +-
 llvm/test/CodeGen/PowerPC/ppc440-fp-basic.ll  |  2 +-
 llvm/test/CodeGen/PowerPC/ppc64-sibcall.ll    | 12 +--
 llvm/test/CodeGen/PowerPC/ppc64-smallarg.ll   |  2 +-
 llvm/test/CodeGen/PowerPC/ppc64le-smallarg.ll |  4 +-
 llvm/test/CodeGen/PowerPC/pr17354.ll          |  4 +-
 llvm/test/CodeGen/PowerPC/pr18663.ll          |  2 +-
 .../test/CodeGen/PowerPC/resolvefi-basereg.ll |  2 +-
 llvm/test/CodeGen/PowerPC/resolvefi-disp.ll   |  2 +-
 .../CodeGen/PowerPC/tailcall-string-rvo.ll    | 10 +--
 .../CodeGen/PowerPC/toc-load-sched-bug.ll     |  4 +-
 .../PowerPC/vec_conv_fp32_to_i16_elts.ll      |  4 +-
 .../PowerPC/vec_conv_fp32_to_i64_elts.ll      | 12 +--
 .../PowerPC/vec_conv_fp64_to_i16_elts.ll      |  4 +-
 .../PowerPC/vec_conv_fp64_to_i32_elts.ll      |  8 +-
 .../PowerPC/vec_conv_fp_to_i_4byte_elts.ll    |  8 +-
 .../PowerPC/vec_conv_fp_to_i_8byte_elts.ll    | 12 +--
 .../PowerPC/vec_conv_i16_to_fp32_elts.ll      |  8 +-
 .../PowerPC/vec_conv_i16_to_fp64_elts.ll      | 12 +--
 .../PowerPC/vec_conv_i32_to_fp64_elts.ll      | 12 +--
 .../PowerPC/vec_conv_i64_to_fp32_elts.ll      |  8 +-
 .../PowerPC/vec_conv_i8_to_fp32_elts.ll       |  8 +-
 .../PowerPC/vec_conv_i8_to_fp64_elts.ll       | 12 +--
 .../PowerPC/vec_conv_i_to_fp_4byte_elts.ll    |  8 +-
 .../PowerPC/vec_conv_i_to_fp_8byte_elts.ll    | 12 +--
 ...calling-conv-ilp32-ilp32f-ilp32d-common.ll |  4 +-
 .../calling-conv-lp64-lp64f-lp64d-common.ll   |  4 +-
 llvm/test/CodeGen/RISCV/musttail-call.ll      |  6 +-
 llvm/test/CodeGen/RISCV/tail-calls.ll         |  6 +-
 llvm/test/CodeGen/SPARC/2011-01-22-SRet.ll    |  4 +-
 llvm/test/CodeGen/SPARC/cast-sret-func.ll     |  2 +-
 llvm/test/CodeGen/SPARC/fp128.ll              | 14 ++--
 llvm/test/CodeGen/SPARC/missing-sret.ll       |  4 +-
 llvm/test/CodeGen/SPARC/sret-secondary.ll     |  2 +-
 llvm/test/CodeGen/SystemZ/swifterror.ll       |  4 +-
 .../Thumb2/2009-08-04-SubregLoweringBug.ll    |  2 +-
 llvm/test/CodeGen/Thumb2/constant-islands.ll  | 84 +++++++++----------
 llvm/test/CodeGen/VE/Scalar/callstruct.ll     |  4 +-
 .../CodeGen/WebAssembly/add-prototypes.ll     |  6 +-
 .../CodeGen/WebAssembly/indirect-import.ll    |  2 +-
 llvm/test/CodeGen/X86/2006-11-12-CSRetCC.ll   |  4 +-
 .../CodeGen/X86/2008-02-06-LoadFoldingBug.ll  |  6 +-
 .../CodeGen/X86/2008-04-17-CoalescerBug.ll    | 10 +--
 .../CodeGen/X86/2009-01-13-DoubleUpdate.ll    |  2 +-
 .../test/CodeGen/X86/2009-02-12-SpillerBug.ll |  2 +-
 .../CodeGen/X86/2010-04-21-CoalescerBug.ll    |  2 +-
 llvm/test/CodeGen/X86/2012-01-11-split-cv.ll  |  2 +-
 .../X86/StackColoring-use-between-allocas.mir |  4 +-
 llvm/test/CodeGen/X86/addcarry.ll             |  8 +-
 llvm/test/CodeGen/X86/arg-copy-elide.ll       |  2 +-
 llvm/test/CodeGen/X86/atom-fixup-lea2.ll      |  4 +-
 llvm/test/CodeGen/X86/avoid-sfb.ll            |  2 +-
 llvm/test/CodeGen/X86/avx512vl-arith.ll       |  0
 llvm/test/CodeGen/X86/complex-fca.ll          |  6 +-
 .../X86/dagcombine-tokenfactor-limit-crash.ll |  2 +-
 llvm/test/CodeGen/X86/fast-isel-x86-64.ll     |  6 +-
 llvm/test/CodeGen/X86/fast-isel-x86.ll        | 10 +--
 llvm/test/CodeGen/X86/fastcc-sret.ll          |  4 +-
 llvm/test/CodeGen/X86/fp128-i128.ll           |  2 +-
 llvm/test/CodeGen/X86/inalloca-invoke.ll      | 10 +--
 llvm/test/CodeGen/X86/inreg.ll                |  6 +-
 llvm/test/CodeGen/X86/movtopush.ll            |  2 +-
 llvm/test/CodeGen/X86/musttail-indirect.ll    |  4 +-
 llvm/test/CodeGen/X86/noreturn-call-linux.ll  |  8 +-
 llvm/test/CodeGen/X86/noreturn-call.ll        |  8 +-
 llvm/test/CodeGen/X86/pr38865-2.ll            |  4 +-
 llvm/test/CodeGen/X86/scev-interchange.ll     | 12 +--
 llvm/test/CodeGen/X86/sibcall.ll              | 54 ++++++------
 llvm/test/CodeGen/X86/sret-implicit.ll        |  2 +-
 llvm/test/CodeGen/X86/subcarry.ll             |  4 +-
 llvm/test/CodeGen/X86/swift-return.ll         |  2 +-
 llvm/test/CodeGen/X86/swifterror.ll           |  4 +-
 llvm/test/CodeGen/X86/vectorcall.ll           |  2 +-
 llvm/test/CodeGen/X86/widen_load-2.ll         | 22 ++---
 llvm/test/CodeGen/X86/win32_sret.ll           | 20 ++---
 llvm/test/CodeGen/X86/win64_vararg.ll         |  2 +-
 llvm/test/CodeGen/X86/x86-64-sret-return-2.ll |  2 +-
 llvm/test/CodeGen/X86/x86-64-sret-return.ll   |  4 +-
 .../DebugInfo/ARM/selectiondag-deadcode.ll    |  2 +-
 .../DebugInfo/COFF/class-options-common.ll    | 16 ++--
 llvm/test/DebugInfo/COFF/function-options.ll  | 12 +--
 llvm/test/DebugInfo/COFF/nrvo.ll              |  4 +-
 .../DebugInfo/Generic/2010-10-01-crash.ll     |  2 +-
 llvm/test/DebugInfo/X86/dbg-declare-arg.ll    |  2 +-
 llvm/test/DebugInfo/X86/dbg_value_direct.ll   |  2 +-
 llvm/test/DebugInfo/X86/parameters.ll         |  2 +-
 .../test/DebugInfo/X86/spill-indirect-nrvo.ll |  2 +-
 llvm/test/DebugInfo/X86/sret.ll               |  6 +-
 llvm/test/Feature/callingconventions.ll       |  4 +-
 llvm/test/Linker/func-attrs-a.ll              |  6 +-
 llvm/test/Linker/func-attrs-b.ll              |  2 +-
 llvm/test/Other/lint.ll                       |  2 +-
 .../test/Transforms/ArgumentPromotion/sret.ll |  4 +-
 .../DeadArgElim/2006-06-27-struct-ret.ll      |  4 +-
 .../MSSA/2011-09-06-EndOfFunction.ll          |  6 +-
 .../MSSA/combined-partial-overwrites.ll       |  8 +-
 .../2011-09-06-EndOfFunction.ll               |  6 +-
 .../combined-partial-overwrites.ll            |  4 +-
 .../EarlyCSE/getmatchingvalue-crash.ll        |  6 +-
 .../Transforms/GVN/2009-03-10-PREOnVoid.ll    |  2 +-
 .../GlobalOpt/2006-07-07-InlineAsmCrash.ll    |  2 +-
 .../IndVarSimplify/interesting-invoke-use.ll  |  4 +-
 .../Inline/2009-05-07-CallUsingSelfCrash.ll   |  2 +-
 .../InstCombine/2007-05-18-CastFoldBug.ll     |  2 +-
 .../test/Transforms/InstCombine/align-addr.ll |  2 +-
 .../Transforms/InstCombine/call-cast-attrs.ll |  8 +-
 .../InstCombine/object-size-opaque.ll         |  2 +-
 .../InstMerge/st_sink_debuginvariant.ll       |  2 +-
 .../Transforms/JumpThreading/ddt-crash2.ll    |  2 +-
 .../Transforms/LoopUnswitch/2007-08-01-Dom.ll |  2 +-
 .../MemCpyOpt/2008-02-24-MultipleUseofSRet.ll |  6 +-
 .../2011-06-02-CallSlotOverwritten.ll         |  6 +-
 .../Transforms/MemCpyOpt/loadstore-sret.ll    |  8 +-
 .../memcpy-to-memset-with-lifetimes.ll        |  4 +-
 .../test/Transforms/MemCpyOpt/memcpy-undef.ll |  4 +-
 llvm/test/Transforms/MemCpyOpt/memcpy.ll      | 20 ++---
 llvm/test/Transforms/MemCpyOpt/sret.ll        |  6 +-
 .../MergeFunc/apply_function_attributes.ll    | 10 +--
 .../Transforms/MetaRenamer/metarenamer.ll     |  2 +-
 .../Transforms/NewGVN/2009-03-10-PREOnVoid.ll |  2 +-
 llvm/test/Transforms/ObjCARC/path-overflow.ll |  2 +-
 .../Transforms/PGOProfile/icp_vararg_sret.ll  |  2 +-
 .../inlining-alignment-assumptions.ll         |  4 +-
 .../instcombine-sroa-inttoptr.ll              |  6 +-
 .../test/Transforms/SLPVectorizer/ARM/sroa.ll |  2 +-
 llvm/test/Transforms/SROA/dead-inst.ll        |  4 +-
 .../SimpleLoopUnswitch/2007-08-01-Dom.ll      |  2 +-
 llvm/test/Transforms/TailCallElim/basic.ll    |  2 +-
 llvm/test/Verifier/2008-01-11-VarargAttrs.ll  |  4 +-
 llvm/test/Verifier/amdgpu-cc.ll               |  4 +-
 llvm/test/Verifier/byref.ll                   |  2 +-
 llvm/test/Verifier/inalloca1.ll               |  2 +-
 llvm/test/Verifier/musttail-invalid.ll        |  4 +-
 llvm/test/Verifier/sret.ll                    |  4 +-
 llvm/test/Verifier/statepoint.ll              |  6 +-
 199 files changed, 533 insertions(+), 533 deletions(-)
 mode change 100755 => 100644 llvm/test/CodeGen/X86/avx512vl-arith.ll

diff --git a/llvm/test/Analysis/Lint/noalias-byval.ll b/llvm/test/Analysis/Lint/noalias-byval.ll
index b6cb23047c31..adbcafd835f6 100644
--- a/llvm/test/Analysis/Lint/noalias-byval.ll
+++ b/llvm/test/Analysis/Lint/noalias-byval.ll
@@ -17,14 +17,14 @@ entry:
   %0 = bitcast %s* %c to i8*
   %1 = bitcast %s* %tmp to i8*
   call void @llvm.memset.p0i8.i32(i8* %0, i8 0, i32 1, i1 false)
-  call void @f1(%s* sret %c, %s* %c)
+  call void @f1(%s* sret(%s) %c, %s* %c)
   ret void
 }
 
 ; Lint should complain about us passing %c to both arguments since one of them
 ; is noalias.
 ; CHECK: Unusual: noalias argument aliases another argument
-; CHECK-NEXT: call void @f1(%s* sret %c, %s* %c)
+; CHECK-NEXT: call void @f1(%s* sret(%s) %c, %s* %c)
 
 declare void @f3(%s* noalias nocapture sret, %s* byval(%s) nocapture readnone)
 
@@ -35,7 +35,7 @@ entry:
   %0 = bitcast %s* %c to i8*
   %1 = bitcast %s* %tmp to i8*
   call void @llvm.memset.p0i8.i32(i8* %0, i8 0, i32 1, i1 false)
-  call void @f3(%s* sret %c, %s* byval(%s) %c)
+  call void @f3(%s* sret(%s) %c, %s* byval(%s) %c)
   ret void
 }
 
@@ -43,6 +43,6 @@ entry:
 ; noalias, since the other one is byval, effectively copying the data to the
 ; stack instead of passing the pointer itself.
 ; CHECK-NOT: Unusual: noalias argument aliases another argument
-; CHECK-NOT: call void @f3(%s* sret %c, %s* byval(%s) %c)
+; CHECK-NOT: call void @f3(%s* sret(%s) %c, %s* byval(%s) %c)
 
 attributes #0 = { argmemonly nounwind }
diff --git a/llvm/test/Analysis/ValueTracking/memory-dereferenceable.ll b/llvm/test/Analysis/ValueTracking/memory-dereferenceable.ll
index 680143898c96..d158426404ec 100644
--- a/llvm/test/Analysis/ValueTracking/memory-dereferenceable.ll
+++ b/llvm/test/Analysis/ValueTracking/memory-dereferenceable.ll
@@ -20,7 +20,7 @@ declare i32* @foo()
 @globalptr.align16 = external global i8, align 16
 
 ; CHECK-LABEL: 'test'
-define void @test(%struct.A* sret %result,
+define void @test(%struct.A* sret(%struct.A) %result,
                   i32 addrspace(1)* dereferenceable(8) %dparam,
                   i8 addrspace(1)* dereferenceable(32) align 1 %dparam.align1,
                   i8 addrspace(1)* dereferenceable(32) align 16 %dparam.align16,
diff --git a/llvm/test/Assembler/invalid-immarg.ll b/llvm/test/Assembler/invalid-immarg.ll
index 72dc99dc8262..f2203d2609fd 100644
--- a/llvm/test/Assembler/invalid-immarg.ll
+++ b/llvm/test/Assembler/invalid-immarg.ll
@@ -13,7 +13,7 @@ declare void @llvm.immarg.inreg(i32 inreg immarg)
 declare void @llvm.immarg.nest(i32* nest immarg)
 
 ; CHECK: Attribute 'immarg' is incompatible with other attributes
-declare void @llvm.immarg.sret(i32* sret immarg)
+declare void @llvm.immarg.sret(i32* sret(i32) immarg)
 
 ; CHECK: Attribute 'immarg' is incompatible with other attributes
 declare void @llvm.immarg.zeroext(i32 zeroext immarg)
diff --git a/llvm/test/Bitcode/DIExpression-aggresult.ll b/llvm/test/Bitcode/DIExpression-aggresult.ll
index 27298710adbc..0b89454aa2f9 100644
--- a/llvm/test/Bitcode/DIExpression-aggresult.ll
+++ b/llvm/test/Bitcode/DIExpression-aggresult.ll
@@ -1,7 +1,7 @@
 ; RUN: llvm-dis -o - %s.bc | FileCheck %s
 %class.A = type { i32, i32, i32, i32 }
 
-define void @_Z3fooi(%class.A* sret %agg.result) #0 !dbg !3 {
+define void @_Z3fooi(%class.A* sret(%class.A) %agg.result) #0 !dbg !3 {
   ; CHECK: call void @llvm.dbg.declare({{.*}}, metadata !DIExpression()), !dbg
   call void @llvm.dbg.declare(metadata %class.A* %agg.result, metadata !13, metadata !16), !dbg !17
   ret void, !dbg !17
diff --git a/llvm/test/Bitcode/attributes-3.3.ll b/llvm/test/Bitcode/attributes-3.3.ll
index eecdfd30485a..72a898288016 100644
--- a/llvm/test/Bitcode/attributes-3.3.ll
+++ b/llvm/test/Bitcode/attributes-3.3.ll
@@ -29,7 +29,7 @@ define void @f4(i8 inreg %0)
         ret void;
 }
 
-define void @f5(i8* sret %0)
+define void @f5(i8* sret(i8) %0)
 ; CHECK: define void @f5(i8* sret(i8) %0)
 {
         ret void;
diff --git a/llvm/test/Bitcode/attributes.ll b/llvm/test/Bitcode/attributes.ll
index 1739f5109a15..baafc70cf40b 100644
--- a/llvm/test/Bitcode/attributes.ll
+++ b/llvm/test/Bitcode/attributes.ll
@@ -26,7 +26,7 @@ define void @f4(i8 inreg %0)
         ret void;
 }
 
-define void @f5(i8* sret %0)
+define void @f5(i8* sret(i8) %0)
 ; CHECK: define void @f5(i8* sret(i8) %0)
 {
         ret void;
diff --git a/llvm/test/Bitcode/compatibility-3.6.ll b/llvm/test/Bitcode/compatibility-3.6.ll
index 97ba84656f0d..05e6b71f1477 100644
--- a/llvm/test/Bitcode/compatibility-3.6.ll
+++ b/llvm/test/Bitcode/compatibility-3.6.ll
@@ -407,7 +407,7 @@ declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
 ; CHECK: declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
 declare void @f.param.inalloca(i8* inalloca)
 ; CHECK: declare void @f.param.inalloca(i8* inalloca)
-declare void @f.param.sret(i8* sret)
+declare void @f.param.sret(i8* sret(i8))
 ; CHECK: declare void @f.param.sret(i8* sret(i8))
 declare void @f.param.noalias(i8* noalias)
 ; CHECK: declare void @f.param.noalias(i8* noalias)
diff --git a/llvm/test/Bitcode/compatibility-3.7.ll b/llvm/test/Bitcode/compatibility-3.7.ll
index e3fbe4896a7e..b31509ec0a86 100644
--- a/llvm/test/Bitcode/compatibility-3.7.ll
+++ b/llvm/test/Bitcode/compatibility-3.7.ll
@@ -413,7 +413,7 @@ declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
 ; CHECK: declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
 declare void @f.param.inalloca(i8* inalloca)
 ; CHECK: declare void @f.param.inalloca(i8* inalloca)
-declare void @f.param.sret(i8* sret)
+declare void @f.param.sret(i8* sret(i8))
 ; CHECK: declare void @f.param.sret(i8* sret(i8))
 declare void @f.param.noalias(i8* noalias)
 ; CHECK: declare void @f.param.noalias(i8* noalias)
diff --git a/llvm/test/Bitcode/compatibility-3.8.ll b/llvm/test/Bitcode/compatibility-3.8.ll
index 225d48b06cf2..72b01f6a1d98 100644
--- a/llvm/test/Bitcode/compatibility-3.8.ll
+++ b/llvm/test/Bitcode/compatibility-3.8.ll
@@ -438,7 +438,7 @@ declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
 ; CHECK: declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
 declare void @f.param.inalloca(i8* inalloca)
 ; CHECK: declare void @f.param.inalloca(i8* inalloca)
-declare void @f.param.sret(i8* sret)
+declare void @f.param.sret(i8* sret(i8))
 ; CHECK: declare void @f.param.sret(i8* sret(i8))
 declare void @f.param.noalias(i8* noalias)
 ; CHECK: declare void @f.param.noalias(i8* noalias)
diff --git a/llvm/test/Bitcode/compatibility-3.9.ll b/llvm/test/Bitcode/compatibility-3.9.ll
index 50116144e773..f5b409ab2578 100644
--- a/llvm/test/Bitcode/compatibility-3.9.ll
+++ b/llvm/test/Bitcode/compatibility-3.9.ll
@@ -507,7 +507,7 @@ declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
 ; CHECK: declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
 declare void @f.param.inalloca(i8* inalloca)
 ; CHECK: declare void @f.param.inalloca(i8* inalloca)
-declare void @f.param.sret(i8* sret)
+declare void @f.param.sret(i8* sret(i8))
 ; CHECK: declare void @f.param.sret(i8* sret(i8))
 declare void @f.param.noalias(i8* noalias)
 ; CHECK: declare void @f.param.noalias(i8* noalias)
diff --git a/llvm/test/Bitcode/compatibility-4.0.ll b/llvm/test/Bitcode/compatibility-4.0.ll
index b005fb7062b9..c7874106d2b9 100644
--- a/llvm/test/Bitcode/compatibility-4.0.ll
+++ b/llvm/test/Bitcode/compatibility-4.0.ll
@@ -507,7 +507,7 @@ declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
 ; CHECK: declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
 declare void @f.param.inalloca(i8* inalloca)
 ; CHECK: declare void @f.param.inalloca(i8* inalloca)
-declare void @f.param.sret(i8* sret)
+declare void @f.param.sret(i8* sret(i8))
 ; CHECK: declare void @f.param.sret(i8* sret(i8))
 declare void @f.param.noalias(i8* noalias)
 ; CHECK: declare void @f.param.noalias(i8* noalias)
diff --git a/llvm/test/Bitcode/compatibility-5.0.ll b/llvm/test/Bitcode/compatibility-5.0.ll
index 0cad1b00d5ff..e63ff3a7cc06 100644
--- a/llvm/test/Bitcode/compatibility-5.0.ll
+++ b/llvm/test/Bitcode/compatibility-5.0.ll
@@ -511,7 +511,7 @@ declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
 ; CHECK: declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
 declare void @f.param.inalloca(i8* inalloca)
 ; CHECK: declare void @f.param.inalloca(i8* inalloca)
-declare void @f.param.sret(i8* sret)
+declare void @f.param.sret(i8* sret(i8))
 ; CHECK: declare void @f.param.sret(i8* sret(i8))
 declare void @f.param.noalias(i8* noalias)
 ; CHECK: declare void @f.param.noalias(i8* noalias)
diff --git a/llvm/test/Bitcode/compatibility-6.0.ll b/llvm/test/Bitcode/compatibility-6.0.ll
index 69e38642814f..6018e9b2a8ca 100644
--- a/llvm/test/Bitcode/compatibility-6.0.ll
+++ b/llvm/test/Bitcode/compatibility-6.0.ll
@@ -518,7 +518,7 @@ declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
 ; CHECK: declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
 declare void @f.param.inalloca(i8* inalloca)
 ; CHECK: declare void @f.param.inalloca(i8* inalloca)
-declare void @f.param.sret(i8* sret)
+declare void @f.param.sret(i8* sret(i8))
 ; CHECK: declare void @f.param.sret(i8* sret(i8))
 declare void @f.param.noalias(i8* noalias)
 ; CHECK: declare void @f.param.noalias(i8* noalias)
diff --git a/llvm/test/Bitcode/compatibility.ll b/llvm/test/Bitcode/compatibility.ll
index b7f9f357914f..73d7dc73a26e 100644
--- a/llvm/test/Bitcode/compatibility.ll
+++ b/llvm/test/Bitcode/compatibility.ll
@@ -534,7 +534,7 @@ declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
 ; CHECK: declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
 declare void @f.param.inalloca(i8* inalloca)
 ; CHECK: declare void @f.param.inalloca(i8* inalloca)
-declare void @f.param.sret(i8* sret)
+declare void @f.param.sret(i8* sret(i8))
 ; CHECK: declare void @f.param.sret(i8* sret(i8))
 declare void @f.param.noalias(i8* noalias)
 ; CHECK: declare void @f.param.noalias(i8* noalias)
diff --git a/llvm/test/Bitcode/highLevelStructure.3.2.ll b/llvm/test/Bitcode/highLevelStructure.3.2.ll
index 6920ddb26f69..84c5a8ecda6d 100644
--- a/llvm/test/Bitcode/highLevelStructure.3.2.ll
+++ b/llvm/test/Bitcode/highLevelStructure.3.2.ll
@@ -36,7 +36,7 @@ declare void @ParamAttr1(i8 zeroext)
 ; CHECK: declare void @ParamAttr2(i8* nest)
 declare void @ParamAttr2(i8* nest)
 ; CHECK: declare void @ParamAttr3(i8* sret(i8))
-declare void @ParamAttr3(i8* sret)
+declare void @ParamAttr3(i8* sret(i8))
 ; CHECK: declare void @ParamAttr4(i8 signext)
 declare void @ParamAttr4(i8 signext)
 ; CHECK: declare void @ParamAttr5(i8* inreg)
@@ -49,8 +49,8 @@ declare void @ParamAttr7(i8* noalias)
 declare void @ParamAttr8(i8* nocapture)
 ; CHECK: declare void @ParamAttr9{{[(i8* nest noalias nocapture) | (i8* noalias nocapture nest)]}}
 declare void @ParamAttr9(i8* nest noalias nocapture)
-; CHECK: declare void @ParamAttr10{{[(i8* sret noalias nocapture) | (i8* noalias nocapture sret)]}}
-declare void @ParamAttr10(i8* sret noalias nocapture)
+; CHECK: declare void @ParamAttr10{{[(i8* sret(i8) noalias nocapture) | (i8* noalias nocapture sret(i8))]}}
+declare void @ParamAttr10(i8* sret(i8) noalias nocapture)
 ;CHECK: declare void @ParamAttr11{{[(i8* byval(i8) noalias nocapture) | (i8* noalias nocapture byval(i8))]}}
 declare void @ParamAttr11(i8* byval(i8) noalias nocapture)
 ;CHECK: declare void @ParamAttr12{{[(i8* inreg noalias nocapture) | (i8* noalias nocapture inreg)]}}
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll b/llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll
index a9a93d1b7f7a..5a1ce24bf025 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll
@@ -2,10 +2,10 @@
 ; RUN: llc < %s -mtriple arm64-apple-darwin -global-isel -stop-after=irtranslator -verify-machineinstrs | FileCheck %s
 
 ; Check that we don't try to tail-call with a non-forwarded sret parameter.
-declare void @test_explicit_sret(i64* sret)
+declare void @test_explicit_sret(i64* sret(i64))
 
 ; Forwarded explicit sret pointer => we can tail call.
-define void @can_tail_call_forwarded_explicit_sret_ptr(i64* sret %arg) {
+define void @can_tail_call_forwarded_explicit_sret_ptr(i64* sret(i64) %arg) {
   ; CHECK-LABEL: name: can_tail_call_forwarded_explicit_sret_ptr
   ; CHECK: bb.1 (%ir-block.0):
   ; CHECK:   liveins: $x8
@@ -17,7 +17,7 @@ define void @can_tail_call_forwarded_explicit_sret_ptr(i64* sret %arg) {
 }
 
 ; Not marked as tail, so don't tail call.
-define void @test_call_explicit_sret(i64* sret %arg) {
+define void @test_call_explicit_sret(i64* sret(i64) %arg) {
   ; CHECK-LABEL: name: test_call_explicit_sret
   ; CHECK: bb.1 (%ir-block.0):
   ; CHECK:   liveins: $x8
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll b/llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll
index cbfadbdb5d72..678a9ece6fea 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll
@@ -159,7 +159,7 @@ bb_end:
 
 ; "foo_sret" is a function that takes a swifterror parameter, it also has a sret
 ; parameter.
-define void @foo_sret(%struct.S* sret %agg.result, i32 %val1, %swift_error** swifterror %error_ptr_ref) {
+define void @foo_sret(%struct.S* sret(%struct.S) %agg.result, i32 %val1, %swift_error** swifterror %error_ptr_ref) {
 ; CHECK-LABEL: foo_sret:
 ; CHECK: mov [[SRET:x[0-9]+]], x8
 ; CHECK: mov w0, #16
@@ -198,7 +198,7 @@ entry:
   %s = alloca %struct.S, align 8
   %error_ptr_ref = alloca swifterror %swift_error*
   store %swift_error* null, %swift_error** %error_ptr_ref
-  call void @foo_sret(%struct.S* sret %s, i32 1, %swift_error** swifterror %error_ptr_ref)
+  call void @foo_sret(%struct.S* sret(%struct.S) %s, i32 1, %swift_error** swifterror %error_ptr_ref)
   %error_from_foo = load %swift_error*, %swift_error** %error_ptr_ref
   %had_error_from_foo = icmp ne %swift_error* %error_from_foo, null
   %tmp = bitcast %swift_error* %error_from_foo to i8*
diff --git a/llvm/test/CodeGen/AArch64/arm64-alloc-no-stack-realign.ll b/llvm/test/CodeGen/AArch64/arm64-alloc-no-stack-realign.ll
index 71bf2039eaa1..1ea61a8ac71b 100644
--- a/llvm/test/CodeGen/AArch64/arm64-alloc-no-stack-realign.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-alloc-no-stack-realign.ll
@@ -5,7 +5,7 @@
 ; aligned.
 @T3_retval = common global <16 x float> zeroinitializer, align 16
 
-define void @test(<16 x float>* noalias sret %agg.result) nounwind ssp {
+define void @test(<16 x float>* noalias sret(<16 x float>) %agg.result) nounwind ssp {
 entry:
 ; CHECK: test
 ; CHECK: stp [[Q1:q[0-9]+]], [[Q2:q[0-9]+]], [sp, #32]
diff --git a/llvm/test/CodeGen/AArch64/arm64-windows-calls.ll b/llvm/test/CodeGen/AArch64/arm64-windows-calls.ll
index bbdc594eca95..1fee2246b751 100644
--- a/llvm/test/CodeGen/AArch64/arm64-windows-calls.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-windows-calls.ll
@@ -51,7 +51,7 @@ entry:
 
 ; Arguments > 16 bytes should be passed in X8.
 %struct.S3 = type { i32, i32, i32, i32, i32 }
-define dso_local void @"?f3"(%struct.S3* noalias sret %agg.result) {
+define dso_local void @"?f3"(%struct.S3* noalias sret(%struct.S3) %agg.result) {
 entry:
 ; CHECK-LABEL: f3
 ; CHECK: stp xzr, xzr, [x8]
@@ -73,7 +73,7 @@ entry:
 ; InReg arguments to non-instance methods must be passed in X0 and returns in
 ; X0.
 %class.B = type { i32 }
-define dso_local void @"?f4"(%class.B* inreg noalias nocapture sret %agg.result) {
+define dso_local void @"?f4"(%class.B* inreg noalias nocapture sret(%class.B) %agg.result) {
 entry:
 ; CHECK-LABEL: f4
 ; CHECK: mov w8, #1
@@ -87,7 +87,7 @@ entry:
 %class.C = type { i8 }
 %class.A = type { i8 }
 
-define dso_local void @"?inst@C"(%class.C* %this, %class.A* inreg noalias sret %agg.result) {
+define dso_local void @"?inst@C"(%class.C* %this, %class.A* inreg noalias sret(%class.A) %agg.result) {
 entry:
 ; CHECK-LABEL: inst@C
 ; CHECK: str x0, [sp, #8]
diff --git a/llvm/test/CodeGen/AArch64/arm64-windows-tailcall.ll b/llvm/test/CodeGen/AArch64/arm64-windows-tailcall.ll
index 4198e10a9a13..9694994386c7 100644
--- a/llvm/test/CodeGen/AArch64/arm64-windows-tailcall.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-windows-tailcall.ll
@@ -4,7 +4,7 @@
 
 %class.C = type { [1 x i32] }
 
-define dso_local void @"?bar"(%class.C* inreg noalias sret %agg.result) {
+define dso_local void @"?bar"(%class.C* inreg noalias sret(%class.C) %agg.result) {
 entry:
 ; CHECK-LABEL: bar
 ; CHECK: mov x19, x0
diff --git a/llvm/test/CodeGen/AArch64/arm64_32.ll b/llvm/test/CodeGen/AArch64/arm64_32.ll
index 4e764a7c37c0..5857156587b6 100644
--- a/llvm/test/CodeGen/AArch64/arm64_32.ll
+++ b/llvm/test/CodeGen/AArch64/arm64_32.ll
@@ -422,7 +422,7 @@ define void @test_bare_frameaddr(i8** %addr) {
   ret void
 }
 
-define void @test_sret_use([8 x i64]* sret %out) {
+define void @test_sret_use([8 x i64]* sret([8 x i64]) %out) {
 ; CHECK-LABEL: test_sret_use:
 ; CHECK: str xzr, [x8]
   %addr = getelementptr [8 x i64], [8 x i64]* %out, i32 0, i32 0
@@ -435,7 +435,7 @@ define i64 @test_sret_call() {
 ; CHECK: mov x8, sp
 ; CHECK: bl _test_sret_use
   %arr = alloca [8 x i64]
-  call void @test_sret_use([8 x i64]* sret %arr)
+  call void @test_sret_use([8 x i64]* sret([8 x i64]) %arr)
 
   %addr = getelementptr [8 x i64], [8 x i64]* %arr, i32 0, i32 0
   %val = load i64, i64* %addr
diff --git a/llvm/test/CodeGen/AArch64/func-argpassing.ll b/llvm/test/CodeGen/AArch64/func-argpassing.ll
index a912f71fda87..000fc7d9ca35 100644
--- a/llvm/test/CodeGen/AArch64/func-argpassing.ll
+++ b/llvm/test/CodeGen/AArch64/func-argpassing.ll
@@ -106,7 +106,7 @@ define [2 x i64] @return_struct() {
 ; to preserve value semantics) in x8. Strictly this only applies to
 ; structs larger than 16 bytes, but C semantics can still be provided
 ; if LLVM does it to %myStruct too. So this is the simplest check
-define void @return_large_struct(%myStruct* sret %retval) {
+define void @return_large_struct(%myStruct* sret(%myStruct) %retval) {
 ; CHECK-LABEL: return_large_struct:
     %addr0 = getelementptr %myStruct, %myStruct* %retval, i64 0, i32 0
     %addr1 = getelementptr %myStruct, %myStruct* %retval, i64 0, i32 1
diff --git a/llvm/test/CodeGen/AArch64/func-calls.ll b/llvm/test/CodeGen/AArch64/func-calls.ll
index efc8915384da..adc9996ef6d1 100644
--- a/llvm/test/CodeGen/AArch64/func-calls.ll
+++ b/llvm/test/CodeGen/AArch64/func-calls.ll
@@ -43,7 +43,7 @@ define void @simple_args() {
 declare i32 @return_int()
 declare double @return_double()
 declare [2 x i64] @return_smallstruct()
-declare void @return_large_struct(%myStruct* sret %retval)
+declare void @return_large_struct(%myStruct* sret(%myStruct) %retval)
 
 define void @simple_rets() {
 ; CHECK-LABEL: simple_rets:
@@ -65,7 +65,7 @@ define void @simple_rets() {
 ; CHECK: add x[[VARSMALLSTRUCT:[0-9]+]], {{x[0-9]+}}, :lo12:varsmallstruct
 ; CHECK: stp x0, x1, [x[[VARSMALLSTRUCT]]]
 
-  call void @return_large_struct(%myStruct* sret @varstruct)
+  call void @return_large_struct(%myStruct* sret(%myStruct) @varstruct)
 ; CHECK: add x8, {{x[0-9]+}}, {{#?}}:lo12:varstruct
 ; CHECK: bl return_large_struct
 
diff --git a/llvm/test/CodeGen/AArch64/swifterror.ll b/llvm/test/CodeGen/AArch64/swifterror.ll
index e219ef770f93..d6f4e9518c91 100644
--- a/llvm/test/CodeGen/AArch64/swifterror.ll
+++ b/llvm/test/CodeGen/AArch64/swifterror.ll
@@ -243,7 +243,7 @@ bb_end:
 
 ; "foo_sret" is a function that takes a swifterror parameter, it also has a sret
 ; parameter.
-define void @foo_sret(%struct.S* sret %agg.result, i32 %val1, %swift_error** swifterror %error_ptr_ref) {
+define void @foo_sret(%struct.S* sret(%struct.S) %agg.result, i32 %val1, %swift_error** swifterror %error_ptr_ref) {
 ; CHECK-APPLE-LABEL: foo_sret:
 ; CHECK-APPLE: mov [[SRET:x[0-9]+]], x8
 ; CHECK-APPLE: mov w0, #16
@@ -309,7 +309,7 @@ entry:
   %s = alloca %struct.S, align 8
   %error_ptr_ref = alloca swifterror %swift_error*
   store %swift_error* null, %swift_error** %error_ptr_ref
-  call void @foo_sret(%struct.S* sret %s, i32 1, %swift_error** swifterror %error_ptr_ref)
+  call void @foo_sret(%struct.S* sret(%struct.S) %s, i32 1, %swift_error** swifterror %error_ptr_ref)
   %error_from_foo = load %swift_error*, %swift_error** %error_ptr_ref
   %had_error_from_foo = icmp ne %swift_error* %error_from_foo, null
   %tmp = bitcast %swift_error* %error_from_foo to i8*
diff --git a/llvm/test/CodeGen/AArch64/tailcall-explicit-sret.ll b/llvm/test/CodeGen/AArch64/tailcall-explicit-sret.ll
index b60958b5a25d..f1eb8d82b54f 100644
--- a/llvm/test/CodeGen/AArch64/tailcall-explicit-sret.ll
+++ b/llvm/test/CodeGen/AArch64/tailcall-explicit-sret.ll
@@ -4,13 +4,13 @@
 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
 
 ; Check that we don't try to tail-call with a non-forwarded sret parameter.
-declare void @test_explicit_sret(i1024* sret) #0
+declare void @test_explicit_sret(i1024* sret(i1024)) #0
 
 ; This is the only OK case, where we forward the explicit sret pointer.
 
 ; CHECK-LABEL: _test_tailcall_explicit_sret:
 ; CHECK-NEXT: b _test_explicit_sret
-define void @test_tailcall_explicit_sret(i1024* sret %arg) #0 {
+define void @test_tailcall_explicit_sret(i1024* sret(i1024) %arg) #0 {
   tail call void @test_explicit_sret(i1024* %arg)
   ret void
 }
@@ -19,7 +19,7 @@ define void @test_tailcall_explicit_sret(i1024* sret %arg) #0 {
 ; CHECK-NOT: mov  x8
 ; CHECK: bl _test_explicit_sret
 ; CHECK: ret
-define void @test_call_explicit_sret(i1024* sret %arg) #0 {
+define void @test_call_explicit_sret(i1024* sret(i1024) %arg) #0 {
   call void @test_explicit_sret(i1024* %arg)
   ret void
 }
@@ -82,7 +82,7 @@ define i1024 @test_tailcall_explicit_sret_alloca_returned() #0 {
 ; CHECK: ldr [[CALLERSRET1:q[0-9]+]], [sp]
 ; CHECK: str [[CALLERSRET1:q[0-9]+]], [x[[CALLERX8NUM]]]
 ; CHECK: ret
-define void @test_indirect_tailcall_explicit_sret_nosret_arg(i1024* sret %arg, void (i1024*)* %f) #0 {
+define void @test_indirect_tailcall_explicit_sret_nosret_arg(i1024* sret(i1024) %arg, void (i1024*)* %f) #0 {
   %l = alloca i1024, align 8
   tail call void %f(i1024* %l)
   %r = load i1024, i1024* %l, align 8
@@ -97,7 +97,7 @@ define void @test_indirect_tailcall_explicit_sret_nosret_arg(i1024* sret %arg, v
 ; CHECK: ldr [[CALLERSRET1:q[0-9]+]], [sp]
 ; CHECK: str [[CALLERSRET1:q[0-9]+]], [x[[CALLERX8NUM]]]
 ; CHECK: ret
-define void @test_indirect_tailcall_explicit_sret_(i1024* sret %arg, i1024 ()* %f) #0 {
+define void @test_indirect_tailcall_explicit_sret_(i1024* sret(i1024) %arg, i1024 ()* %f) #0 {
   %ret = tail call i1024 %f()
   store i1024 %ret, i1024* %arg, align 8
   ret void
diff --git a/llvm/test/CodeGen/AArch64/tailcall-string-rvo.ll b/llvm/test/CodeGen/AArch64/tailcall-string-rvo.ll
index ac9ce4d10df9..49ac1681e67a 100644
--- a/llvm/test/CodeGen/AArch64/tailcall-string-rvo.ll
+++ b/llvm/test/CodeGen/AArch64/tailcall-string-rvo.ll
@@ -17,15 +17,15 @@ target triple = "aarch64-linux-gnu"
 %"struct.__gnu_cxx::__vstring_utility<char, std::char_traits<char>, std::allocator<char> >::_Alloc_hider.7.38.69" = type { i8* }
 %union.anon.8.39.70 = type { i64, [8 x i8] }
 
-declare void @TestBaz(%class.basic_string.11.42.73* noalias sret %arg)
+declare void @TestBaz(%class.basic_string.11.42.73* noalias sret(%class.basic_string.11.42.73) %arg)
 
-define void @TestBar(%class.basic_string.11.42.73* noalias sret %arg) {
+define void @TestBar(%class.basic_string.11.42.73* noalias sret(%class.basic_string.11.42.73) %arg) {
 bb:
-  call void @TestBaz(%class.basic_string.11.42.73* noalias sret %arg)
+  call void @TestBaz(%class.basic_string.11.42.73* noalias sret(%class.basic_string.11.42.73) %arg)
   ret void
 }
 
-define void @TestFoo(%class.basic_string.11.42.73* noalias sret %arg) {
+define void @TestFoo(%class.basic_string.11.42.73* noalias sret(%class.basic_string.11.42.73) %arg) {
 ; CHECK-LABEL: TestFoo:
 ; CHECK: b TestBar
 bb:
@@ -38,7 +38,7 @@ bb:
   store i64 13, i64* %tmp3, align 8
   %tmp4 = getelementptr inbounds %class.basic_string.11.42.73, %class.basic_string.11.42.73* %arg, i64 0, i32 0, i32 0, i32 2, i32 1, i64 5
   store i8 0, i8* %tmp4, align 1
-  tail call void @TestBar(%class.basic_string.11.42.73* noalias sret %arg)
+  tail call void @TestBar(%class.basic_string.11.42.73* noalias sret(%class.basic_string.11.42.73) %arg)
   ret void
 }
 
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
index fa569b941c93..b340be5ac2c8 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
@@ -1141,7 +1141,7 @@ define {i8, i32} @struct_i8_i32_func_void() #0 {
   ret { i8, i32 } %val
 }
 
-define void @void_func_sret_struct_i8_i32({ i8, i32 } addrspace(5)* sret %arg0) #0 {
+define void @void_func_sret_struct_i8_i32({ i8, i32 } addrspace(5)* sret({ i8, i32 }) %arg0) #0 {
   ; CHECK-LABEL: name: void_func_sret_struct_i8_i32
   ; CHECK: bb.1 (%ir-block.0):
   ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
@@ -1302,7 +1302,7 @@ define { <3 x float>, i32 } @v3f32_struct_func_void_wasted_reg() #0 {
   ret { <3 x float>, i32 } %insert.4
 }
 
-define void @void_func_sret_max_known_zero_bits(i8 addrspace(5)* sret %arg0) #0 {
+define void @void_func_sret_max_known_zero_bits(i8 addrspace(5)* sret(i8) %arg0) #0 {
   ; CHECK-LABEL: name: void_func_sret_max_known_zero_bits
   ; CHECK: bb.1 (%ir-block.0):
   ; CHECK:   liveins: $vgpr0, $sgpr30_sgpr31
diff --git a/llvm/test/CodeGen/AMDGPU/function-returns.ll b/llvm/test/CodeGen/AMDGPU/function-returns.ll
index 9c8499637948..04dc4a2ba628 100644
--- a/llvm/test/CodeGen/AMDGPU/function-returns.ll
+++ b/llvm/test/CodeGen/AMDGPU/function-returns.ll
@@ -459,7 +459,7 @@ define {i8, i32} @struct_i8_i32_func_void() #0 {
 ; GCN: buffer_load_dword [[VAL1:v[0-9]+]]
 ; GCN: buffer_store_byte [[VAL0]], v0, s[0:3], 0 offen{{$}}
 ; GCN: buffer_store_dword [[VAL1]], v0, s[0:3], 0 offen offset:4{{$}}
-define void @void_func_sret_struct_i8_i32({ i8, i32 } addrspace(5)* sret %arg0) #0 {
+define void @void_func_sret_struct_i8_i32({ i8, i32 } addrspace(5)* sret({ i8, i32 }) %arg0) #0 {
   %val0 = load volatile i8, i8 addrspace(1)* undef
   %val1 = load volatile i32, i32 addrspace(1)* undef
   %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 0
@@ -645,7 +645,7 @@ define { <3 x float>, i32 } @v3f32_struct_func_void_wasted_reg() #0 {
 ; GCN: v_mov_b32_e32 [[HIGH_BITS:v[0-9]+]], 0
 ; GCN: ds_write_b32 {{v[0-9]+}}, [[HIGH_BITS]]
 ; GCN-NEXT: ds_write_b32 {{v[0-9]+}}, [[HIGH_BITS]]
-define void @void_func_sret_max_known_zero_bits(i8 addrspace(5)* sret %arg0) #0 {
+define void @void_func_sret_max_known_zero_bits(i8 addrspace(5)* sret(i8) %arg0) #0 {
   %arg0.int = ptrtoint i8 addrspace(5)* %arg0 to i32
 
   %lshr0 = lshr i32 %arg0.int, 16
diff --git a/llvm/test/CodeGen/AMDGPU/rewrite-out-arguments.ll b/llvm/test/CodeGen/AMDGPU/rewrite-out-arguments.ll
index 573b9757c62d..673fbb991ad1 100644
--- a/llvm/test/CodeGen/AMDGPU/rewrite-out-arguments.ll
+++ b/llvm/test/CodeGen/AMDGPU/rewrite-out-arguments.ll
@@ -108,11 +108,11 @@ define void @skip_store_gep(i32* %val) #0 {
   ret void
 }
 
-; CHECK-LABEL: define void @skip_sret(i32* sret %sret, i32* %out) #0 {
+; CHECK-LABEL: define void @skip_sret(i32* sret(i32) %sret, i32* %out) #0 {
 ; CHECK-NEXT: store
 ; CHECK-NEXT: store
 ; CHECK-NEXT: ret void
-define void @skip_sret(i32* sret %sret, i32* %out) #0 {
+define void @skip_sret(i32* sret(i32) %sret, i32* %out) #0 {
   store i32 1, i32* %sret
   store i32 0, i32* %out
   ret void
diff --git a/llvm/test/CodeGen/ARM/2009-07-18-RewriterBug.ll b/llvm/test/CodeGen/ARM/2009-07-18-RewriterBug.ll
index 9eae0d75e872..5fc3f6e80c36 100644
--- a/llvm/test/CodeGen/ARM/2009-07-18-RewriterBug.ll
+++ b/llvm/test/CodeGen/ARM/2009-07-18-RewriterBug.ll
@@ -8,7 +8,7 @@
 @_2E_str7 = internal constant [21 x i8] c"ERROR: Only 1 point!\00", section "__TEXT,__cstring,cstring_literals", align 1
 @llvm.used = appending global [1 x i8*] [i8* bitcast (void (%struct.EDGE_PAIR*, %struct.VERTEX*, %struct.VERTEX*)* @build_delaunay to i8*)], section "llvm.metadata"
 
-define void @build_delaunay(%struct.EDGE_PAIR* noalias nocapture sret %agg.result, %struct.VERTEX* %tree, %struct.VERTEX* %extra) nounwind {
+define void @build_delaunay(%struct.EDGE_PAIR* noalias nocapture sret(%struct.EDGE_PAIR) %agg.result, %struct.VERTEX* %tree, %struct.VERTEX* %extra) nounwind {
 entry:
   %delright = alloca %struct.EDGE_PAIR, align 8
   %delleft = alloca %struct.EDGE_PAIR, align 8
@@ -29,10 +29,10 @@ bb1.i:
   br i1 %6, label %get_low.exit, label %bb1.i
 
 get_low.exit:
-  call  void @build_delaunay(%struct.EDGE_PAIR* noalias sret %delright, %struct.VERTEX* %2, %struct.VERTEX* %extra) nounwind
+  call  void @build_delaunay(%struct.EDGE_PAIR* noalias sret(%struct.EDGE_PAIR) %delright, %struct.VERTEX* %2, %struct.VERTEX* %extra) nounwind
   %7 = getelementptr %struct.VERTEX, %struct.VERTEX* %tree, i32 0, i32 1
   %8 = load %struct.VERTEX*, %struct.VERTEX** %7, align 4
-  call  void @build_delaunay(%struct.EDGE_PAIR* noalias sret %delleft, %struct.VERTEX* %8, %struct.VERTEX* %tree) nounwind
+  call  void @build_delaunay(%struct.EDGE_PAIR* noalias sret(%struct.EDGE_PAIR) %delleft, %struct.VERTEX* %8, %struct.VERTEX* %tree) nounwind
   %9 = getelementptr %struct.EDGE_PAIR, %struct.EDGE_PAIR* %delleft, i32 0, i32 0
   %10 = load %struct.edge_rec*, %struct.edge_rec** %9, align 8
   %11 = getelementptr %struct.EDGE_PAIR, %struct.EDGE_PAIR* %delleft, i32 0, i32 1
diff --git a/llvm/test/CodeGen/ARM/2009-08-21-PostRAKill2.ll b/llvm/test/CodeGen/ARM/2009-08-21-PostRAKill2.ll
index d5570df717f5..4aa46d0000ce 100644
--- a/llvm/test/CodeGen/ARM/2009-08-21-PostRAKill2.ll
+++ b/llvm/test/CodeGen/ARM/2009-08-21-PostRAKill2.ll
@@ -11,7 +11,7 @@ target triple = "armv7-apple-darwin9"
 
 declare double @floor(double) nounwind readnone
 
-define void @intcoord(%struct.icstruct* noalias nocapture sret %agg.result, i1 %a, double %b) {
+define void @intcoord(%struct.icstruct* noalias nocapture sret(%struct.icstruct) %agg.result, i1 %a, double %b) {
 entry:
   br i1 %a, label %bb3, label %bb1
 
diff --git a/llvm/test/CodeGen/ARM/2009-09-21-LiveVariablesBug.ll b/llvm/test/CodeGen/ARM/2009-09-21-LiveVariablesBug.ll
index aace4751915d..eec0afcb8940 100644
--- a/llvm/test/CodeGen/ARM/2009-09-21-LiveVariablesBug.ll
+++ b/llvm/test/CodeGen/ARM/2009-09-21-LiveVariablesBug.ll
@@ -7,7 +7,7 @@
 
 declare arm_aapcs_vfpcc <4 x float> @bbb(%bar*) nounwind
 
-define arm_aapcs_vfpcc void @aaa(%foo* noalias sret %agg.result, %foo* %tfrm) nounwind {
+define arm_aapcs_vfpcc void @aaa(%foo* noalias sret(%foo) %agg.result, %foo* %tfrm) nounwind {
 entry:
   %0 = call arm_aapcs_vfpcc  <4 x float> @bbb(%bar* undef) nounwind ; <<4 x float>> [#uses=0]
   ret void
diff --git a/llvm/test/CodeGen/ARM/2009-09-28-LdStOptiBug.ll b/llvm/test/CodeGen/ARM/2009-09-28-LdStOptiBug.ll
index 287384fbc214..8bf73e924b7c 100644
--- a/llvm/test/CodeGen/ARM/2009-09-28-LdStOptiBug.ll
+++ b/llvm/test/CodeGen/ARM/2009-09-28-LdStOptiBug.ll
@@ -3,7 +3,7 @@
 
 %0 = type { double, double }
 
-define void @foo(%0* noalias nocapture sret %agg.result, double %x.0, double %y.0) nounwind {
+define void @foo(%0* noalias nocapture sret(%0) %agg.result, double %x.0, double %y.0) nounwind {
 ; CHECK-LABEL: foo:
 ; CHECK: bl __aeabi_dadd
 ; CHECK-NOT: strd
diff --git a/llvm/test/CodeGen/ARM/2009-11-01-NeonMoves.ll b/llvm/test/CodeGen/ARM/2009-11-01-NeonMoves.ll
index 1fc10564a460..abc815bb8a8b 100644
--- a/llvm/test/CodeGen/ARM/2009-11-01-NeonMoves.ll
+++ b/llvm/test/CodeGen/ARM/2009-11-01-NeonMoves.ll
@@ -5,7 +5,7 @@ target triple = "armv7-eabi"
 
 %foo = type { <4 x float> }
 
-define arm_aapcs_vfpcc void @bar(%foo* noalias sret %agg.result, <4 x float> %quat.0) nounwind {
+define arm_aapcs_vfpcc void @bar(%foo* noalias sret(%foo) %agg.result, <4 x float> %quat.0) nounwind {
 entry:
   %quat_addr = alloca %foo, align 16              ; <%foo*> [#uses=2]
   %0 = getelementptr inbounds %foo, %foo* %quat_addr, i32 0, i32 0 ; <<4 x float>*> [#uses=1]
diff --git a/llvm/test/CodeGen/ARM/2009-12-02-vtrn-undef.ll b/llvm/test/CodeGen/ARM/2009-12-02-vtrn-undef.ll
index 8cba9116481e..be9dcffedcd4 100644
--- a/llvm/test/CodeGen/ARM/2009-12-02-vtrn-undef.ll
+++ b/llvm/test/CodeGen/ARM/2009-12-02-vtrn-undef.ll
@@ -6,7 +6,7 @@ target triple = "armv7-apple-darwin10"
 %struct.int16x8_t = type { <8 x i16> }
 %struct.int16x8x2_t = type { [2 x %struct.int16x8_t] }
 
-define void @t(%struct.int16x8x2_t* noalias nocapture sret %agg.result, <8 x i16> %tmp.0, %struct.int16x8x2_t* nocapture %dst) nounwind {
+define void @t(%struct.int16x8x2_t* noalias nocapture sret(%struct.int16x8x2_t) %agg.result, <8 x i16> %tmp.0, %struct.int16x8x2_t* nocapture %dst) nounwind {
 entry:
 ;CHECK: vtrn.16
   %0 = shufflevector <8 x i16> %tmp.0, <8 x i16> undef, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>
diff --git a/llvm/test/CodeGen/ARM/2012-01-26-CopyPropKills.ll b/llvm/test/CodeGen/ARM/2012-01-26-CopyPropKills.ll
index 2484f0d42ed3..1fe4494c0af5 100644
--- a/llvm/test/CodeGen/ARM/2012-01-26-CopyPropKills.ll
+++ b/llvm/test/CodeGen/ARM/2012-01-26-CopyPropKills.ll
@@ -77,7 +77,7 @@ bb3:                                              ; preds = %bb2
   %tmp60 = fadd <4 x float> %tmp59, undef
   %tmp61 = fadd <4 x float> %tmp60, zeroinitializer
   %tmp62 = load void (i8*, i8*)*, void (i8*, i8*)** undef, align 4
-  call arm_aapcs_vfpcc  void %tmp62(i8* sret undef, i8* undef) nounwind
+  call arm_aapcs_vfpcc  void %tmp62(i8* sret(i8) undef, i8* undef) nounwind
   %tmp63 = bitcast <4 x float> %tmp46 to i128
   %tmp64 = bitcast <4 x float> %tmp54 to i128
   %tmp65 = bitcast <4 x float> %tmp61 to i128
@@ -93,7 +93,7 @@ bb3:                                              ; preds = %bb2
   %tmp75 = insertvalue [8 x i64] %tmp74, i64 undef, 5
   %tmp76 = insertvalue [8 x i64] %tmp75, i64 undef, 6
   %tmp77 = insertvalue [8 x i64] %tmp76, i64 undef, 7
-  call arm_aapcs_vfpcc  void @bar(i8* sret null, [8 x i64] %tmp77) nounwind
+  call arm_aapcs_vfpcc  void @bar(i8* sret(i8) null, [8 x i64] %tmp77) nounwind
   %tmp78 = call arm_aapcs_vfpcc  i8* null(i8* null) nounwind
   %tmp79 = bitcast i8* %tmp78 to i512*
   %tmp80 = load i512, i512* %tmp79, align 16
diff --git a/llvm/test/CodeGen/ARM/alloc-no-stack-realign.ll b/llvm/test/CodeGen/ARM/alloc-no-stack-realign.ll
index b6f3e0747568..ad19d8d1ce8f 100644
--- a/llvm/test/CodeGen/ARM/alloc-no-stack-realign.ll
+++ b/llvm/test/CodeGen/ARM/alloc-no-stack-realign.ll
@@ -5,7 +5,7 @@
 ; objects that are assumed to be 64-byte aligned.
 @T3_retval = common global <16 x float> zeroinitializer, align 16
 
-define void @test1(<16 x float>* noalias sret %agg.result) nounwind ssp "no-realign-stack" {
+define void @test1(<16 x float>* noalias sret(<16 x float>) %agg.result) nounwind ssp "no-realign-stack" {
 entry:
 ; CHECK-LABEL: test1:
 ; CHECK: ldr     r[[R1:[0-9]+]], [pc, r[[R1]]]
@@ -42,7 +42,7 @@ entry:
  ret void
 }
 
-define void @test2(<16 x float>* noalias sret %agg.result) nounwind ssp {
+define void @test2(<16 x float>* noalias sret(<16 x float>) %agg.result) nounwind ssp {
 entry:
 ; CHECK-LABEL: test2:
 ; CHECK: ldr     r[[R1:[0-9]+]], [pc, r[[R1]]]
diff --git a/llvm/test/CodeGen/ARM/cmse-errors.ll b/llvm/test/CodeGen/ARM/cmse-errors.ll
index ea7976b0fe49..80a9caa04e71 100644
--- a/llvm/test/CodeGen/ARM/cmse-errors.ll
+++ b/llvm/test/CodeGen/ARM/cmse-errors.ll
@@ -3,7 +3,7 @@
 %struct.two_ints = type { i32, i32 }
 %struct.__va_list = type { i8* }
 
-define void @test1(%struct.two_ints* noalias nocapture sret align 4 %agg.result) "cmse_nonsecure_entry" {
+define void @test1(%struct.two_ints* noalias nocapture sret(%struct.two_ints) align 4 %agg.result) "cmse_nonsecure_entry" {
 entry:
   %0 = bitcast %struct.two_ints* %agg.result to i64*
   store i64 8589934593, i64* %0, align 4
@@ -29,7 +29,7 @@ define void @test4(void (%struct.two_ints*)* nocapture %p) {
 entry:
   %r = alloca %struct.two_ints, align 4
   %0 = bitcast %struct.two_ints* %r to i8*
-  call void %p(%struct.two_ints* nonnull sret align 4 %r) "cmse_nonsecure_call"
+  call void %p(%struct.two_ints* nonnull sret(%struct.two_ints) align 4 %r) "cmse_nonsecure_call"
   ret void
 }
 ; CHECK: error: {{.*}}test4{{.*}}: call to non-secure function would return value through pointer
diff --git a/llvm/test/CodeGen/ARM/coalesce-subregs.ll b/llvm/test/CodeGen/ARM/coalesce-subregs.ll
index a11976e27448..c13af8a69cb1 100644
--- a/llvm/test/CodeGen/ARM/coalesce-subregs.ll
+++ b/llvm/test/CodeGen/ARM/coalesce-subregs.ll
@@ -294,7 +294,7 @@ bb:
 ; The shuffle in if.else3 must be preserved even though adjustCopiesBackFrom
 ; is tempted to remove it.
 ; CHECK: vorr d
-define internal void @adjustCopiesBackFrom(<2 x i64>* noalias nocapture sret %agg.result, <2 x i64> %in) {
+define internal void @adjustCopiesBackFrom(<2 x i64>* noalias nocapture sret(<2 x i64>) %agg.result, <2 x i64> %in) {
 entry:
   %0 = extractelement <2 x i64> %in, i32 0
   %cmp = icmp slt i64 %0, 1
diff --git a/llvm/test/CodeGen/ARM/interval-update-remat.ll b/llvm/test/CodeGen/ARM/interval-update-remat.ll
index 216f7e915a80..d74246eea892 100644
--- a/llvm/test/CodeGen/ARM/interval-update-remat.ll
+++ b/llvm/test/CodeGen/ARM/interval-update-remat.ll
@@ -52,7 +52,7 @@ entry:
   %call5 = call %class.TestCompletionCallback.9.234.284.1309.2334* @_ZN22TestCompletionCallbackC1Ev(%class.TestCompletionCallback.9.234.284.1309.2334* nonnull %callback)
   %transport_socket_pool_ = getelementptr inbounds %class.SOCKSClientSocketPoolTest_AsyncSOCKSConnectError_Test.1.226.276.1301.2326, %class.SOCKSClientSocketPoolTest_AsyncSOCKSConnectError_Test.1.226.276.1301.2326* %this, i32 0, i32 0
   %call6 = call i32 @_ZN29MockTransportClientSocketPool5m_fn9Ev(%class.MockTransportClientSocketPool.0.225.275.1300.2325* %transport_socket_pool_)
-  call void @_Z11CmpHelperEQPcS_xx(%class.AssertionResult.24.249.299.1324.2349* nonnull sret %gtest_ar, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i32 0, i32 0), i64 0, i64 undef)
+  call void @_Z11CmpHelperEQPcS_xx(%class.AssertionResult.24.249.299.1324.2349* nonnull sret(%class.AssertionResult.24.249.299.1324.2349) %gtest_ar, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i32 0, i32 0), i64 0, i64 undef)
   %tmp = load i8, i8* undef, align 4
   %tobool.i = icmp eq i8 %tmp, 0
   br i1 %tobool.i, label %if.else, label %if.end
@@ -87,14 +87,14 @@ if.end:                                           ; preds = %_ZN7MessageD1Ev.exi
   %call.i.i.i = call %class.scoped_ptr.23.248.298.1323.2348* @_ZN10scoped_ptrI25Trans_NS___1_basic_stringIciiEED2Ev(%class.scoped_ptr.23.248.298.1323.2348* %message_.i.i)
   call void @llvm.memset.p0i8.i32(i8* align 4 null, i8 0, i32 12, i1 false)
   call void @_ZN25Trans_NS___1_basic_stringIciiE5m_fn2Ev(%class.Trans_NS___1_basic_string.18.243.293.1318.2343* nonnull %ref.tmp)
-  call void @_Z19CreateSOCKSv5Paramsv(%class.scoped_refptr.19.244.294.1319.2344* nonnull sret %agg.tmp16)
+  call void @_Z19CreateSOCKSv5Paramsv(%class.scoped_refptr.19.244.294.1319.2344* nonnull sret(%class.scoped_refptr.19.244.294.1319.2344) %agg.tmp16)
   %callback_.i = getelementptr inbounds %class.TestCompletionCallback.9.234.284.1309.2334, %class.TestCompletionCallback.9.234.284.1309.2334* %callback, i32 0, i32 1
   %pool_ = getelementptr inbounds %class.SOCKSClientSocketPoolTest_AsyncSOCKSConnectError_Test.1.226.276.1301.2326, %class.SOCKSClientSocketPoolTest_AsyncSOCKSConnectError_Test.1.226.276.1301.2326* %this, i32 0, i32 1
   %tmp1 = getelementptr inbounds %class.BoundNetLog.20.245.295.1320.2345, %class.BoundNetLog.20.245.295.1320.2345* %agg.tmp18, i32 0, i32 0
   store i32 0, i32* %tmp1, align 4
   call void @_ZN18ClientSocketHandle5m_fn3IPiEEvRK25Trans_NS___1_basic_stringIciiE13scoped_refptr15RequestPriorityN16ClientSocketPool13RespectLimitsERiT_11BoundNetLog(%class.ClientSocketHandle.14.239.289.1314.2339* nonnull undef, %class.Trans_NS___1_basic_string.18.243.293.1318.2343* nonnull dereferenceable(12) %ref.tmp, %class.scoped_refptr.19.244.294.1319.2344* nonnull %agg.tmp16, i32 0, i32 1, i32* nonnull dereferenceable(4) %callback_.i, i32* %pool_, %class.BoundNetLog.20.245.295.1320.2345* nonnull %agg.tmp18)
   %call19 = call %class.BoundNetLog.20.245.295.1320.2345* @_ZN11BoundNetLogD1Ev(%class.BoundNetLog.20.245.295.1320.2345* nonnull %agg.tmp18)
-  call void @_Z11CmpHelperEQPcS_xx(%class.AssertionResult.24.249.299.1324.2349* nonnull sret undef, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i32 0, i32 0), i64 -1, i64 0)
+  call void @_Z11CmpHelperEQPcS_xx(%class.AssertionResult.24.249.299.1324.2349* nonnull sret(%class.AssertionResult.24.249.299.1324.2349) undef, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i32 0, i32 0), i64 -1, i64 0)
   br i1 undef, label %if.then.i.i.i.i, label %_ZN7MessageD1Ev.exit
 
 if.then.i.i.i.i:                                  ; preds = %if.end
@@ -134,7 +134,7 @@ declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #0
 
 declare void @_ZN18ClientSocketHandle5m_fn3IPiEEvRK25Trans_NS___1_basic_stringIciiE13scoped_refptr15RequestPriorityN16ClientSocketPool13RespectLimitsERiT_11BoundNetLog(%class.ClientSocketHandle.14.239.289.1314.2339*, %class.Trans_NS___1_basic_string.18.243.293.1318.2343* dereferenceable(12), %class.scoped_refptr.19.244.294.1319.2344*, i32, i32, i32* dereferenceable(4), i32*, %class.BoundNetLog.20.245.295.1320.2345*)
 
-declare void @_Z19CreateSOCKSv5Paramsv(%class.scoped_refptr.19.244.294.1319.2344* sret)
+declare void @_Z19CreateSOCKSv5Paramsv(%class.scoped_refptr.19.244.294.1319.2344* sret(%class.scoped_refptr.19.244.294.1319.2344))
 
 ; Function Attrs: argmemonly nounwind
 declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) #0
diff --git a/llvm/test/CodeGen/ARM/swifterror.ll b/llvm/test/CodeGen/ARM/swifterror.ll
index 7968230ccab2..bdd1bc70006e 100644
--- a/llvm/test/CodeGen/ARM/swifterror.ll
+++ b/llvm/test/CodeGen/ARM/swifterror.ll
@@ -221,7 +221,7 @@ bb_end:
 
 ; "foo_sret" is a function that takes a swifterror parameter, it also has a sret
 ; parameter.
-define void @foo_sret(%struct.S* sret %agg.result, i32 %val1, %swift_error** swifterror %error_ptr_ref) {
+define void @foo_sret(%struct.S* sret(%struct.S) %agg.result, i32 %val1, %swift_error** swifterror %error_ptr_ref) {
 ; CHECK-APPLE-LABEL: foo_sret:
 ; CHECK-APPLE: mov [[SRET:r[0-9]+]], r0
 ; CHECK-APPLE: mov r0, #16
@@ -286,7 +286,7 @@ entry:
   %s = alloca %struct.S, align 8
   %error_ptr_ref = alloca swifterror %swift_error*
   store %swift_error* null, %swift_error** %error_ptr_ref
-  call void @foo_sret(%struct.S* sret %s, i32 1, %swift_error** swifterror %error_ptr_ref)
+  call void @foo_sret(%struct.S* sret(%struct.S) %s, i32 1, %swift_error** swifterror %error_ptr_ref)
   %error_from_foo = load %swift_error*, %swift_error** %error_ptr_ref
   %had_error_from_foo = icmp ne %swift_error* %error_from_foo, null
   %tmp = bitcast %swift_error* %error_from_foo to i8*
diff --git a/llvm/test/CodeGen/ARM/vlddup.ll b/llvm/test/CodeGen/ARM/vlddup.ll
index 25637540befe..53f996d24ce4 100644
--- a/llvm/test/CodeGen/ARM/vlddup.ll
+++ b/llvm/test/CodeGen/ARM/vlddup.ll
@@ -222,7 +222,7 @@ define <8 x i8> @vld2dupi8(i8* %A) nounwind {
         ret <8 x i8> %tmp5
 }
 
-define void @vld2dupi8_preinc(%struct.__neon_int8x8x2_t* noalias nocapture sret %agg.result, i8** noalias nocapture %a, i32 %b) nounwind {
+define void @vld2dupi8_preinc(%struct.__neon_int8x8x2_t* noalias nocapture sret(%struct.__neon_int8x8x2_t) %agg.result, i8** noalias nocapture %a, i32 %b) nounwind {
 ;CHECK-LABEL: vld2dupi8_preinc:
 ;CHECK: vld2.8 {d16[], d17[]}, [r2]
 entry:
@@ -241,7 +241,7 @@ entry:
   ret void
 }
 
-define void @vld2dupi8_postinc_fixed(%struct.__neon_int8x8x2_t* noalias nocapture sret %agg.result, i8** noalias nocapture %a) nounwind {
+define void @vld2dupi8_postinc_fixed(%struct.__neon_int8x8x2_t* noalias nocapture sret(%struct.__neon_int8x8x2_t) %agg.result, i8** noalias nocapture %a) nounwind {
 entry:
 ;CHECK-LABEL: vld2dupi8_postinc_fixed:
 ;CHECK: vld2.8 {d16[], d17[]}, [r2]!
@@ -260,7 +260,7 @@ entry:
   ret void
 }
 
-define void @vld2dupi8_postinc_variable(%struct.__neon_int8x8x2_t* noalias nocapture sret %agg.result, i8** noalias nocapture %a, i32 %n) nounwind {
+define void @vld2dupi8_postinc_variable(%struct.__neon_int8x8x2_t* noalias nocapture sret(%struct.__neon_int8x8x2_t) %agg.result, i8** noalias nocapture %a, i32 %n) nounwind {
 entry:
 ;CHECK-LABEL: vld2dupi8_postinc_variable:
 ;CHECK: vld2.8 {d16[], d17[]}, [r3], r2
diff --git a/llvm/test/CodeGen/ARM/vmov.ll b/llvm/test/CodeGen/ARM/vmov.ll
index 995e015b4b81..694ffb1d0ecd 100644
--- a/llvm/test/CodeGen/ARM/vmov.ll
+++ b/llvm/test/CodeGen/ARM/vmov.ll
@@ -228,7 +228,7 @@ define arm_aapcs_vfpcc <2 x i64> @v_movQi64() nounwind {
 
 ; Check for correct assembler printing for immediate values.
 %struct.int8x8_t = type { <8 x i8> }
-define arm_aapcs_vfpcc void @vdupn128(%struct.int8x8_t* noalias nocapture sret %agg.result) nounwind {
+define arm_aapcs_vfpcc void @vdupn128(%struct.int8x8_t* noalias nocapture sret(%struct.int8x8_t) %agg.result) nounwind {
 ; CHECK-LABEL: vdupn128:
 ; CHECK:       @ %bb.0: @ %entry
 ; CHECK-NEXT:    vmov.i8 d16, #0x80
@@ -240,7 +240,7 @@ entry:
   ret void
 }
 
-define arm_aapcs_vfpcc void @vdupnneg75(%struct.int8x8_t* noalias nocapture sret %agg.result) nounwind {
+define arm_aapcs_vfpcc void @vdupnneg75(%struct.int8x8_t* noalias nocapture sret(%struct.int8x8_t) %agg.result) nounwind {
 ; CHECK-LABEL: vdupnneg75:
 ; CHECK:       @ %bb.0: @ %entry
 ; CHECK-NEXT:    vmov.i8 d16, #0xb5
diff --git a/llvm/test/CodeGen/Hexagon/calling-conv-2.ll b/llvm/test/CodeGen/Hexagon/calling-conv-2.ll
index f2526b36e336..1efb5a793151 100644
--- a/llvm/test/CodeGen/Hexagon/calling-conv-2.ll
+++ b/llvm/test/CodeGen/Hexagon/calling-conv-2.ll
@@ -3,9 +3,9 @@
 %struct.test_struct = type { i32, i8, i64 }
 
 ; CHECK: r1 = #45
-define void @foo(%struct.test_struct* noalias nocapture sret %agg.result, i32 %a) #0 {
+define void @foo(%struct.test_struct* noalias nocapture sret(%struct.test_struct) %agg.result, i32 %a) #0 {
 entry:
-  call void @bar(%struct.test_struct* sret %agg.result, i32 45) #0
+  call void @bar(%struct.test_struct* sret(%struct.test_struct) %agg.result, i32 45) #0
   ret void
 }
 
diff --git a/llvm/test/CodeGen/Hexagon/calling-conv.ll b/llvm/test/CodeGen/Hexagon/calling-conv.ll
index 271a74d58f23..043cf4908cce 100644
--- a/llvm/test/CodeGen/Hexagon/calling-conv.ll
+++ b/llvm/test/CodeGen/Hexagon/calling-conv.ll
@@ -11,7 +11,7 @@
 ; CHECK-TWO:    memw(r29+#52) = r2
 ; CHECK-THREE:  memw(r29+#56) = r2
 
-define void @f0(%s.0* noalias nocapture sret %a0, i32 %a1, i8 zeroext %a2, %s.0* byval(%s.0) nocapture readnone align 8 %a3, %s.1* byval(%s.1) nocapture readnone align 8 %a4) #0 {
+define void @f0(%s.0* noalias nocapture sret(%s.0) %a0, i32 %a1, i8 zeroext %a2, %s.0* byval(%s.0) nocapture readnone align 8 %a3, %s.1* byval(%s.1) nocapture readnone align 8 %a4) #0 {
 b0:
   %v0 = alloca %s.0, align 8
   %v1 = load %s.0*, %s.0** @g0, align 4
@@ -19,7 +19,7 @@ b0:
   %v3 = add nsw i64 %v2, 1
   %v4 = add nsw i32 %a1, 2
   %v5 = add nsw i64 %v2, 3
-  call void @f1(%s.0* sret %v0, i32 45, %s.0* byval(%s.0) align 8 %v1, %s.0* byval(%s.0) align 8 %v1, i8 zeroext %a2, i64 %v3, i32 %v4, i64 %v5, i8 zeroext %a2, i8 zeroext %a2, i8 zeroext %a2, i32 45)
+  call void @f1(%s.0* sret(%s.0) %v0, i32 45, %s.0* byval(%s.0) align 8 %v1, %s.0* byval(%s.0) align 8 %v1, i8 zeroext %a2, i64 %v3, i32 %v4, i64 %v5, i8 zeroext %a2, i8 zeroext %a2, i8 zeroext %a2, i32 45)
   %v6 = bitcast %s.0* %v0 to i32*
   store i32 20, i32* %v6, align 8
   %v7 = bitcast %s.0* %a0 to i8*
diff --git a/llvm/test/CodeGen/Hexagon/expand-condsets-pred-undef.ll b/llvm/test/CodeGen/Hexagon/expand-condsets-pred-undef.ll
index 284170b5edb4..1a8112bbdf45 100644
--- a/llvm/test/CodeGen/Hexagon/expand-condsets-pred-undef.ll
+++ b/llvm/test/CodeGen/Hexagon/expand-condsets-pred-undef.ll
@@ -14,7 +14,7 @@ entry:
   %inc = zext i1 %cmp104 to i32
   %inc.r = add nsw i32 %inc, %r
   %.inc.r = select i1 undef, i32 0, i32 %inc.r
-  tail call void @foo(%struct.0* sret %p, i8 zeroext %t, i32 %.inc.r, i64 undef)
+  tail call void @foo(%struct.0* sret(%struct.0) %p, i8 zeroext %t, i32 %.inc.r, i64 undef)
   ret void
 }
 
diff --git a/llvm/test/CodeGen/Hexagon/regscavengerbug.ll b/llvm/test/CodeGen/Hexagon/regscavengerbug.ll
index cf03f1d2e498..02c6780fa6d5 100644
--- a/llvm/test/CodeGen/Hexagon/regscavengerbug.ll
+++ b/llvm/test/CodeGen/Hexagon/regscavengerbug.ll
@@ -98,7 +98,7 @@ b3:                                               ; preds = %b0
   %v50 = load double, double* %v41, align 8, !tbaa !6
   %v51 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 2
   store double %v50, double* %v51, align 8, !tbaa !6
-  call void @f0(%3* sret %v2, %0* %v3, %3* %v24)
+  call void @f0(%3* sret(%3) %v2, %0* %v3, %3* %v24)
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %v25, i8* align 8 %v42, i32 24, i1 false)
   %v52 = load double, double* %v39, align 8, !tbaa !6
   %v53 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 0, i32 0, i32 1, i32 0, i32 0
@@ -110,7 +110,7 @@ b3:                                               ; preds = %b0
   %v57 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 0, i32 0, i32 1, i32 0, i32 2
   store double %v56, double* %v57, align 8, !tbaa !6
   %v58 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 0, i32 0, i32 1
-  call void @f0(%3* sret %v2, %0* %v3, %3* %v58)
+  call void @f0(%3* sret(%3) %v2, %0* %v3, %3* %v58)
   %v59 = bitcast %3* %v58 to i8*
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %v59, i8* align 8 %v42, i32 24, i1 false)
   %v60 = load double, double* %v39, align 8, !tbaa !6
@@ -123,7 +123,7 @@ b3:                                               ; preds = %b0
   %v65 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 2
   store double %v64, double* %v65, align 8, !tbaa !6
   %v66 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 0, i32 1, i32 0
-  call void @f0(%3* sret %v2, %0* %v3, %3* %v66)
+  call void @f0(%3* sret(%3) %v2, %0* %v3, %3* %v66)
   %v67 = bitcast %3* %v66 to i8*
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %v67, i8* align 8 %v42, i32 24, i1 false)
   %v68 = load double, double* %v39, align 8, !tbaa !6
@@ -136,7 +136,7 @@ b3:                                               ; preds = %b0
   %v73 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 0, i32 1, i32 1, i32 0, i32 2
   store double %v72, double* %v73, align 8, !tbaa !6
   %v74 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 0, i32 1, i32 1
-  call void @f0(%3* sret %v2, %0* %v3, %3* %v74)
+  call void @f0(%3* sret(%3) %v2, %0* %v3, %3* %v74)
   %v75 = bitcast %3* %v74 to i8*
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %v75, i8* align 8 %v42, i32 24, i1 false)
   %v76 = load double, double* %v45, align 8, !tbaa !6
@@ -149,7 +149,7 @@ b3:                                               ; preds = %b0
   %v81 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 1, i32 0, i32 0, i32 0, i32 2
   store double %v80, double* %v81, align 8, !tbaa !6
   %v82 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 1, i32 0, i32 0
-  call void @f0(%3* sret %v2, %0* %v3, %3* %v82)
+  call void @f0(%3* sret(%3) %v2, %0* %v3, %3* %v82)
   %v83 = bitcast %3* %v82 to i8*
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %v83, i8* align 8 %v42, i32 24, i1 false)
   %v84 = load double, double* %v45, align 8, !tbaa !6
@@ -162,7 +162,7 @@ b3:                                               ; preds = %b0
   %v89 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 2
   store double %v88, double* %v89, align 8, !tbaa !6
   %v90 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 1, i32 0, i32 1
-  call void @f0(%3* sret %v2, %0* %v3, %3* %v90)
+  call void @f0(%3* sret(%3) %v2, %0* %v3, %3* %v90)
   %v91 = bitcast %3* %v90 to i8*
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %v91, i8* align 8 %v42, i32 24, i1 false)
   %v92 = load double, double* %v45, align 8, !tbaa !6
@@ -175,7 +175,7 @@ b3:                                               ; preds = %b0
   %v97 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 1, i32 1, i32 0, i32 0, i32 2
   store double %v96, double* %v97, align 8, !tbaa !6
   %v98 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 1, i32 1, i32 0
-  call void @f0(%3* sret %v2, %0* %v3, %3* %v98)
+  call void @f0(%3* sret(%3) %v2, %0* %v3, %3* %v98)
   %v99 = bitcast %3* %v98 to i8*
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %v99, i8* align 8 %v42, i32 24, i1 false)
   %v100 = load double, double* %v45, align 8, !tbaa !6
@@ -188,7 +188,7 @@ b3:                                               ; preds = %b0
   %v105 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 1, i32 1, i32 1, i32 0, i32 2
   store double %v104, double* %v105, align 8, !tbaa !6
   %v106 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 1, i32 1, i32 1
-  call void @f0(%3* sret %v2, %0* %v3, %3* %v106)
+  call void @f0(%3* sret(%3) %v2, %0* %v3, %3* %v106)
   %v107 = bitcast %3* %v106 to i8*
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %v107, i8* align 8 %v42, i32 24, i1 false)
   %v108 = getelementptr inbounds [2 x [2 x [2 x %3]]], [2 x [2 x [2 x %3]]]* %v1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0
diff --git a/llvm/test/CodeGen/Hexagon/tail-dup-subreg-map.ll b/llvm/test/CodeGen/Hexagon/tail-dup-subreg-map.ll
index 6dd83a07bdc9..bd87e2a2b213 100644
--- a/llvm/test/CodeGen/Hexagon/tail-dup-subreg-map.ll
+++ b/llvm/test/CodeGen/Hexagon/tail-dup-subreg-map.ll
@@ -14,7 +14,7 @@ target triple = "hexagon"
 
 declare hidden fastcc void @foo(%struct.0* noalias nocapture, i8 signext, i8 zeroext, i32, i64, i64) unnamed_addr #0
 
-define void @fred(%struct.0* noalias nocapture sret %agg.result, %struct.1* byval(%struct.1) nocapture readonly align 8 %a, i32 %a0) #1 {
+define void @fred(%struct.0* noalias nocapture sret(%struct.0) %agg.result, %struct.1* byval(%struct.1) nocapture readonly align 8 %a, i32 %a0) #1 {
 entry:
   %0 = load i64, i64* undef, align 8
   switch i32 %a0, label %if.else [
diff --git a/llvm/test/CodeGen/MIR/X86/diexpr-win32.mir b/llvm/test/CodeGen/MIR/X86/diexpr-win32.mir
index 8f88926376f7..c1fe8cbd7e9b 100644
--- a/llvm/test/CodeGen/MIR/X86/diexpr-win32.mir
+++ b/llvm/test/CodeGen/MIR/X86/diexpr-win32.mir
@@ -67,7 +67,7 @@
 
   %struct.string = type { i32, i32, i8* }
 
-  define void @fun(%struct.string* noalias sret %agg.result, %struct.string* noalias %str) !dbg !12 {
+  define void @fun(%struct.string* noalias sret(%struct.string) %agg.result, %struct.string* noalias %str) !dbg !12 {
   entry:
     call void @llvm.dbg.value(metadata %struct.string* %agg.result, metadata !23, metadata !24), !dbg !25
     call void @llvm.dbg.value(metadata %struct.string* %str, metadata !26, metadata !28), !dbg !25
diff --git a/llvm/test/CodeGen/MSP430/struct-return.ll b/llvm/test/CodeGen/MSP430/struct-return.ll
index 8f662897a291..d0e5a7f8bb25 100644
--- a/llvm/test/CodeGen/MSP430/struct-return.ll
+++ b/llvm/test/CodeGen/MSP430/struct-return.ll
@@ -31,11 +31,11 @@ define void @test() #1 {
   %1 = alloca %struct.S, align 2
 ; CHECK:      mov	r1, r12
 ; CHECK-NEXT: call	#sret
-  call void @sret(%struct.S* nonnull sret %1) #3
+  call void @sret(%struct.S* nonnull sret(%struct.S) %1) #3
   ret void
 }
 
-define void @sret(%struct.S* noalias nocapture sret) #0 {
+define void @sret(%struct.S* noalias nocapture sret(%struct.S)) #0 {
 ; CHECK-LABEL: sret:
 ; CHECK: mov	&a, 0(r12)
 ; CHECK: mov	&b, 2(r12)
diff --git a/llvm/test/CodeGen/Mips/2008-07-03-SRet.ll b/llvm/test/CodeGen/Mips/2008-07-03-SRet.ll
index 6313ec4af356..f586b5823b9d 100644
--- a/llvm/test/CodeGen/Mips/2008-07-03-SRet.ll
+++ b/llvm/test/CodeGen/Mips/2008-07-03-SRet.ll
@@ -2,7 +2,7 @@
 
 %struct.sret0 = type { i32, i32, i32 }
 
-define void @test0(%struct.sret0* noalias sret %agg.result, i32 %dummy) nounwind {
+define void @test0(%struct.sret0* noalias sret(%struct.sret0) %agg.result, i32 %dummy) nounwind {
 entry:
 ; CHECK: sw ${{[0-9]+}}, {{[0-9]+}}($4)
 ; CHECK: sw ${{[0-9]+}}, {{[0-9]+}}($4)
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/irtranslator/sret_pointer.ll b/llvm/test/CodeGen/Mips/GlobalISel/irtranslator/sret_pointer.ll
index 7d37239c4ba3..f9487d325b02 100644
--- a/llvm/test/CodeGen/Mips/GlobalISel/irtranslator/sret_pointer.ll
+++ b/llvm/test/CodeGen/Mips/GlobalISel/irtranslator/sret_pointer.ll
@@ -3,7 +3,7 @@
 
 %struct.S = type { i32, i32 }
 
-define void @ZeroInit(%struct.S* noalias sret %agg.result) {
+define void @ZeroInit(%struct.S* noalias sret(%struct.S) %agg.result) {
   ; MIPS32-LABEL: name: ZeroInit
   ; MIPS32: bb.1.entry:
   ; MIPS32:   liveins: $a0
@@ -23,7 +23,7 @@ entry:
   ret void
 }
 
-define void @CallZeroInit(%struct.S* noalias sret %agg.result) {
+define void @CallZeroInit(%struct.S* noalias sret(%struct.S) %agg.result) {
   ; MIPS32-LABEL: name: CallZeroInit
   ; MIPS32: bb.1.entry:
   ; MIPS32:   liveins: $a0
@@ -34,6 +34,6 @@ define void @CallZeroInit(%struct.S* noalias sret %agg.result) {
   ; MIPS32:   ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
   ; MIPS32:   RetRA
 entry:
-  call void @ZeroInit(%struct.S* sret %agg.result)
+  call void @ZeroInit(%struct.S* sret(%struct.S) %agg.result)
   ret void
 }
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sret_pointer.ll b/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sret_pointer.ll
index 4e5cbb08fdec..2f2295034058 100644
--- a/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sret_pointer.ll
+++ b/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sret_pointer.ll
@@ -3,7 +3,7 @@
 
 %struct.S = type { i32, i32 }
 
-define void @ZeroInit(%struct.S* noalias sret %agg.result) {
+define void @ZeroInit(%struct.S* noalias sret(%struct.S) %agg.result) {
 ; MIPS32-LABEL: ZeroInit:
 ; MIPS32:       # %bb.0: # %entry
 ; MIPS32-NEXT:    ori $1, $zero, 0
@@ -19,7 +19,7 @@ entry:
   ret void
 }
 
-define void @CallZeroInit(%struct.S* noalias sret %agg.result) {
+define void @CallZeroInit(%struct.S* noalias sret(%struct.S) %agg.result) {
 ; MIPS32-LABEL: CallZeroInit:
 ; MIPS32:       # %bb.0: # %entry
 ; MIPS32-NEXT:    addiu $sp, $sp, -24
@@ -33,6 +33,6 @@ define void @CallZeroInit(%struct.S* noalias sret %agg.result) {
 ; MIPS32-NEXT:    jr $ra
 ; MIPS32-NEXT:    nop
 entry:
-  call void @ZeroInit(%struct.S* sret %agg.result)
+  call void @ZeroInit(%struct.S* sret(%struct.S) %agg.result)
   ret void
 }
diff --git a/llvm/test/CodeGen/Mips/cconv/return-struct.ll b/llvm/test/CodeGen/Mips/cconv/return-struct.ll
index 83cf14feceed..d89ad0569631 100644
--- a/llvm/test/CodeGen/Mips/cconv/return-struct.ll
+++ b/llvm/test/CodeGen/Mips/cconv/return-struct.ll
@@ -149,7 +149,7 @@ entry:
 
 ; Ensure that large structures (>128-bit) are returned indirectly.
 ; We pick an extremely large structure so we don't have to match inlined memcpy's.
-define void @ret_struct_128xi16({[128 x i16]}* sret %returnval) {
+define void @ret_struct_128xi16({[128 x i16]}* sret({[128 x i16]}) %returnval) {
 entry:
         %0 = bitcast {[128 x i16]}* %returnval to i8*
         call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 2 %0, i8* align 2 bitcast ({[128 x i16]}* @struct_128xi16 to i8*), i64 256, i1 false)
diff --git a/llvm/test/CodeGen/Mips/fastcc_byval.ll b/llvm/test/CodeGen/Mips/fastcc_byval.ll
index 15e2a2b44ae9..135411021dc5 100644
--- a/llvm/test/CodeGen/Mips/fastcc_byval.ll
+++ b/llvm/test/CodeGen/Mips/fastcc_byval.ll
@@ -5,7 +5,7 @@
 
 %struct.str = type { i32, i32, [3 x i32*] }
 
-declare fastcc void @_Z1F3str(%struct.str* noalias nocapture sret %agg.result, %struct.str* byval(%struct.str) nocapture readonly align 4 %s)
+declare fastcc void @_Z1F3str(%struct.str* noalias nocapture sret(%struct.str) %agg.result, %struct.str* byval(%struct.str) nocapture readonly align 4 %s)
 
 define i32 @_Z1g3str(%struct.str* byval(%struct.str) nocapture readonly align 4 %s) {
 ; CHECK-LABEL: _Z1g3str:
@@ -15,7 +15,7 @@ entry:
   %ref.tmp = alloca %struct.str, align 4
   %0 = bitcast %struct.str* %ref.tmp to i8*
   call void @llvm.lifetime.start.p0i8(i64 20, i8* nonnull %0)
-  call fastcc void @_Z1F3str(%struct.str* nonnull sret %ref.tmp, %struct.str* byval(%struct.str) nonnull align 4 %s)
+  call fastcc void @_Z1F3str(%struct.str* nonnull sret(%struct.str) %ref.tmp, %struct.str* byval(%struct.str) nonnull align 4 %s)
   %cl.sroa.3.0..sroa_idx2 = getelementptr inbounds %struct.str, %struct.str* %ref.tmp, i32 0, i32 1
   %cl.sroa.3.0.copyload = load i32, i32* %cl.sroa.3.0..sroa_idx2, align 4
   call void @llvm.lifetime.end.p0i8(i64 20, i8* nonnull %0)
diff --git a/llvm/test/CodeGen/Mips/mips64-sret.ll b/llvm/test/CodeGen/Mips/mips64-sret.ll
index 0559747f62cc..8d3d6cbbb58d 100644
--- a/llvm/test/CodeGen/Mips/mips64-sret.ll
+++ b/llvm/test/CodeGen/Mips/mips64-sret.ll
@@ -1,6 +1,6 @@
 ; RUN: llc -march=mips64el -mcpu=mips64r2 -target-abi=n64 < %s | FileCheck %s
 
-define void @foo(i32* noalias sret %agg.result) nounwind {
+define void @foo(i32* noalias sret(i32) %agg.result) nounwind {
 entry:
 ; CHECK-LABEL: foo:
 ; CHECK: sw {{.*}}, 0($4)
@@ -11,7 +11,7 @@ entry:
   ret void
 }
 
-define void @bar(i32 signext %v, i32* noalias sret %agg.result) nounwind {
+define void @bar(i32 signext %v, i32* noalias sret(i32) %agg.result) nounwind {
 entry:
 ; CHECK-LABEL: bar:
 ; CHECK: sw $4, 0($5)
diff --git a/llvm/test/CodeGen/PowerPC/2008-10-28-UnprocessedNode.ll b/llvm/test/CodeGen/PowerPC/2008-10-28-UnprocessedNode.ll
index 3174a7130f00..012450e184ec 100644
--- a/llvm/test/CodeGen/PowerPC/2008-10-28-UnprocessedNode.ll
+++ b/llvm/test/CodeGen/PowerPC/2008-10-28-UnprocessedNode.ll
@@ -1,6 +1,6 @@
 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64--
 
-define void @__divtc3({ ppc_fp128, ppc_fp128 }* noalias sret %agg.result, ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d) nounwind {
+define void @__divtc3({ ppc_fp128, ppc_fp128 }* noalias sret({ ppc_fp128, ppc_fp128 }) %agg.result, ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d) nounwind {
 entry:
         %imag59 = load ppc_fp128, ppc_fp128* null, align 8         ; <ppc_fp128> [#uses=1]
         %0 = fmul ppc_fp128 0xM00000000000000000000000000000000, %imag59         ; <ppc_fp128> [#uses=1]
diff --git a/llvm/test/CodeGen/PowerPC/2008-12-02-LegalizeTypeAssert.ll b/llvm/test/CodeGen/PowerPC/2008-12-02-LegalizeTypeAssert.ll
index 6355795e79e7..69280af65458 100644
--- a/llvm/test/CodeGen/PowerPC/2008-12-02-LegalizeTypeAssert.ll
+++ b/llvm/test/CodeGen/PowerPC/2008-12-02-LegalizeTypeAssert.ll
@@ -1,6 +1,6 @@
 ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu.5
 
-define void @__multc3({ ppc_fp128, ppc_fp128 }* noalias sret %agg.result, ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d) nounwind {
+define void @__multc3({ ppc_fp128, ppc_fp128 }* noalias sret({ ppc_fp128, ppc_fp128 }) %agg.result, ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d) nounwind {
 entry:
 	%.pre139 = and i1 false, false		; <i1> [#uses=1]
 	br i1 false, label %bb6, label %bb21
diff --git a/llvm/test/CodeGen/PowerPC/MMO-flags-assertion.ll b/llvm/test/CodeGen/PowerPC/MMO-flags-assertion.ll
index 156214f419b4..e0550b89d19c 100644
--- a/llvm/test/CodeGen/PowerPC/MMO-flags-assertion.ll
+++ b/llvm/test/CodeGen/PowerPC/MMO-flags-assertion.ll
@@ -7,7 +7,7 @@ declare void @_Z3fn11F(%class.F* byval(%class.F) align 8) local_unnamed_addr
 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1)
 declare signext i32 @_ZN1F11isGlobalRegEv(%class.F*) local_unnamed_addr
 declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture)
-declare void @_Z10EmitLValuev(%class.F* sret) local_unnamed_addr
+declare void @_Z10EmitLValuev(%class.F* sret(%class.F)) local_unnamed_addr
 declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture)
 
 %class.F = type { i32, i64, i8, [64 x i8], i8, i32* }
@@ -25,7 +25,7 @@ entry:
   %XLValue = alloca %class.F, align 8
   %0 = bitcast %class.F* %XLValue to i8*
   call void @llvm.lifetime.start.p0i8(i64 96, i8* nonnull %0)
-  call void @_Z10EmitLValuev(%class.F* nonnull sret %XLValue)
+  call void @_Z10EmitLValuev(%class.F* nonnull sret(%class.F) %XLValue)
   %1 = bitcast %class.F* %agg.tmp1 to i8*
   call void @llvm.lifetime.start.p0i8(i64 96, i8* nonnull %1)
   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 nonnull %1, i8* align 8 nonnull %0, i64 96, i1 false)
diff --git a/llvm/test/CodeGen/PowerPC/a2-fp-basic.ll b/llvm/test/CodeGen/PowerPC/a2-fp-basic.ll
index 1bb75c954135..bfb6ba059712 100644
--- a/llvm/test/CodeGen/PowerPC/a2-fp-basic.ll
+++ b/llvm/test/CodeGen/PowerPC/a2-fp-basic.ll
@@ -2,7 +2,7 @@
 
 %0 = type { double, double }
 
-define void @maybe_an_fma(%0* sret %agg.result, %0* byval(%0) %a, %0* byval(%0) %b, %0* byval(%0) %c) nounwind {
+define void @maybe_an_fma(%0* sret(%0) %agg.result, %0* byval(%0) %a, %0* byval(%0) %b, %0* byval(%0) %c) nounwind {
 entry:
   %a.realp = getelementptr inbounds %0, %0* %a, i32 0, i32 0
   %a.real = load double, double* %a.realp
diff --git a/llvm/test/CodeGen/PowerPC/aix-sret-param.ll b/llvm/test/CodeGen/PowerPC/aix-sret-param.ll
index 98f3dccc6bb4..3547be0b69ad 100644
--- a/llvm/test/CodeGen/PowerPC/aix-sret-param.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-sret-param.ll
@@ -18,19 +18,19 @@
 define void @test1() {
 entry:
   %s = alloca %struct.S, align 4
-  call void @foo(%struct.S* sret %s)
+  call void @foo(%struct.S* sret(%struct.S) %s)
   ret void
 }
 
 define void @test2() {
 entry:
   %t = alloca %struct.T, align 8
-  call void @bar(%struct.T* sret %t)
+  call void @bar(%struct.T* sret(%struct.T) %t)
   ret void
 }
 
-declare void @foo(%struct.S* sret)
-declare void @bar(%struct.T* sret)
+declare void @foo(%struct.S* sret(%struct.S))
+declare void @bar(%struct.T* sret(%struct.T))
 
 ; MIR:      name:            test1
 ; MIR:      stack:
diff --git a/llvm/test/CodeGen/PowerPC/emptystruct.ll b/llvm/test/CodeGen/PowerPC/emptystruct.ll
index aaa15ab13b6e..b8222c0ba2f7 100644
--- a/llvm/test/CodeGen/PowerPC/emptystruct.ll
+++ b/llvm/test/CodeGen/PowerPC/emptystruct.ll
@@ -14,7 +14,7 @@ target triple = "powerpc64-unknown-linux-gnu"
 
 %struct.empty = type {}
 
-define void @callee(%struct.empty* noalias sret %agg.result, %struct.empty* byval(%struct.empty) %a1, %struct.empty* %a2, %struct.empty* byval(%struct.empty) %a3) nounwind {
+define void @callee(%struct.empty* noalias sret(%struct.empty) %agg.result, %struct.empty* byval(%struct.empty) %a1, %struct.empty* %a2, %struct.empty* byval(%struct.empty) %a3) nounwind {
 entry:
   %a2.addr = alloca %struct.empty*, align 8
   store %struct.empty* %a2, %struct.empty** %a2.addr, align 8
@@ -33,12 +33,12 @@ entry:
 
 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind
 
-define void @caller(%struct.empty* noalias sret %agg.result) nounwind {
+define void @caller(%struct.empty* noalias sret(%struct.empty) %agg.result) nounwind {
 entry:
   %e1 = alloca %struct.empty, align 1
   %e2 = alloca %struct.empty, align 1
   %e3 = alloca %struct.empty, align 1
-  call void @callee(%struct.empty* sret %agg.result, %struct.empty* byval(%struct.empty) %e1, %struct.empty* %e2, %struct.empty* byval(%struct.empty) %e3)
+  call void @callee(%struct.empty* sret(%struct.empty) %agg.result, %struct.empty* byval(%struct.empty) %e1, %struct.empty* %e2, %struct.empty* byval(%struct.empty) %e3)
   ret void
 }
 
diff --git a/llvm/test/CodeGen/PowerPC/fsl-e500mc.ll b/llvm/test/CodeGen/PowerPC/fsl-e500mc.ll
index b1bb09da3e14..d0f8fa856fba 100644
--- a/llvm/test/CodeGen/PowerPC/fsl-e500mc.ll
+++ b/llvm/test/CodeGen/PowerPC/fsl-e500mc.ll
@@ -9,7 +9,7 @@ target triple = "powerpc-fsl-linux"
 
 %struct.teststruct = type { [12 x i32], i32 }
 
-define void @copy(%struct.teststruct* noalias nocapture sret %agg.result, %struct.teststruct* nocapture %in) nounwind {
+define void @copy(%struct.teststruct* noalias nocapture sret(%struct.teststruct) %agg.result, %struct.teststruct* nocapture %in) nounwind {
 entry:
 ; CHECK: @copy
 ; CHECK-NOT: bl memcpy
diff --git a/llvm/test/CodeGen/PowerPC/fsl-e5500.ll b/llvm/test/CodeGen/PowerPC/fsl-e5500.ll
index 595d91ad6206..93d05fe48a4a 100644
--- a/llvm/test/CodeGen/PowerPC/fsl-e5500.ll
+++ b/llvm/test/CodeGen/PowerPC/fsl-e5500.ll
@@ -9,7 +9,7 @@ target triple = "powerpc64-fsl-linux"
 
 %struct.teststruct = type { [24 x i32], i32 }
 
-define void @copy(%struct.teststruct* noalias nocapture sret %agg.result, %struct.teststruct* nocapture %in) nounwind {
+define void @copy(%struct.teststruct* noalias nocapture sret(%struct.teststruct) %agg.result, %struct.teststruct* nocapture %in) nounwind {
 entry:
 ; CHECK: @copy
 ; CHECK-NOT: bl memcpy
diff --git a/llvm/test/CodeGen/PowerPC/ppc-empty-fs.ll b/llvm/test/CodeGen/PowerPC/ppc-empty-fs.ll
index 71fd1821360e..dbeaa94a9a72 100644
--- a/llvm/test/CodeGen/PowerPC/ppc-empty-fs.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc-empty-fs.ll
@@ -8,7 +8,7 @@ target triple = "powerpc64-unknown-linux-gnu"
 %struct.fab = type { float, float }
 
 ; Function Attrs: nounwind
-define void @func_fab(%struct.fab* noalias sret %agg.result, i64 %x.coerce) #0 {
+define void @func_fab(%struct.fab* noalias sret(%struct.fab) %agg.result, i64 %x.coerce) #0 {
 entry:
   %x = alloca %struct.fab, align 8
   %0 = bitcast %struct.fab* %x to i64*
diff --git a/llvm/test/CodeGen/PowerPC/ppc440-fp-basic.ll b/llvm/test/CodeGen/PowerPC/ppc440-fp-basic.ll
index d01ddbef7adf..ed8553dde0ef 100644
--- a/llvm/test/CodeGen/PowerPC/ppc440-fp-basic.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc440-fp-basic.ll
@@ -2,7 +2,7 @@
 
 %0 = type { double, double }
 
-define void @maybe_an_fma(%0* sret %agg.result, %0* byval(%0) %a, %0* byval(%0) %b, %0* byval(%0) %c) nounwind {
+define void @maybe_an_fma(%0* sret(%0) %agg.result, %0* byval(%0) %a, %0* byval(%0) %b, %0* byval(%0) %c) nounwind {
 entry:
   %a.realp = getelementptr inbounds %0, %0* %a, i32 0, i32 0
   %a.real = load double, double* %a.realp
diff --git a/llvm/test/CodeGen/PowerPC/ppc64-sibcall.ll b/llvm/test/CodeGen/PowerPC/ppc64-sibcall.ll
index 65f7243fb673..61a588f9bb87 100644
--- a/llvm/test/CodeGen/PowerPC/ppc64-sibcall.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc64-sibcall.ll
@@ -87,15 +87,15 @@ entry:
 ; Struct return test
 
 ; Function Attrs: noinline nounwind
-define void @callee_sret_56(%S_56* noalias sret %agg.result) #0 { ret void }
-define void @callee_sret_32(%S_32* noalias sret %agg.result) #0 { ret void }
+define void @callee_sret_56(%S_56* noalias sret(%S_56) %agg.result) #0 { ret void }
+define void @callee_sret_32(%S_32* noalias sret(%S_32) %agg.result) #0 { ret void }
 
 ; Function Attrs: nounwind
-define void @caller_do_something_sret_32(%S_32* noalias sret %agg.result) #1 {
+define void @caller_do_something_sret_32(%S_32* noalias sret(%S_32) %agg.result) #1 {
   %1 = alloca %S_56, align 4
   %2 = bitcast %S_56* %1 to i8*
-  call void @callee_sret_56(%S_56* nonnull sret %1)
-  tail call void @callee_sret_32(%S_32* sret %agg.result)
+  call void @callee_sret_56(%S_56* nonnull sret(%S_56) %1)
+  tail call void @callee_sret_32(%S_32* sret(%S_32) %agg.result)
   ret void
 
 ; CHECK-SCO-LABEL: caller_do_something_sret_32:
@@ -107,7 +107,7 @@ define void @caller_do_something_sret_32(%S_32* noalias sret %agg.result) #1 {
 
 define void @caller_local_sret_32(%S_32* %a) #1 {
   %tmp = alloca %S_32, align 4
-  tail call void @callee_sret_32(%S_32* nonnull sret %tmp)
+  tail call void @callee_sret_32(%S_32* nonnull sret(%S_32) %tmp)
   ret void
 
 ; CHECK-SCO-LABEL: caller_local_sret_32:
diff --git a/llvm/test/CodeGen/PowerPC/ppc64-smallarg.ll b/llvm/test/CodeGen/PowerPC/ppc64-smallarg.ll
index 885e199b0027..276620cc30e1 100644
--- a/llvm/test/CodeGen/PowerPC/ppc64-smallarg.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc64-smallarg.ll
@@ -28,7 +28,7 @@ entry:
 define void @caller1() {
 entry:
   %tmp = alloca %struct.small_arg, align 2
-  call void @test1(%struct.small_arg* sret %tmp, %struct.large_arg* byval(%struct.large_arg) @gl, %struct.small_arg* byval(%struct.small_arg) @gs)
+  call void @test1(%struct.small_arg* sret(%struct.small_arg) %tmp, %struct.large_arg* byval(%struct.large_arg) @gl, %struct.small_arg* byval(%struct.small_arg) @gs)
   ret void
 }
 ; CHECK: @caller1
diff --git a/llvm/test/CodeGen/PowerPC/ppc64le-smallarg.ll b/llvm/test/CodeGen/PowerPC/ppc64le-smallarg.ll
index bd5f29a01183..b3866d29f7c4 100644
--- a/llvm/test/CodeGen/PowerPC/ppc64le-smallarg.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc64le-smallarg.ll
@@ -13,7 +13,7 @@ target triple = "powerpc64le-unknown-linux-gnu"
 @gs = common global %struct.small_arg zeroinitializer, align 2
 @gf = common global float 0.000000e+00, align 4
 
-define void @callee1(%struct.small_arg* noalias nocapture sret %agg.result, %struct.large_arg* byval(%struct.large_arg) nocapture readnone %pad, %struct.small_arg* byval(%struct.small_arg) nocapture readonly %x) {
+define void @callee1(%struct.small_arg* noalias nocapture sret(%struct.small_arg) %agg.result, %struct.large_arg* byval(%struct.large_arg) nocapture readnone %pad, %struct.small_arg* byval(%struct.small_arg) nocapture readonly %x) {
 entry:
   %0 = bitcast %struct.small_arg* %x to i32*
   %1 = bitcast %struct.small_arg* %agg.result to i32*
@@ -28,7 +28,7 @@ entry:
 define void @caller1() {
 entry:
   %tmp = alloca %struct.small_arg, align 2
-  call void @test1(%struct.small_arg* sret %tmp, %struct.large_arg* byval(%struct.large_arg) @gl, %struct.small_arg* byval(%struct.small_arg) @gs)
+  call void @test1(%struct.small_arg* sret(%struct.small_arg) %tmp, %struct.large_arg* byval(%struct.large_arg) @gl, %struct.small_arg* byval(%struct.small_arg) @gs)
   ret void
 }
 ; CHECK: @caller1
diff --git a/llvm/test/CodeGen/PowerPC/pr17354.ll b/llvm/test/CodeGen/PowerPC/pr17354.ll
index 0f77e5936aa1..83a9ac981862 100644
--- a/llvm/test/CodeGen/PowerPC/pr17354.ll
+++ b/llvm/test/CodeGen/PowerPC/pr17354.ll
@@ -14,7 +14,7 @@ target triple = "powerpc64-unknown-linux-gnu"
 
 define internal void @__cxx_global_var_init() section ".text.startup" {
 entry:
-  call void @_Z4funcv(%struct.CS* sret getelementptr inbounds ([1 x %struct.CS], [1 x %struct.CS]* @_ZL3glb, i64 0, i64 0))
+  call void @_Z4funcv(%struct.CS* sret(%struct.CS) getelementptr inbounds ([1 x %struct.CS], [1 x %struct.CS]* @_ZL3glb, i64 0, i64 0))
   ret void
 }
 
@@ -23,7 +23,7 @@ entry:
 ; CHECK-NEXT: nop
 
 ; Function Attrs: nounwind
-define void @_Z4funcv(%struct.CS* noalias sret %agg.result) #0 {
+define void @_Z4funcv(%struct.CS* noalias sret(%struct.CS) %agg.result) #0 {
 entry:
   %a_ = getelementptr inbounds %struct.CS, %struct.CS* %agg.result, i32 0, i32 0
   store i32 0, i32* %a_, align 4
diff --git a/llvm/test/CodeGen/PowerPC/pr18663.ll b/llvm/test/CodeGen/PowerPC/pr18663.ll
index 331870e456f3..8e66858b893a 100644
--- a/llvm/test/CodeGen/PowerPC/pr18663.ll
+++ b/llvm/test/CodeGen/PowerPC/pr18663.ll
@@ -59,7 +59,7 @@
 %struct.TriaNumberCache.52.52 = type { %struct.TriaNumberCache.53.51, i32, %"class.std::vector.12.15", i32, %"class.std::vector.12.15" }
 %struct.TriaNumberCache.53.51 = type { i32, %"class.std::vector.12.15", i32, %"class.std::vector.12.15" }
 
-define void @_ZNK18TriaObjectAccessorILi3ELi3EE10barycenterEv(%class.Point.1* noalias nocapture sret %agg.result, %class.TriaObjectAccessor.57* %this) #0 align 2 {
+define void @_ZNK18TriaObjectAccessorILi3ELi3EE10barycenterEv(%class.Point.1* noalias nocapture sret(%class.Point.1) %agg.result, %class.TriaObjectAccessor.57* %this) #0 align 2 {
 entry:
   %0 = load double, double* null, align 8
   %1 = load double, double* undef, align 8
diff --git a/llvm/test/CodeGen/PowerPC/resolvefi-basereg.ll b/llvm/test/CodeGen/PowerPC/resolvefi-basereg.ll
index bffe770237cb..2443b7d532a2 100644
--- a/llvm/test/CodeGen/PowerPC/resolvefi-basereg.ll
+++ b/llvm/test/CodeGen/PowerPC/resolvefi-basereg.ll
@@ -332,7 +332,7 @@ if.end:                                           ; preds = %if.then, %entry
   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %62, i8* align 16 bitcast (%struct.S1998* @s1998 to i8*), i64 5168, i1 false)
   %63 = bitcast %struct.S1998* %agg.tmp112 to i8*
   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %63, i8* align 16 bitcast (%struct.S1998* getelementptr inbounds ([5 x %struct.S1998], [5 x %struct.S1998]* @a1998, i32 0, i64 2) to i8*), i64 5168, i1 false)
-  call void @check1998(%struct.S1998* sret %agg.tmp, %struct.S1998* byval(%struct.S1998) align 16 %agg.tmp111, %struct.S1998* getelementptr inbounds ([5 x %struct.S1998], [5 x %struct.S1998]* @a1998, i32 0, i64 1), %struct.S1998* byval(%struct.S1998) align 16 %agg.tmp112)
+  call void @check1998(%struct.S1998* sret(%struct.S1998) %agg.tmp, %struct.S1998* byval(%struct.S1998) align 16 %agg.tmp111, %struct.S1998* getelementptr inbounds ([5 x %struct.S1998], [5 x %struct.S1998]* @a1998, i32 0, i64 1), %struct.S1998* byval(%struct.S1998) align 16 %agg.tmp112)
   call void @checkx1998(%struct.S1998* byval(%struct.S1998) align 16 %agg.tmp)
   %64 = bitcast %struct.S1998* %agg.tmp113 to i8*
   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %64, i8* align 16 bitcast (%struct.S1998* @s1998 to i8*), i64 5168, i1 false)
diff --git a/llvm/test/CodeGen/PowerPC/resolvefi-disp.ll b/llvm/test/CodeGen/PowerPC/resolvefi-disp.ll
index 3af2501a907f..0bbb01d51170 100644
--- a/llvm/test/CodeGen/PowerPC/resolvefi-disp.ll
+++ b/llvm/test/CodeGen/PowerPC/resolvefi-disp.ll
@@ -20,7 +20,7 @@ target triple = "powerpc64le-unknown-linux-gnu"
 @s2760 = external global %struct.S2760
 @fails = external global i32
 
-define void @check2760(%struct.S2760* noalias sret %agg.result, %struct.S2760* byval(%struct.S2760) align 16, %struct.S2760* %arg1, %struct.S2760* byval(%struct.S2760) align 16) {
+define void @check2760(%struct.S2760* noalias sret(%struct.S2760) %agg.result, %struct.S2760* byval(%struct.S2760) align 16, %struct.S2760* %arg1, %struct.S2760* byval(%struct.S2760) align 16) {
 entry:
   %arg0 = alloca %struct.S2760, align 32
   %arg2 = alloca %struct.S2760, align 32
diff --git a/llvm/test/CodeGen/PowerPC/tailcall-string-rvo.ll b/llvm/test/CodeGen/PowerPC/tailcall-string-rvo.ll
index c48ee467031c..86e7021cd26c 100644
--- a/llvm/test/CodeGen/PowerPC/tailcall-string-rvo.ll
+++ b/llvm/test/CodeGen/PowerPC/tailcall-string-rvo.ll
@@ -16,15 +16,15 @@ target triple = "powerpc64le-linux-gnu"
 %"struct.__gnu_cxx::__vstring_utility<char, std::char_traits<char>, std::allocator<char> >::_Alloc_hider.7.38.69" = type { i8* }
 %union.anon.8.39.70 = type { i64, [8 x i8] }
 
-declare void @TestBaz(%class.basic_string.11.42.73* noalias sret %arg)
+declare void @TestBaz(%class.basic_string.11.42.73* noalias sret(%class.basic_string.11.42.73) %arg)
 
-define void @TestBar(%class.basic_string.11.42.73* noalias sret %arg) {
+define void @TestBar(%class.basic_string.11.42.73* noalias sret(%class.basic_string.11.42.73) %arg) {
 bb:
-  call void @TestBaz(%class.basic_string.11.42.73* noalias sret %arg)
+  call void @TestBaz(%class.basic_string.11.42.73* noalias sret(%class.basic_string.11.42.73) %arg)
   ret void
 }
 
-define void @TestFoo(%class.basic_string.11.42.73* noalias sret %arg) {
+define void @TestFoo(%class.basic_string.11.42.73* noalias sret(%class.basic_string.11.42.73) %arg) {
 ; CHECK-LABEL: TestFoo:
 ; CHECK: #TC_RETURNd8 TestBar 0
 bb:
@@ -37,7 +37,7 @@ bb:
   store i64 13, i64* %tmp3, align 8
   %tmp4 = getelementptr inbounds %class.basic_string.11.42.73, %class.basic_string.11.42.73* %arg, i64 0, i32 0, i32 0, i32 2, i32 1, i64 5
   store i8 0, i8* %tmp4, align 1
-  tail call void @TestBar(%class.basic_string.11.42.73* noalias sret %arg)
+  tail call void @TestBar(%class.basic_string.11.42.73* noalias sret(%class.basic_string.11.42.73) %arg)
   ret void
 }
 
diff --git a/llvm/test/CodeGen/PowerPC/toc-load-sched-bug.ll b/llvm/test/CodeGen/PowerPC/toc-load-sched-bug.ll
index 1ebc8d5143d0..c81ab71a62c8 100644
--- a/llvm/test/CodeGen/PowerPC/toc-load-sched-bug.ll
+++ b/llvm/test/CodeGen/PowerPC/toc-load-sched-bug.ll
@@ -184,7 +184,7 @@ entry:
   %2 = load i64, i64* %_M_length.i.i, align 8, !tbaa !7
   %.fca.0.insert18 = insertvalue [2 x i64] undef, i64 %1, 0
   %.fca.1.insert21 = insertvalue [2 x i64] %.fca.0.insert18, i64 %2, 1
-  call void @_ZN4llvm12MemoryBuffer14getFileOrSTDINENS_9StringRefEl(%"class.llvm::ErrorOr"* sret %FileOrErr, [2 x i64] %.fca.1.insert21, i64 -1) #3
+  call void @_ZN4llvm12MemoryBuffer14getFileOrSTDINENS_9StringRefEl(%"class.llvm::ErrorOr"* sret(%"class.llvm::ErrorOr") %FileOrErr, [2 x i64] %.fca.1.insert21, i64 -1) #3
   %HasError.i24 = getelementptr inbounds %"class.llvm::ErrorOr", %"class.llvm::ErrorOr"* %FileOrErr, i64 0, i32 1
   %bf.load.i25 = load i8, i8* %HasError.i24, align 8
   %3 = and i8 %bf.load.i25, 1
@@ -211,7 +211,7 @@ if.then:                                          ; preds = %_ZNK4llvm7ErrorOrIS
   %vtable.i = load void (%"class.std::basic_string"*, %"class.std::error_category"*, i32)**, void (%"class.std::basic_string"*, %"class.std::error_category"*, i32)*** %6, align 8, !tbaa !11
   %vfn.i = getelementptr inbounds void (%"class.std::basic_string"*, %"class.std::error_category"*, i32)*, void (%"class.std::basic_string"*, %"class.std::error_category"*, i32)** %vtable.i, i64 3
   %7 = load void (%"class.std::basic_string"*, %"class.std::error_category"*, i32)*, void (%"class.std::basic_string"*, %"class.std::error_category"*, i32)** %vfn.i, align 8
-  call void %7(%"class.std::basic_string"* sret %ref.tmp5, %"class.std::error_category"* %.c, i32 signext %phitmp) #3
+  call void %7(%"class.std::basic_string"* sret(%"class.std::basic_string") %ref.tmp5, %"class.std::error_category"* %.c, i32 signext %phitmp) #3
   %call2.i.i = call dereferenceable(8) %"class.std::basic_string"* @_ZNSs6insertEmPKcm(%"class.std::basic_string"* %ref.tmp5, i64 0, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i64 27) #3
   %_M_p2.i.i.i.i = getelementptr inbounds %"class.std::basic_string", %"class.std::basic_string"* %call2.i.i, i64 0, i32 0, i32 0
   %8 = load i8*, i8** %_M_p2.i.i.i.i, align 8, !tbaa !13
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll
index ecf02feff826..6a95771a589e 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll
@@ -331,7 +331,7 @@ entry:
   ret <8 x i16> %1
 }
 
-define void @test16elt(<16 x i16>* noalias nocapture sret %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #3 {
+define void @test16elt(<16 x i16>* noalias nocapture sret(<16 x i16>) %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #3 {
 ; CHECK-P8-LABEL: test16elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    lvx v5, 0, r4
@@ -979,7 +979,7 @@ entry:
   ret <8 x i16> %1
 }
 
-define void @test16elt_signed(<16 x i16>* noalias nocapture sret %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #3 {
+define void @test16elt_signed(<16 x i16>* noalias nocapture sret(<16 x i16>) %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #3 {
 ; CHECK-P8-LABEL: test16elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    lvx v5, 0, r4
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i64_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i64_elts.ll
index fe87bea1c138..a94e1f235914 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i64_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i64_elts.ll
@@ -41,7 +41,7 @@ entry:
   ret <2 x i64> %1
 }
 
-define void @test4elt(<4 x i64>* noalias nocapture sret %agg.result, <4 x float> %a) local_unnamed_addr #1 {
+define void @test4elt(<4 x i64>* noalias nocapture sret(<4 x i64>) %agg.result, <4 x float> %a) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test4elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    xxmrglw vs0, v2, v2
@@ -86,7 +86,7 @@ entry:
   ret void
 }
 
-define void @test8elt(<8 x i64>* noalias nocapture sret %agg.result, <8 x float>* nocapture readonly) local_unnamed_addr #2 {
+define void @test8elt(<8 x i64>* noalias nocapture sret(<8 x i64>) %agg.result, <8 x float>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test8elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -166,7 +166,7 @@ entry:
   ret void
 }
 
-define void @test16elt(<16 x i64>* noalias nocapture sret %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #2 {
+define void @test16elt(<16 x i64>* noalias nocapture sret(<16 x i64>) %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test16elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r7, 48
@@ -340,7 +340,7 @@ entry:
   ret <2 x i64> %1
 }
 
-define void @test4elt_signed(<4 x i64>* noalias nocapture sret %agg.result, <4 x float> %a) local_unnamed_addr #1 {
+define void @test4elt_signed(<4 x i64>* noalias nocapture sret(<4 x i64>) %agg.result, <4 x float> %a) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test4elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    xxmrglw vs0, v2, v2
@@ -385,7 +385,7 @@ entry:
   ret void
 }
 
-define void @test8elt_signed(<8 x i64>* noalias nocapture sret %agg.result, <8 x float>* nocapture readonly) local_unnamed_addr #2 {
+define void @test8elt_signed(<8 x i64>* noalias nocapture sret(<8 x i64>) %agg.result, <8 x float>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test8elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -465,7 +465,7 @@ entry:
   ret void
 }
 
-define void @test16elt_signed(<16 x i64>* noalias nocapture sret %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #2 {
+define void @test16elt_signed(<16 x i64>* noalias nocapture sret(<16 x i64>) %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test16elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r7, 48
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll
index 0e0a3240f471..26db909198d5 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll
@@ -290,7 +290,7 @@ entry:
   ret <8 x i16> %1
 }
 
-define void @test16elt(<16 x i16>* noalias nocapture sret %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #3 {
+define void @test16elt(<16 x i16>* noalias nocapture sret(<16 x i16>) %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #3 {
 ; CHECK-P8-LABEL: test16elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -853,7 +853,7 @@ entry:
   ret <8 x i16> %1
 }
 
-define void @test16elt_signed(<16 x i16>* noalias nocapture sret %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #3 {
+define void @test16elt_signed(<16 x i16>* noalias nocapture sret(<16 x i16>) %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #3 {
 ; CHECK-P8-LABEL: test16elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll
index c0d2dd35aeb8..887cee610b8b 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll
@@ -97,7 +97,7 @@ entry:
   ret <4 x i32> %1
 }
 
-define void @test8elt(<8 x i32>* noalias nocapture sret %agg.result, <8 x double>* nocapture readonly) local_unnamed_addr #2 {
+define void @test8elt(<8 x i32>* noalias nocapture sret(<8 x i32>) %agg.result, <8 x double>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test8elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 32
@@ -171,7 +171,7 @@ entry:
   ret void
 }
 
-define void @test16elt(<16 x i32>* noalias nocapture sret %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #2 {
+define void @test16elt(<16 x i32>* noalias nocapture sret(<16 x i32>) %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test16elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 32
@@ -389,7 +389,7 @@ entry:
   ret <4 x i32> %1
 }
 
-define void @test8elt_signed(<8 x i32>* noalias nocapture sret %agg.result, <8 x double>* nocapture readonly) local_unnamed_addr #2 {
+define void @test8elt_signed(<8 x i32>* noalias nocapture sret(<8 x i32>) %agg.result, <8 x double>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test8elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 32
@@ -463,7 +463,7 @@ entry:
   ret void
 }
 
-define void @test16elt_signed(<16 x i32>* noalias nocapture sret %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #2 {
+define void @test16elt_signed(<16 x i32>* noalias nocapture sret(<16 x i32>) %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test16elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 32
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_4byte_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_4byte_elts.ll
index 4a4f332225af..a09fbf2000b7 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_4byte_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_4byte_elts.ll
@@ -60,7 +60,7 @@ entry:
   ret <4 x i32> %0
 }
 
-define void @test8elt(<8 x i32>* noalias nocapture sret %agg.result, <8 x float>* nocapture readonly) local_unnamed_addr #2 {
+define void @test8elt(<8 x i32>* noalias nocapture sret(<8 x i32>) %agg.result, <8 x float>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test8elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -98,7 +98,7 @@ entry:
   ret void
 }
 
-define void @test16elt(<16 x i32>* noalias nocapture sret %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #2 {
+define void @test16elt(<16 x i32>* noalias nocapture sret(<16 x i32>) %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test16elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -207,7 +207,7 @@ entry:
   ret <4 x i32> %0
 }
 
-define void @test8elt_signed(<8 x i32>* noalias nocapture sret %agg.result, <8 x float>* nocapture readonly) local_unnamed_addr #2 {
+define void @test8elt_signed(<8 x i32>* noalias nocapture sret(<8 x i32>) %agg.result, <8 x float>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test8elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -245,7 +245,7 @@ entry:
   ret void
 }
 
-define void @test16elt_signed(<16 x i32>* noalias nocapture sret %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #2 {
+define void @test16elt_signed(<16 x i32>* noalias nocapture sret(<16 x i32>) %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test16elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_8byte_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_8byte_elts.ll
index dfca814cab23..b8a55d7ef448 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_8byte_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_8byte_elts.ll
@@ -29,7 +29,7 @@ entry:
   ret <2 x i64> %0
 }
 
-define void @test4elt(<4 x i64>* noalias nocapture sret %agg.result, <4 x double>* nocapture readonly) local_unnamed_addr #1 {
+define void @test4elt(<4 x i64>* noalias nocapture sret(<4 x i64>) %agg.result, <4 x double>* nocapture readonly) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test4elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -67,7 +67,7 @@ entry:
   ret void
 }
 
-define void @test8elt(<8 x i64>* noalias nocapture sret %agg.result, <8 x double>* nocapture readonly) local_unnamed_addr #1 {
+define void @test8elt(<8 x i64>* noalias nocapture sret(<8 x i64>) %agg.result, <8 x double>* nocapture readonly) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test8elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -125,7 +125,7 @@ entry:
   ret void
 }
 
-define void @test16elt(<16 x i64>* noalias nocapture sret %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #1 {
+define void @test16elt(<16 x i64>* noalias nocapture sret(<16 x i64>) %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test16elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -243,7 +243,7 @@ entry:
   ret <2 x i64> %0
 }
 
-define void @test4elt_signed(<4 x i64>* noalias nocapture sret %agg.result, <4 x double>* nocapture readonly) local_unnamed_addr #1 {
+define void @test4elt_signed(<4 x i64>* noalias nocapture sret(<4 x i64>) %agg.result, <4 x double>* nocapture readonly) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test4elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -281,7 +281,7 @@ entry:
   ret void
 }
 
-define void @test8elt_signed(<8 x i64>* noalias nocapture sret %agg.result, <8 x double>* nocapture readonly) local_unnamed_addr #1 {
+define void @test8elt_signed(<8 x i64>* noalias nocapture sret(<8 x i64>) %agg.result, <8 x double>* nocapture readonly) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test8elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -339,7 +339,7 @@ entry:
   ret void
 }
 
-define void @test16elt_signed(<16 x i64>* noalias nocapture sret %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #1 {
+define void @test16elt_signed(<16 x i64>* noalias nocapture sret(<16 x i64>) %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test16elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
index 60fb0c29b558..ee03a5edf13e 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
@@ -110,7 +110,7 @@ entry:
   ret <4 x float> %1
 }
 
-define void @test8elt(<8 x float>* noalias nocapture sret %agg.result, <8 x i16> %a) local_unnamed_addr #2 {
+define void @test8elt(<8 x float>* noalias nocapture sret(<8 x float>) %agg.result, <8 x i16> %a) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test8elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    xxlxor v3, v3, v3
@@ -156,7 +156,7 @@ entry:
   ret void
 }
 
-define void @test16elt(<16 x float>* noalias nocapture sret %agg.result, <16 x i16>* nocapture readonly) local_unnamed_addr #3 {
+define void @test16elt(<16 x float>* noalias nocapture sret(<16 x float>) %agg.result, <16 x i16>* nocapture readonly) local_unnamed_addr #3 {
 ; CHECK-P8-LABEL: test16elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    addis r5, r2, .LCPI3_0@toc@ha
@@ -342,7 +342,7 @@ entry:
   ret <4 x float> %1
 }
 
-define void @test8elt_signed(<8 x float>* noalias nocapture sret %agg.result, <8 x i16> %a) local_unnamed_addr #2 {
+define void @test8elt_signed(<8 x float>* noalias nocapture sret(<8 x float>) %agg.result, <8 x i16> %a) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test8elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    vmrglh v4, v2, v2
@@ -393,7 +393,7 @@ entry:
   ret void
 }
 
-define void @test16elt_signed(<16 x float>* noalias nocapture sret %agg.result, <16 x i16>* nocapture readonly) local_unnamed_addr #3 {
+define void @test16elt_signed(<16 x float>* noalias nocapture sret(<16 x float>) %agg.result, <16 x i16>* nocapture readonly) local_unnamed_addr #3 {
 ; CHECK-P8-LABEL: test16elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
index 903b492e3396..99a103103096 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
@@ -48,7 +48,7 @@ entry:
   ret <2 x double> %1
 }
 
-define void @test4elt(<4 x double>* noalias nocapture sret %agg.result, i64 %a.coerce) local_unnamed_addr #1 {
+define void @test4elt(<4 x double>* noalias nocapture sret(<4 x double>) %agg.result, i64 %a.coerce) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test4elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    addis r5, r2, .LCPI1_0@toc@ha
@@ -112,7 +112,7 @@ entry:
   ret void
 }
 
-define void @test8elt(<8 x double>* noalias nocapture sret %agg.result, <8 x i16> %a) local_unnamed_addr #2 {
+define void @test8elt(<8 x double>* noalias nocapture sret(<8 x double>) %agg.result, <8 x i16> %a) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test8elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    addis r4, r2, .LCPI2_0@toc@ha
@@ -212,7 +212,7 @@ entry:
   ret void
 }
 
-define void @test16elt(<16 x double>* noalias nocapture sret %agg.result, <16 x i16>* nocapture readonly) local_unnamed_addr #3 {
+define void @test16elt(<16 x double>* noalias nocapture sret(<16 x double>) %agg.result, <16 x i16>* nocapture readonly) local_unnamed_addr #3 {
 ; CHECK-P8-LABEL: test16elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    addis r6, r2, .LCPI3_2@toc@ha
@@ -407,7 +407,7 @@ entry:
   ret <2 x double> %1
 }
 
-define void @test4elt_signed(<4 x double>* noalias nocapture sret %agg.result, i64 %a.coerce) local_unnamed_addr #1 {
+define void @test4elt_signed(<4 x double>* noalias nocapture sret(<4 x double>) %agg.result, i64 %a.coerce) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test4elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    addis r5, r2, .LCPI5_0@toc@ha
@@ -481,7 +481,7 @@ entry:
   ret void
 }
 
-define void @test8elt_signed(<8 x double>* noalias nocapture sret %agg.result, <8 x i16> %a) local_unnamed_addr #2 {
+define void @test8elt_signed(<8 x double>* noalias nocapture sret(<8 x double>) %agg.result, <8 x i16> %a) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test8elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    addis r5, r2, .LCPI6_2@toc@ha
@@ -599,7 +599,7 @@ entry:
   ret void
 }
 
-define void @test16elt_signed(<16 x double>* noalias nocapture sret %agg.result, <16 x i16>* nocapture readonly) local_unnamed_addr #3 {
+define void @test16elt_signed(<16 x double>* noalias nocapture sret(<16 x double>) %agg.result, <16 x i16>* nocapture readonly) local_unnamed_addr #3 {
 ; CHECK-P8-LABEL: test16elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    addis r5, r2, .LCPI7_0@toc@ha
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_i32_to_fp64_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_i32_to_fp64_elts.ll
index 71a1718ab877..a96a0e55b4e2 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_i32_to_fp64_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_i32_to_fp64_elts.ll
@@ -38,7 +38,7 @@ entry:
   ret <2 x double> %1
 }
 
-define void @test4elt(<4 x double>* noalias nocapture sret %agg.result, <4 x i32> %a) local_unnamed_addr #1 {
+define void @test4elt(<4 x double>* noalias nocapture sret(<4 x double>) %agg.result, <4 x i32> %a) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test4elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    xxmrglw v3, v2, v2
@@ -77,7 +77,7 @@ entry:
   ret void
 }
 
-define void @test8elt(<8 x double>* noalias nocapture sret %agg.result, <8 x i32>* nocapture readonly) local_unnamed_addr #2 {
+define void @test8elt(<8 x double>* noalias nocapture sret(<8 x double>) %agg.result, <8 x i32>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test8elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -145,7 +145,7 @@ entry:
   ret void
 }
 
-define void @test16elt(<16 x double>* noalias nocapture sret %agg.result, <16 x i32>* nocapture readonly) local_unnamed_addr #2 {
+define void @test16elt(<16 x double>* noalias nocapture sret(<16 x double>) %agg.result, <16 x i32>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test16elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -292,7 +292,7 @@ entry:
   ret <2 x double> %1
 }
 
-define void @test4elt_signed(<4 x double>* noalias nocapture sret %agg.result, <4 x i32> %a) local_unnamed_addr #1 {
+define void @test4elt_signed(<4 x double>* noalias nocapture sret(<4 x double>) %agg.result, <4 x i32> %a) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test4elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    xxmrglw v3, v2, v2
@@ -331,7 +331,7 @@ entry:
   ret void
 }
 
-define void @test8elt_signed(<8 x double>* noalias nocapture sret %agg.result, <8 x i32>* nocapture readonly) local_unnamed_addr #2 {
+define void @test8elt_signed(<8 x double>* noalias nocapture sret(<8 x double>) %agg.result, <8 x i32>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test8elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -399,7 +399,7 @@ entry:
   ret void
 }
 
-define void @test16elt_signed(<16 x double>* noalias nocapture sret %agg.result, <16 x i32>* nocapture readonly) local_unnamed_addr #2 {
+define void @test16elt_signed(<16 x double>* noalias nocapture sret(<16 x double>) %agg.result, <16 x i32>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test16elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll
index 2e757152e428..8dd041aa25dc 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll
@@ -98,7 +98,7 @@ entry:
   ret <4 x float> %1
 }
 
-define void @test8elt(<8 x float>* noalias nocapture sret %agg.result, <8 x i64>* nocapture readonly) local_unnamed_addr #2 {
+define void @test8elt(<8 x float>* noalias nocapture sret(<8 x float>) %agg.result, <8 x i64>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test8elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 32
@@ -172,7 +172,7 @@ entry:
   ret void
 }
 
-define void @test16elt(<16 x float>* noalias nocapture sret %agg.result, <16 x i64>* nocapture readonly) local_unnamed_addr #2 {
+define void @test16elt(<16 x float>* noalias nocapture sret(<16 x float>) %agg.result, <16 x i64>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test16elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 32
@@ -391,7 +391,7 @@ entry:
   ret <4 x float> %1
 }
 
-define void @test8elt_signed(<8 x float>* noalias nocapture sret %agg.result, <8 x i64>* nocapture readonly) local_unnamed_addr #2 {
+define void @test8elt_signed(<8 x float>* noalias nocapture sret(<8 x float>) %agg.result, <8 x i64>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test8elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 32
@@ -465,7 +465,7 @@ entry:
   ret void
 }
 
-define void @test16elt_signed(<16 x float>* noalias nocapture sret %agg.result, <16 x i64>* nocapture readonly) local_unnamed_addr #2 {
+define void @test16elt_signed(<16 x float>* noalias nocapture sret(<16 x float>) %agg.result, <16 x i64>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test16elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 32
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
index 1962ffa65311..6f0f6fd26ed0 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
@@ -116,7 +116,7 @@ entry:
   ret <4 x float> %1
 }
 
-define void @test8elt(<8 x float>* noalias nocapture sret %agg.result, i64 %a.coerce) local_unnamed_addr #2 {
+define void @test8elt(<8 x float>* noalias nocapture sret(<8 x float>) %agg.result, i64 %a.coerce) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test8elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    addis r5, r2, .LCPI2_0@toc@ha
@@ -178,7 +178,7 @@ entry:
   ret void
 }
 
-define void @test16elt(<16 x float>* noalias nocapture sret %agg.result, <16 x i8> %a) local_unnamed_addr #3 {
+define void @test16elt(<16 x float>* noalias nocapture sret(<16 x float>) %agg.result, <16 x i8> %a) local_unnamed_addr #3 {
 ; CHECK-P8-LABEL: test16elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    addis r4, r2, .LCPI3_0@toc@ha
@@ -384,7 +384,7 @@ entry:
   ret <4 x float> %1
 }
 
-define void @test8elt_signed(<8 x float>* noalias nocapture sret %agg.result, i64 %a.coerce) local_unnamed_addr #2 {
+define void @test8elt_signed(<8 x float>* noalias nocapture sret(<8 x float>) %agg.result, i64 %a.coerce) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test8elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    addis r5, r2, .LCPI6_0@toc@ha
@@ -454,7 +454,7 @@ entry:
   ret void
 }
 
-define void @test16elt_signed(<16 x float>* noalias nocapture sret %agg.result, <16 x i8> %a) local_unnamed_addr #3 {
+define void @test16elt_signed(<16 x float>* noalias nocapture sret(<16 x float>) %agg.result, <16 x i8> %a) local_unnamed_addr #3 {
 ; CHECK-P8-LABEL: test16elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    addis r4, r2, .LCPI7_0@toc@ha
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
index c68fa812ffe5..9e4014c8a2db 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
@@ -48,7 +48,7 @@ entry:
   ret <2 x double> %1
 }
 
-define void @test4elt(<4 x double>* noalias nocapture sret %agg.result, i32 %a.coerce) local_unnamed_addr #1 {
+define void @test4elt(<4 x double>* noalias nocapture sret(<4 x double>) %agg.result, i32 %a.coerce) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test4elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    addis r5, r2, .LCPI1_0@toc@ha
@@ -112,7 +112,7 @@ entry:
   ret void
 }
 
-define void @test8elt(<8 x double>* noalias nocapture sret %agg.result, i64 %a.coerce) local_unnamed_addr #1 {
+define void @test8elt(<8 x double>* noalias nocapture sret(<8 x double>) %agg.result, i64 %a.coerce) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test8elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    addis r5, r2, .LCPI2_0@toc@ha
@@ -216,7 +216,7 @@ entry:
   ret void
 }
 
-define void @test16elt(<16 x double>* noalias nocapture sret %agg.result, <16 x i8> %a) local_unnamed_addr #2 {
+define void @test16elt(<16 x double>* noalias nocapture sret(<16 x double>) %agg.result, <16 x i8> %a) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test16elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    addis r4, r2, .LCPI3_0@toc@ha
@@ -440,7 +440,7 @@ entry:
   ret <2 x double> %1
 }
 
-define void @test4elt_signed(<4 x double>* noalias nocapture sret %agg.result, i32 %a.coerce) local_unnamed_addr #1 {
+define void @test4elt_signed(<4 x double>* noalias nocapture sret(<4 x double>) %agg.result, i32 %a.coerce) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test4elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    addis r5, r2, .LCPI5_0@toc@ha
@@ -514,7 +514,7 @@ entry:
   ret void
 }
 
-define void @test8elt_signed(<8 x double>* noalias nocapture sret %agg.result, i64 %a.coerce) local_unnamed_addr #1 {
+define void @test8elt_signed(<8 x double>* noalias nocapture sret(<8 x double>) %agg.result, i64 %a.coerce) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test8elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    addis r5, r2, .LCPI6_0@toc@ha
@@ -636,7 +636,7 @@ entry:
   ret void
 }
 
-define void @test16elt_signed(<16 x double>* noalias nocapture sret %agg.result, <16 x i8> %a) local_unnamed_addr #2 {
+define void @test16elt_signed(<16 x double>* noalias nocapture sret(<16 x double>) %agg.result, <16 x i8> %a) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test16elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    addis r4, r2, .LCPI7_0@toc@ha
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_4byte_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_4byte_elts.ll
index 8e99e032805f..7ec148a02906 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_4byte_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_4byte_elts.ll
@@ -60,7 +60,7 @@ entry:
   ret <4 x float> %0
 }
 
-define void @test8elt(<8 x float>* noalias nocapture sret %agg.result, <8 x i32>* nocapture readonly) local_unnamed_addr #2 {
+define void @test8elt(<8 x float>* noalias nocapture sret(<8 x float>) %agg.result, <8 x i32>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test8elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -98,7 +98,7 @@ entry:
   ret void
 }
 
-define void @test16elt(<16 x float>* noalias nocapture sret %agg.result, <16 x i32>* nocapture readonly) local_unnamed_addr #2 {
+define void @test16elt(<16 x float>* noalias nocapture sret(<16 x float>) %agg.result, <16 x i32>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test16elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -207,7 +207,7 @@ entry:
   ret <4 x float> %0
 }
 
-define void @test8elt_signed(<8 x float>* noalias nocapture sret %agg.result, <8 x i32>* nocapture readonly) local_unnamed_addr #2 {
+define void @test8elt_signed(<8 x float>* noalias nocapture sret(<8 x float>) %agg.result, <8 x i32>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test8elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -245,7 +245,7 @@ entry:
   ret void
 }
 
-define void @test16elt_signed(<16 x float>* noalias nocapture sret %agg.result, <16 x i32>* nocapture readonly) local_unnamed_addr #2 {
+define void @test16elt_signed(<16 x float>* noalias nocapture sret(<16 x float>) %agg.result, <16 x i32>* nocapture readonly) local_unnamed_addr #2 {
 ; CHECK-P8-LABEL: test16elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
diff --git a/llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_8byte_elts.ll b/llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_8byte_elts.ll
index a18eab406657..00443f36c7d2 100644
--- a/llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_8byte_elts.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_8byte_elts.ll
@@ -29,7 +29,7 @@ entry:
   ret <2 x double> %0
 }
 
-define void @test4elt(<4 x double>* noalias nocapture sret %agg.result, <4 x i64>* nocapture readonly) local_unnamed_addr #1 {
+define void @test4elt(<4 x double>* noalias nocapture sret(<4 x double>) %agg.result, <4 x i64>* nocapture readonly) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test4elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -67,7 +67,7 @@ entry:
   ret void
 }
 
-define void @test8elt(<8 x double>* noalias nocapture sret %agg.result, <8 x i64>* nocapture readonly) local_unnamed_addr #1 {
+define void @test8elt(<8 x double>* noalias nocapture sret(<8 x double>) %agg.result, <8 x i64>* nocapture readonly) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test8elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -125,7 +125,7 @@ entry:
   ret void
 }
 
-define void @test16elt(<16 x double>* noalias nocapture sret %agg.result, <16 x i64>* nocapture readonly) local_unnamed_addr #1 {
+define void @test16elt(<16 x double>* noalias nocapture sret(<16 x double>) %agg.result, <16 x i64>* nocapture readonly) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test16elt:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -243,7 +243,7 @@ entry:
   ret <2 x double> %0
 }
 
-define void @test4elt_signed(<4 x double>* noalias nocapture sret %agg.result, <4 x i64>* nocapture readonly) local_unnamed_addr #1 {
+define void @test4elt_signed(<4 x double>* noalias nocapture sret(<4 x double>) %agg.result, <4 x i64>* nocapture readonly) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test4elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -281,7 +281,7 @@ entry:
   ret void
 }
 
-define void @test8elt_signed(<8 x double>* noalias nocapture sret %agg.result, <8 x i64>* nocapture readonly) local_unnamed_addr #1 {
+define void @test8elt_signed(<8 x double>* noalias nocapture sret(<8 x double>) %agg.result, <8 x i64>* nocapture readonly) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test8elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
@@ -339,7 +339,7 @@ entry:
   ret void
 }
 
-define void @test16elt_signed(<16 x double>* noalias nocapture sret %agg.result, <16 x i64>* nocapture readonly) local_unnamed_addr #1 {
+define void @test16elt_signed(<16 x double>* noalias nocapture sret(<16 x double>) %agg.result, <16 x i64>* nocapture readonly) local_unnamed_addr #1 {
 ; CHECK-P8-LABEL: test16elt_signed:
 ; CHECK-P8:       # %bb.0: # %entry
 ; CHECK-P8-NEXT:    li r5, 16
diff --git a/llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll b/llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
index d0ac364d46a7..150d786f4c3b 100644
--- a/llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
+++ b/llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
@@ -939,7 +939,7 @@ define void @caller_large_scalar_ret() nounwind {
 
 ; Check return of >2x xlen structs
 
-define void @callee_large_struct_ret(%struct.large* noalias sret %agg.result) nounwind {
+define void @callee_large_struct_ret(%struct.large* noalias sret(%struct.large) %agg.result) nounwind {
 ; RV32I-FPELIM-LABEL: callee_large_struct_ret:
 ; RV32I-FPELIM:       # %bb.0:
 ; RV32I-FPELIM-NEXT:    addi a1, zero, 1
@@ -1011,7 +1011,7 @@ define i32 @caller_large_struct_ret() nounwind {
 ; RV32I-WITHFP-NEXT:    addi sp, sp, 32
 ; RV32I-WITHFP-NEXT:    ret
   %1 = alloca %struct.large
-  call void @callee_large_struct_ret(%struct.large* sret %1)
+  call void @callee_large_struct_ret(%struct.large* sret(%struct.large) %1)
   %2 = getelementptr inbounds %struct.large, %struct.large* %1, i32 0, i32 0
   %3 = load i32, i32* %2
   %4 = getelementptr inbounds %struct.large, %struct.large* %1, i32 0, i32 3
diff --git a/llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll b/llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll
index 1c4117fc39db..175abe20bdea 100644
--- a/llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll
+++ b/llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll
@@ -479,7 +479,7 @@ define void @caller_large_scalar_ret() nounwind {
 
 ; Check return of >2x xlen structs
 
-define void @callee_large_struct_ret(%struct.large* noalias sret %agg.result) nounwind {
+define void @callee_large_struct_ret(%struct.large* noalias sret(%struct.large) %agg.result) nounwind {
 ; RV64I-LABEL: callee_large_struct_ret:
 ; RV64I:       # %bb.0:
 ; RV64I-NEXT:    sw zero, 4(a0)
@@ -520,7 +520,7 @@ define i64 @caller_large_struct_ret() nounwind {
 ; RV64I-NEXT:    addi sp, sp, 48
 ; RV64I-NEXT:    ret
   %1 = alloca %struct.large
-  call void @callee_large_struct_ret(%struct.large* sret %1)
+  call void @callee_large_struct_ret(%struct.large* sret(%struct.large) %1)
   %2 = getelementptr inbounds %struct.large, %struct.large* %1, i64 0, i32 0
   %3 = load i64, i64* %2
   %4 = getelementptr inbounds %struct.large, %struct.large* %1, i64 0, i32 3
diff --git a/llvm/test/CodeGen/RISCV/musttail-call.ll b/llvm/test/CodeGen/RISCV/musttail-call.ll
index 37b0ab456928..81d079c6c788 100644
--- a/llvm/test/CodeGen/RISCV/musttail-call.ll
+++ b/llvm/test/CodeGen/RISCV/musttail-call.ll
@@ -11,10 +11,10 @@
 
 %struct.A = type { i32 }
 
-declare void @callee_musttail(%struct.A* sret %a)
-define void @caller_musttail(%struct.A* sret %a) {
+declare void @callee_musttail(%struct.A* sret(%struct.A) %a)
+define void @caller_musttail(%struct.A* sret(%struct.A) %a) {
 ; CHECK: LLVM ERROR: failed to perform tail call elimination on a call site marked musttail
 entry:
-  musttail call void @callee_musttail(%struct.A* sret %a)
+  musttail call void @callee_musttail(%struct.A* sret(%struct.A) %a)
   ret void
 }
diff --git a/llvm/test/CodeGen/RISCV/tail-calls.ll b/llvm/test/CodeGen/RISCV/tail-calls.ll
index eaf53938c51b..7df14fc2ca10 100644
--- a/llvm/test/CodeGen/RISCV/tail-calls.ll
+++ b/llvm/test/CodeGen/RISCV/tail-calls.ll
@@ -137,19 +137,19 @@ entry:
 %struct.A = type { i32 }
 @a = global %struct.A zeroinitializer
 
-declare void @callee_struct(%struct.A* sret %a)
+declare void @callee_struct(%struct.A* sret(%struct.A) %a)
 define void @caller_nostruct() nounwind {
 ; CHECK-LABEL: caller_nostruct
 ; CHECK-NOT: tail callee_struct
 ; CHECK: call callee_struct
 entry:
-  tail call void @callee_struct(%struct.A* sret @a)
+  tail call void @callee_struct(%struct.A* sret(%struct.A) @a)
   ret void
 }
 
 ; Do not tail call optimize if caller uses structret semantics.
 declare void @callee_nostruct()
-define void @caller_struct(%struct.A* sret %a) nounwind {
+define void @caller_struct(%struct.A* sret(%struct.A) %a) nounwind {
 ; CHECK-LABEL: caller_struct
 ; CHECK-NOT: tail callee_nostruct
 ; CHECK: call callee_nostruct
diff --git a/llvm/test/CodeGen/SPARC/2011-01-22-SRet.ll b/llvm/test/CodeGen/SPARC/2011-01-22-SRet.ll
index 678544ebf2cb..445edc9e89e8 100644
--- a/llvm/test/CodeGen/SPARC/2011-01-22-SRet.ll
+++ b/llvm/test/CodeGen/SPARC/2011-01-22-SRet.ll
@@ -2,7 +2,7 @@
 
 %struct.foo_t = type { i32, i32, i32 }
 
-define weak void @make_foo(%struct.foo_t* noalias sret %agg.result, i32 %a, i32 %b, i32 %c) nounwind {
+define weak void @make_foo(%struct.foo_t* noalias sret(%struct.foo_t) %agg.result, i32 %a, i32 %b, i32 %c) nounwind {
 entry:
 ;CHECK-LABEL: make_foo:
 ;CHECK: ld [%sp+64], {{.+}}
@@ -23,7 +23,7 @@ entry:
 ;CHECK: st {{.+}}, [%sp+64]
 ;CHECK: unimp 12
   %f = alloca %struct.foo_t, align 8
-  call void @make_foo(%struct.foo_t* noalias sret %f, i32 10, i32 20, i32 30) nounwind
+  call void @make_foo(%struct.foo_t* noalias sret(%struct.foo_t) %f, i32 10, i32 20, i32 30) nounwind
   %0 = getelementptr inbounds %struct.foo_t, %struct.foo_t* %f, i32 0, i32 0
   %1 = load i32, i32* %0, align 8
   %2 = getelementptr inbounds %struct.foo_t, %struct.foo_t* %f, i32 0, i32 1
diff --git a/llvm/test/CodeGen/SPARC/cast-sret-func.ll b/llvm/test/CodeGen/SPARC/cast-sret-func.ll
index 1503e278c7da..192a5ef7567e 100644
--- a/llvm/test/CodeGen/SPARC/cast-sret-func.ll
+++ b/llvm/test/CodeGen/SPARC/cast-sret-func.ll
@@ -10,7 +10,7 @@ define void @test() nounwind {
 entry:
   %tmp = alloca %struct, align 4
   call void bitcast (void ()* @func to void (%struct*)*)
-    (%struct* nonnull sret %tmp)
+    (%struct* nonnull sret(%struct) %tmp)
   ret void
 }
 
diff --git a/llvm/test/CodeGen/SPARC/fp128.ll b/llvm/test/CodeGen/SPARC/fp128.ll
index 5abbc50e6bbc..773e0698ffd3 100644
--- a/llvm/test/CodeGen/SPARC/fp128.ll
+++ b/llvm/test/CodeGen/SPARC/fp128.ll
@@ -23,7 +23,7 @@
 ; CHECK:      std
 ; CHECK:      std
 
-define void @f128_ops(fp128* noalias sret %scalar.result, fp128* byval(fp128) %a, fp128* byval(fp128) %b, fp128* byval(fp128) %c, fp128* byval(fp128) %d) {
+define void @f128_ops(fp128* noalias sret(fp128) %scalar.result, fp128* byval(fp128) %a, fp128* byval(fp128) %b, fp128* byval(fp128) %c, fp128* byval(fp128) %d) {
 entry:
   %0 = load fp128, fp128* %a, align 8
   %1 = load fp128, fp128* %b, align 8
@@ -44,7 +44,7 @@ entry:
 ; CHECK-DAG:   ldd [%[[S1]]], %f{{.+}}
 ; CHECK:       jmp {{%[oi]7}}+12
 
-define void @f128_spill(fp128* noalias sret %scalar.result, fp128* byval(fp128) %a) {
+define void @f128_spill(fp128* noalias sret(fp128) %scalar.result, fp128* byval(fp128) %a) {
 entry:
   %0 = load fp128, fp128* %a, align 8
   call void asm sideeffect "", "~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"()
@@ -67,7 +67,7 @@ entry:
 ; CHECK-NEXT:  add %g1, %sp, %g1
 ; CHECK-NEXT:  ldd [%g1+8], %f{{.+}}
 
-define void @f128_spill_large(<251 x fp128>* noalias sret %scalar.result, <251 x fp128>* byval(<251 x fp128>) %a) {
+define void @f128_spill_large(<251 x fp128>* noalias sret(<251 x fp128>) %scalar.result, <251 x fp128>* byval(<251 x fp128>) %a) {
 entry:
   %0 = load <251 x fp128>, <251 x fp128>* %a, align 8
   call void asm sideeffect "", "~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"()
@@ -115,7 +115,7 @@ entry:
 ; BE:          fabss %f0, %f0
 ; EL:          fabss %f3, %f3
 
-define void @f128_abs(fp128* noalias sret %scalar.result, fp128* byval(fp128) %a) {
+define void @f128_abs(fp128* noalias sret(fp128) %scalar.result, fp128* byval(fp128) %a) {
 entry:
   %0 = load fp128, fp128* %a, align 8
   %1 = tail call fp128 @llvm.fabs.f128(fp128 %0)
@@ -130,7 +130,7 @@ declare fp128 @llvm.fabs.f128(fp128) nounwind readonly
 ; SOFT:       _Q_itoq
 ; SOFT:       unimp 16
 
-define void @int_to_f128(fp128* noalias sret %scalar.result, i32 %i) {
+define void @int_to_f128(fp128* noalias sret(fp128) %scalar.result, i32 %i) {
 entry:
   %0 = sitofp i32 %i to fp128
   store fp128 %0, fp128* %scalar.result, align 8
@@ -159,7 +159,7 @@ entry:
 ; SOFT:       _Q_utoq
 ; SOFT:       unimp 16
 
-define void @uint_to_f128(fp128* noalias sret %scalar.result, i32 %i) {
+define void @uint_to_f128(fp128* noalias sret(fp128) %scalar.result, i32 %i) {
 entry:
   %0 = uitofp i32 %i to fp128
   store fp128 %0, fp128* %scalar.result, align 8
@@ -242,7 +242,7 @@ entry:
 ; BE:          fnegs %f0, %f0
 ; EL:          fnegs %f3, %f3
 
-define void @f128_neg(fp128* noalias sret %scalar.result, fp128* byval(fp128) %a) {
+define void @f128_neg(fp128* noalias sret(fp128) %scalar.result, fp128* byval(fp128) %a) {
 entry:
   %0 = load fp128, fp128* %a, align 8
   %1 = fsub fp128 0xL00000000000000008000000000000000, %0
diff --git a/llvm/test/CodeGen/SPARC/missing-sret.ll b/llvm/test/CodeGen/SPARC/missing-sret.ll
index 683d840bd250..c7435766aebc 100644
--- a/llvm/test/CodeGen/SPARC/missing-sret.ll
+++ b/llvm/test/CodeGen/SPARC/missing-sret.ll
@@ -1,8 +1,8 @@
 ; RUN: llc -march=sparc -filetype=obj < %s > /dev/null 2> %t2
 
-define void @mul_double_cc({ double, double }* noalias sret %agg.result, double %a, double %b, double %c, double %d) {
+define void @mul_double_cc({ double, double }* noalias sret({ double, double }) %agg.result, double %a, double %b, double %c, double %d) {
 entry:
-  call void @__muldc3({ double, double }* sret %agg.result, double %a, double %b, double %c, double %d)
+  call void @__muldc3({ double, double }* sret({ double, double }) %agg.result, double %a, double %b, double %c, double %d)
   ret void
 }
 
diff --git a/llvm/test/CodeGen/SPARC/sret-secondary.ll b/llvm/test/CodeGen/SPARC/sret-secondary.ll
index 8f334e823834..84ac0b943c93 100644
--- a/llvm/test/CodeGen/SPARC/sret-secondary.ll
+++ b/llvm/test/CodeGen/SPARC/sret-secondary.ll
@@ -2,7 +2,7 @@
 
 ; CHECK: sparc only supports sret on the first parameter
 
-define void @foo(i32 %a, i32* sret %out) {
+define void @foo(i32 %a, i32* sret(i32) %out) {
   store i32 %a, i32* %out
   ret void
 }
diff --git a/llvm/test/CodeGen/SystemZ/swifterror.ll b/llvm/test/CodeGen/SystemZ/swifterror.ll
index d8fe608582c9..5a9191471968 100644
--- a/llvm/test/CodeGen/SystemZ/swifterror.ll
+++ b/llvm/test/CodeGen/SystemZ/swifterror.ll
@@ -198,7 +198,7 @@ bb_end:
 
 ; "foo_sret" is a function that takes a swifterror parameter, it also has a sret
 ; parameter.
-define void @foo_sret(%struct.S* sret %agg.result, i32 %val1, %swift_error** swifterror %error_ptr_ref) {
+define void @foo_sret(%struct.S* sret(%struct.S) %agg.result, i32 %val1, %swift_error** swifterror %error_ptr_ref) {
 ; CHECK-LABEL: foo_sret:
 ; CHECK-DAG: lgr %r[[REG1:[0-9]+]], %r2
 ; CHECK-DAG: lr %r[[REG2:[0-9]+]], %r3
@@ -265,7 +265,7 @@ entry:
   %s = alloca %struct.S, align 8
   %error_ptr_ref = alloca swifterror %swift_error*
   store %swift_error* null, %swift_error** %error_ptr_ref
-  call void @foo_sret(%struct.S* sret %s, i32 1, %swift_error** swifterror %error_ptr_ref)
+  call void @foo_sret(%struct.S* sret(%struct.S) %s, i32 1, %swift_error** swifterror %error_ptr_ref)
   %error_from_foo = load %swift_error*, %swift_error** %error_ptr_ref
   %had_error_from_foo = icmp ne %swift_error* %error_from_foo, null
   %tmp = bitcast %swift_error* %error_from_foo to i8*
diff --git a/llvm/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll b/llvm/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll
index cf88de6c7cda..2c6c05d5e21e 100644
--- a/llvm/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll
+++ b/llvm/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll
@@ -7,7 +7,7 @@
 	%struct.Results = type { float, float, float }
 	%struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 }
 
-define void @get_results(%struct.Results* noalias nocapture sret %agg.result, %struct.Village* %village) nounwind {
+define void @get_results(%struct.Results* noalias nocapture sret(%struct.Results) %agg.result, %struct.Village* %village) nounwind {
 entry:
 	br i1 undef, label %bb, label %bb6.preheader
 
diff --git a/llvm/test/CodeGen/Thumb2/constant-islands.ll b/llvm/test/CodeGen/Thumb2/constant-islands.ll
index ac323adfd3f1..7c9ef6720063 100644
--- a/llvm/test/CodeGen/Thumb2/constant-islands.ll
+++ b/llvm/test/CodeGen/Thumb2/constant-islands.ll
@@ -432,9 +432,9 @@ invoke.cont90:                                    ; preds = %invoke.cont81
   store float 1.000000e+00, float* %ref.tmp99, align 4
   store float 0.000000e+00, float* %ref.tmp100, align 4
   %call101 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp97, float* %ref.tmp98, float* %ref.tmp99, float* %ref.tmp100)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp, float* %scale.addr, %class.btVector3* %ref.tmp97)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp, float* %scale.addr, %class.btVector3* %ref.tmp97)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %transform, %class.btVector3* %ref.tmp)
-  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret %ref.tmp102, %class.btTransform* %offset, %class.btTransform* %transform)
+  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret(%class.btTransform) %ref.tmp102, %class.btTransform* %offset, %class.btTransform* %transform)
   %m_shapes103 = getelementptr inbounds %class.RagDoll, %class.RagDoll* %this1, i32 0, i32 2
   %arrayidx104 = getelementptr inbounds [11 x %class.btCollisionShape*], [11 x %class.btCollisionShape*]* %m_shapes103, i32 0, i32 0
   %47 = load %class.btCollisionShape*, %class.btCollisionShape** %arrayidx104, align 4
@@ -447,9 +447,9 @@ invoke.cont90:                                    ; preds = %invoke.cont81
   store float 0x3FF3333340000000, float* %ref.tmp110, align 4
   store float 0.000000e+00, float* %ref.tmp111, align 4
   %call112 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp108, float* %ref.tmp109, float* %ref.tmp110, float* %ref.tmp111)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp107, float* %scale.addr, %class.btVector3* %ref.tmp108)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp107, float* %scale.addr, %class.btVector3* %ref.tmp108)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %transform, %class.btVector3* %ref.tmp107)
-  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret %ref.tmp113, %class.btTransform* %offset, %class.btTransform* %transform)
+  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret(%class.btTransform) %ref.tmp113, %class.btTransform* %offset, %class.btTransform* %transform)
   %m_shapes114 = getelementptr inbounds %class.RagDoll, %class.RagDoll* %this1, i32 0, i32 2
   %arrayidx115 = getelementptr inbounds [11 x %class.btCollisionShape*], [11 x %class.btCollisionShape*]* %m_shapes114, i32 0, i32 1
   %48 = load %class.btCollisionShape*, %class.btCollisionShape** %arrayidx115, align 4
@@ -462,9 +462,9 @@ invoke.cont90:                                    ; preds = %invoke.cont81
   store float 0x3FF99999A0000000, float* %ref.tmp122, align 4
   store float 0.000000e+00, float* %ref.tmp123, align 4
   %call124 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp120, float* %ref.tmp121, float* %ref.tmp122, float* %ref.tmp123)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp119, float* %scale.addr, %class.btVector3* %ref.tmp120)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp119, float* %scale.addr, %class.btVector3* %ref.tmp120)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %transform, %class.btVector3* %ref.tmp119)
-  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret %ref.tmp125, %class.btTransform* %offset, %class.btTransform* %transform)
+  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret(%class.btTransform) %ref.tmp125, %class.btTransform* %offset, %class.btTransform* %transform)
   %m_shapes126 = getelementptr inbounds %class.RagDoll, %class.RagDoll* %this1, i32 0, i32 2
   %arrayidx127 = getelementptr inbounds [11 x %class.btCollisionShape*], [11 x %class.btCollisionShape*]* %m_shapes126, i32 0, i32 2
   %49 = load %class.btCollisionShape*, %class.btCollisionShape** %arrayidx127, align 4
@@ -477,9 +477,9 @@ invoke.cont90:                                    ; preds = %invoke.cont81
   store float 0x3FE4CCCCC0000000, float* %ref.tmp134, align 4
   store float 0.000000e+00, float* %ref.tmp135, align 4
   %call136 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp132, float* %ref.tmp133, float* %ref.tmp134, float* %ref.tmp135)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp131, float* %scale.addr, %class.btVector3* %ref.tmp132)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp131, float* %scale.addr, %class.btVector3* %ref.tmp132)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %transform, %class.btVector3* %ref.tmp131)
-  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret %ref.tmp137, %class.btTransform* %offset, %class.btTransform* %transform)
+  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret(%class.btTransform) %ref.tmp137, %class.btTransform* %offset, %class.btTransform* %transform)
   %m_shapes138 = getelementptr inbounds %class.RagDoll, %class.RagDoll* %this1, i32 0, i32 2
   %arrayidx139 = getelementptr inbounds [11 x %class.btCollisionShape*], [11 x %class.btCollisionShape*]* %m_shapes138, i32 0, i32 3
   %50 = load %class.btCollisionShape*, %class.btCollisionShape** %arrayidx139, align 4
@@ -492,9 +492,9 @@ invoke.cont90:                                    ; preds = %invoke.cont81
   store float 0x3FC99999A0000000, float* %ref.tmp146, align 4
   store float 0.000000e+00, float* %ref.tmp147, align 4
   %call148 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp144, float* %ref.tmp145, float* %ref.tmp146, float* %ref.tmp147)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp143, float* %scale.addr, %class.btVector3* %ref.tmp144)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp143, float* %scale.addr, %class.btVector3* %ref.tmp144)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %transform, %class.btVector3* %ref.tmp143)
-  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret %ref.tmp149, %class.btTransform* %offset, %class.btTransform* %transform)
+  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret(%class.btTransform) %ref.tmp149, %class.btTransform* %offset, %class.btTransform* %transform)
   %m_shapes150 = getelementptr inbounds %class.RagDoll, %class.RagDoll* %this1, i32 0, i32 2
   %arrayidx151 = getelementptr inbounds [11 x %class.btCollisionShape*], [11 x %class.btCollisionShape*]* %m_shapes150, i32 0, i32 4
   %51 = load %class.btCollisionShape*, %class.btCollisionShape** %arrayidx151, align 4
@@ -507,9 +507,9 @@ invoke.cont90:                                    ; preds = %invoke.cont81
   store float 0x3FE4CCCCC0000000, float* %ref.tmp158, align 4
   store float 0.000000e+00, float* %ref.tmp159, align 4
   %call160 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp156, float* %ref.tmp157, float* %ref.tmp158, float* %ref.tmp159)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp155, float* %scale.addr, %class.btVector3* %ref.tmp156)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp155, float* %scale.addr, %class.btVector3* %ref.tmp156)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %transform, %class.btVector3* %ref.tmp155)
-  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret %ref.tmp161, %class.btTransform* %offset, %class.btTransform* %transform)
+  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret(%class.btTransform) %ref.tmp161, %class.btTransform* %offset, %class.btTransform* %transform)
   %m_shapes162 = getelementptr inbounds %class.RagDoll, %class.RagDoll* %this1, i32 0, i32 2
   %arrayidx163 = getelementptr inbounds [11 x %class.btCollisionShape*], [11 x %class.btCollisionShape*]* %m_shapes162, i32 0, i32 5
   %52 = load %class.btCollisionShape*, %class.btCollisionShape** %arrayidx163, align 4
@@ -522,9 +522,9 @@ invoke.cont90:                                    ; preds = %invoke.cont81
   store float 0x3FC99999A0000000, float* %ref.tmp170, align 4
   store float 0.000000e+00, float* %ref.tmp171, align 4
   %call172 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp168, float* %ref.tmp169, float* %ref.tmp170, float* %ref.tmp171)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp167, float* %scale.addr, %class.btVector3* %ref.tmp168)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp167, float* %scale.addr, %class.btVector3* %ref.tmp168)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %transform, %class.btVector3* %ref.tmp167)
-  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret %ref.tmp173, %class.btTransform* %offset, %class.btTransform* %transform)
+  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret(%class.btTransform) %ref.tmp173, %class.btTransform* %offset, %class.btTransform* %transform)
   %m_shapes174 = getelementptr inbounds %class.RagDoll, %class.RagDoll* %this1, i32 0, i32 2
   %arrayidx175 = getelementptr inbounds [11 x %class.btCollisionShape*], [11 x %class.btCollisionShape*]* %m_shapes174, i32 0, i32 6
   %53 = load %class.btCollisionShape*, %class.btCollisionShape** %arrayidx175, align 4
@@ -537,11 +537,11 @@ invoke.cont90:                                    ; preds = %invoke.cont81
   store float 0x3FF7333340000000, float* %ref.tmp182, align 4
   store float 0.000000e+00, float* %ref.tmp183, align 4
   %call184 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp180, float* %ref.tmp181, float* %ref.tmp182, float* %ref.tmp183)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp179, float* %scale.addr, %class.btVector3* %ref.tmp180)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp179, float* %scale.addr, %class.btVector3* %ref.tmp180)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %transform, %class.btVector3* %ref.tmp179)
   %call185 = call %class.btMatrix3x3* @_ZN11btTransform8getBasisEv(%class.btTransform* %transform)
   call void @_ZN11btMatrix3x311setEulerZYXEfff(%class.btMatrix3x3* %call185, float 0.000000e+00, float 0.000000e+00, float 0x3FF921FB60000000)
-  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret %ref.tmp186, %class.btTransform* %offset, %class.btTransform* %transform)
+  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret(%class.btTransform) %ref.tmp186, %class.btTransform* %offset, %class.btTransform* %transform)
   %m_shapes187 = getelementptr inbounds %class.RagDoll, %class.RagDoll* %this1, i32 0, i32 2
   %arrayidx188 = getelementptr inbounds [11 x %class.btCollisionShape*], [11 x %class.btCollisionShape*]* %m_shapes187, i32 0, i32 7
   %54 = load %class.btCollisionShape*, %class.btCollisionShape** %arrayidx188, align 4
@@ -554,11 +554,11 @@ invoke.cont90:                                    ; preds = %invoke.cont81
   store float 0x3FF7333340000000, float* %ref.tmp195, align 4
   store float 0.000000e+00, float* %ref.tmp196, align 4
   %call197 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp193, float* %ref.tmp194, float* %ref.tmp195, float* %ref.tmp196)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp192, float* %scale.addr, %class.btVector3* %ref.tmp193)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp192, float* %scale.addr, %class.btVector3* %ref.tmp193)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %transform, %class.btVector3* %ref.tmp192)
   %call198 = call %class.btMatrix3x3* @_ZN11btTransform8getBasisEv(%class.btTransform* %transform)
   call void @_ZN11btMatrix3x311setEulerZYXEfff(%class.btMatrix3x3* %call198, float 0.000000e+00, float 0.000000e+00, float 0x3FF921FB60000000)
-  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret %ref.tmp199, %class.btTransform* %offset, %class.btTransform* %transform)
+  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret(%class.btTransform) %ref.tmp199, %class.btTransform* %offset, %class.btTransform* %transform)
   %m_shapes200 = getelementptr inbounds %class.RagDoll, %class.RagDoll* %this1, i32 0, i32 2
   %arrayidx201 = getelementptr inbounds [11 x %class.btCollisionShape*], [11 x %class.btCollisionShape*]* %m_shapes200, i32 0, i32 8
   %55 = load %class.btCollisionShape*, %class.btCollisionShape** %arrayidx201, align 4
@@ -571,11 +571,11 @@ invoke.cont90:                                    ; preds = %invoke.cont81
   store float 0x3FF7333340000000, float* %ref.tmp208, align 4
   store float 0.000000e+00, float* %ref.tmp209, align 4
   %call210 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp206, float* %ref.tmp207, float* %ref.tmp208, float* %ref.tmp209)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp205, float* %scale.addr, %class.btVector3* %ref.tmp206)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp205, float* %scale.addr, %class.btVector3* %ref.tmp206)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %transform, %class.btVector3* %ref.tmp205)
   %call211 = call %class.btMatrix3x3* @_ZN11btTransform8getBasisEv(%class.btTransform* %transform)
   call void @_ZN11btMatrix3x311setEulerZYXEfff(%class.btMatrix3x3* %call211, float 0.000000e+00, float 0.000000e+00, float 0xBFF921FB60000000)
-  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret %ref.tmp212, %class.btTransform* %offset, %class.btTransform* %transform)
+  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret(%class.btTransform) %ref.tmp212, %class.btTransform* %offset, %class.btTransform* %transform)
   %m_shapes213 = getelementptr inbounds %class.RagDoll, %class.RagDoll* %this1, i32 0, i32 2
   %arrayidx214 = getelementptr inbounds [11 x %class.btCollisionShape*], [11 x %class.btCollisionShape*]* %m_shapes213, i32 0, i32 9
   %56 = load %class.btCollisionShape*, %class.btCollisionShape** %arrayidx214, align 4
@@ -588,11 +588,11 @@ invoke.cont90:                                    ; preds = %invoke.cont81
   store float 0x3FF7333340000000, float* %ref.tmp221, align 4
   store float 0.000000e+00, float* %ref.tmp222, align 4
   %call223 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp219, float* %ref.tmp220, float* %ref.tmp221, float* %ref.tmp222)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp218, float* %scale.addr, %class.btVector3* %ref.tmp219)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp218, float* %scale.addr, %class.btVector3* %ref.tmp219)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %transform, %class.btVector3* %ref.tmp218)
   %call224 = call %class.btMatrix3x3* @_ZN11btTransform8getBasisEv(%class.btTransform* %transform)
   call void @_ZN11btMatrix3x311setEulerZYXEfff(%class.btMatrix3x3* %call224, float 0.000000e+00, float 0.000000e+00, float 0xBFF921FB60000000)
-  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret %ref.tmp225, %class.btTransform* %offset, %class.btTransform* %transform)
+  call void @_ZNK11btTransformmlERKS_(%class.btTransform* sret(%class.btTransform) %ref.tmp225, %class.btTransform* %offset, %class.btTransform* %transform)
   %m_shapes226 = getelementptr inbounds %class.RagDoll, %class.RagDoll* %this1, i32 0, i32 2
   %arrayidx227 = getelementptr inbounds [11 x %class.btCollisionShape*], [11 x %class.btCollisionShape*]* %m_shapes226, i32 0, i32 10
   %57 = load %class.btCollisionShape*, %class.btCollisionShape** %arrayidx227, align 4
@@ -787,7 +787,7 @@ for.end:                                          ; preds = %for.cond
   store float 0x3FC3333340000000, float* %ref.tmp243, align 4
   store float 0.000000e+00, float* %ref.tmp244, align 4
   %call245 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp241, float* %ref.tmp242, float* %ref.tmp243, float* %ref.tmp244)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp240, float* %scale.addr, %class.btVector3* %ref.tmp241)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp240, float* %scale.addr, %class.btVector3* %ref.tmp241)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %localA, %class.btVector3* %ref.tmp240)
   %call246 = call %class.btMatrix3x3* @_ZN11btTransform8getBasisEv(%class.btTransform* %localB)
   call void @_ZN11btMatrix3x311setEulerZYXEfff(%class.btMatrix3x3* %call246, float 0.000000e+00, float 0x3FF921FB60000000, float 0.000000e+00)
@@ -795,7 +795,7 @@ for.end:                                          ; preds = %for.cond
   store float 0xBFC3333340000000, float* %ref.tmp250, align 4
   store float 0.000000e+00, float* %ref.tmp251, align 4
   %call252 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp248, float* %ref.tmp249, float* %ref.tmp250, float* %ref.tmp251)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp247, float* %scale.addr, %class.btVector3* %ref.tmp248)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp247, float* %scale.addr, %class.btVector3* %ref.tmp248)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %localB, %class.btVector3* %ref.tmp247)
   %call253 = call noalias i8* @_Znwm(i32 780)
   %100 = bitcast i8* %call253 to %class.btHingeConstraint*
@@ -835,7 +835,7 @@ invoke.cont259:                                   ; preds = %for.end
   store float 0x3FD3333340000000, float* %ref.tmp269, align 4
   store float 0.000000e+00, float* %ref.tmp270, align 4
   %call271 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp267, float* %ref.tmp268, float* %ref.tmp269, float* %ref.tmp270)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp266, float* %scale.addr, %class.btVector3* %ref.tmp267)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp266, float* %scale.addr, %class.btVector3* %ref.tmp267)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %localA, %class.btVector3* %ref.tmp266)
   %call272 = call %class.btMatrix3x3* @_ZN11btTransform8getBasisEv(%class.btTransform* %localB)
   call void @_ZN11btMatrix3x311setEulerZYXEfff(%class.btMatrix3x3* %call272, float 0.000000e+00, float 0.000000e+00, float 0x3FF921FB60000000)
@@ -843,7 +843,7 @@ invoke.cont259:                                   ; preds = %for.end
   store float 0xBFC1EB8520000000, float* %ref.tmp276, align 4
   store float 0.000000e+00, float* %ref.tmp277, align 4
   %call278 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp274, float* %ref.tmp275, float* %ref.tmp276, float* %ref.tmp277)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp273, float* %scale.addr, %class.btVector3* %ref.tmp274)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp273, float* %scale.addr, %class.btVector3* %ref.tmp274)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %localB, %class.btVector3* %ref.tmp273)
   %call279 = call noalias i8* @_Znwm(i32 628)
   %110 = bitcast i8* %call279 to %class.btConeTwistConstraint*
@@ -883,7 +883,7 @@ invoke.cont285:                                   ; preds = %invoke.cont259
   store float 0xBFB99999A0000000, float* %ref.tmp298, align 4
   store float 0.000000e+00, float* %ref.tmp299, align 4
   %call300 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp296, float* %ref.tmp297, float* %ref.tmp298, float* %ref.tmp299)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp295, float* %scale.addr, %class.btVector3* %ref.tmp296)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp295, float* %scale.addr, %class.btVector3* %ref.tmp296)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %localA, %class.btVector3* %ref.tmp295)
   %call301 = call %class.btMatrix3x3* @_ZN11btTransform8getBasisEv(%class.btTransform* %localB)
   call void @_ZN11btMatrix3x311setEulerZYXEfff(%class.btMatrix3x3* %call301, float 0.000000e+00, float 0.000000e+00, float 0xC00F6A7A20000000)
@@ -891,7 +891,7 @@ invoke.cont285:                                   ; preds = %invoke.cont259
   store float 0x3FCCCCCCC0000000, float* %ref.tmp305, align 4
   store float 0.000000e+00, float* %ref.tmp306, align 4
   %call307 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp303, float* %ref.tmp304, float* %ref.tmp305, float* %ref.tmp306)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp302, float* %scale.addr, %class.btVector3* %ref.tmp303)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp302, float* %scale.addr, %class.btVector3* %ref.tmp303)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %localB, %class.btVector3* %ref.tmp302)
   %call308 = call noalias i8* @_Znwm(i32 628)
   %120 = bitcast i8* %call308 to %class.btConeTwistConstraint*
@@ -931,7 +931,7 @@ invoke.cont314:                                   ; preds = %invoke.cont285
   store float 0xBFCCCCCCC0000000, float* %ref.tmp327, align 4
   store float 0.000000e+00, float* %ref.tmp328, align 4
   %call329 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp325, float* %ref.tmp326, float* %ref.tmp327, float* %ref.tmp328)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp324, float* %scale.addr, %class.btVector3* %ref.tmp325)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp324, float* %scale.addr, %class.btVector3* %ref.tmp325)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %localA, %class.btVector3* %ref.tmp324)
   %call330 = call %class.btMatrix3x3* @_ZN11btTransform8getBasisEv(%class.btTransform* %localB)
   call void @_ZN11btMatrix3x311setEulerZYXEfff(%class.btMatrix3x3* %call330, float 0.000000e+00, float 0x3FF921FB60000000, float 0.000000e+00)
@@ -939,7 +939,7 @@ invoke.cont314:                                   ; preds = %invoke.cont285
   store float 0x3FC7AE1480000000, float* %ref.tmp334, align 4
   store float 0.000000e+00, float* %ref.tmp335, align 4
   %call336 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp332, float* %ref.tmp333, float* %ref.tmp334, float* %ref.tmp335)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp331, float* %scale.addr, %class.btVector3* %ref.tmp332)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp331, float* %scale.addr, %class.btVector3* %ref.tmp332)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %localB, %class.btVector3* %ref.tmp331)
   %call337 = call noalias i8* @_Znwm(i32 780)
   %130 = bitcast i8* %call337 to %class.btHingeConstraint*
@@ -979,7 +979,7 @@ invoke.cont343:                                   ; preds = %invoke.cont314
   store float 0xBFB99999A0000000, float* %ref.tmp356, align 4
   store float 0.000000e+00, float* %ref.tmp357, align 4
   %call358 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp354, float* %ref.tmp355, float* %ref.tmp356, float* %ref.tmp357)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp353, float* %scale.addr, %class.btVector3* %ref.tmp354)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp353, float* %scale.addr, %class.btVector3* %ref.tmp354)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %localA, %class.btVector3* %ref.tmp353)
   %call359 = call %class.btMatrix3x3* @_ZN11btTransform8getBasisEv(%class.btTransform* %localB)
   call void @_ZN11btMatrix3x311setEulerZYXEfff(%class.btMatrix3x3* %call359, float 0.000000e+00, float 0.000000e+00, float 0x3FE921FB60000000)
@@ -987,7 +987,7 @@ invoke.cont343:                                   ; preds = %invoke.cont314
   store float 0x3FCCCCCCC0000000, float* %ref.tmp363, align 4
   store float 0.000000e+00, float* %ref.tmp364, align 4
   %call365 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp361, float* %ref.tmp362, float* %ref.tmp363, float* %ref.tmp364)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp360, float* %scale.addr, %class.btVector3* %ref.tmp361)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp360, float* %scale.addr, %class.btVector3* %ref.tmp361)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %localB, %class.btVector3* %ref.tmp360)
   %call366 = call noalias i8* @_Znwm(i32 628)
   %140 = bitcast i8* %call366 to %class.btConeTwistConstraint*
@@ -1027,7 +1027,7 @@ invoke.cont372:                                   ; preds = %invoke.cont343
   store float 0xBFCCCCCCC0000000, float* %ref.tmp385, align 4
   store float 0.000000e+00, float* %ref.tmp386, align 4
   %call387 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp383, float* %ref.tmp384, float* %ref.tmp385, float* %ref.tmp386)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp382, float* %scale.addr, %class.btVector3* %ref.tmp383)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp382, float* %scale.addr, %class.btVector3* %ref.tmp383)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %localA, %class.btVector3* %ref.tmp382)
   %call388 = call %class.btMatrix3x3* @_ZN11btTransform8getBasisEv(%class.btTransform* %localB)
   call void @_ZN11btMatrix3x311setEulerZYXEfff(%class.btMatrix3x3* %call388, float 0.000000e+00, float 0x3FF921FB60000000, float 0.000000e+00)
@@ -1035,7 +1035,7 @@ invoke.cont372:                                   ; preds = %invoke.cont343
   store float 0x3FC7AE1480000000, float* %ref.tmp392, align 4
   store float 0.000000e+00, float* %ref.tmp393, align 4
   %call394 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp390, float* %ref.tmp391, float* %ref.tmp392, float* %ref.tmp393)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp389, float* %scale.addr, %class.btVector3* %ref.tmp390)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp389, float* %scale.addr, %class.btVector3* %ref.tmp390)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %localB, %class.btVector3* %ref.tmp389)
   %call395 = call noalias i8* @_Znwm(i32 780)
   %150 = bitcast i8* %call395 to %class.btHingeConstraint*
@@ -1075,7 +1075,7 @@ invoke.cont401:                                   ; preds = %invoke.cont372
   store float 0x3FC3333340000000, float* %ref.tmp414, align 4
   store float 0.000000e+00, float* %ref.tmp415, align 4
   %call416 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp412, float* %ref.tmp413, float* %ref.tmp414, float* %ref.tmp415)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp411, float* %scale.addr, %class.btVector3* %ref.tmp412)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp411, float* %scale.addr, %class.btVector3* %ref.tmp412)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %localA, %class.btVector3* %ref.tmp411)
   %call417 = call %class.btMatrix3x3* @_ZN11btTransform8getBasisEv(%class.btTransform* %localB)
   call void @_ZN11btMatrix3x311setEulerZYXEfff(%class.btMatrix3x3* %call417, float 0.000000e+00, float 0.000000e+00, float 0x3FF921FB60000000)
@@ -1083,7 +1083,7 @@ invoke.cont401:                                   ; preds = %invoke.cont372
   store float 0xBFC70A3D80000000, float* %ref.tmp421, align 4
   store float 0.000000e+00, float* %ref.tmp422, align 4
   %call423 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp419, float* %ref.tmp420, float* %ref.tmp421, float* %ref.tmp422)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp418, float* %scale.addr, %class.btVector3* %ref.tmp419)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp418, float* %scale.addr, %class.btVector3* %ref.tmp419)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %localB, %class.btVector3* %ref.tmp418)
   %call424 = call noalias i8* @_Znwm(i32 628)
   %160 = bitcast i8* %call424 to %class.btConeTwistConstraint*
@@ -1123,7 +1123,7 @@ invoke.cont430:                                   ; preds = %invoke.cont401
   store float 0x3FC70A3D80000000, float* %ref.tmp443, align 4
   store float 0.000000e+00, float* %ref.tmp444, align 4
   %call445 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp441, float* %ref.tmp442, float* %ref.tmp443, float* %ref.tmp444)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp440, float* %scale.addr, %class.btVector3* %ref.tmp441)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp440, float* %scale.addr, %class.btVector3* %ref.tmp441)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %localA, %class.btVector3* %ref.tmp440)
   %call446 = call %class.btMatrix3x3* @_ZN11btTransform8getBasisEv(%class.btTransform* %localB)
   call void @_ZN11btMatrix3x311setEulerZYXEfff(%class.btMatrix3x3* %call446, float 0.000000e+00, float 0x3FF921FB60000000, float 0.000000e+00)
@@ -1131,7 +1131,7 @@ invoke.cont430:                                   ; preds = %invoke.cont401
   store float 0xBFC1EB8520000000, float* %ref.tmp450, align 4
   store float 0.000000e+00, float* %ref.tmp451, align 4
   %call452 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp448, float* %ref.tmp449, float* %ref.tmp450, float* %ref.tmp451)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp447, float* %scale.addr, %class.btVector3* %ref.tmp448)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp447, float* %scale.addr, %class.btVector3* %ref.tmp448)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %localB, %class.btVector3* %ref.tmp447)
   %call453 = call noalias i8* @_Znwm(i32 780)
   %170 = bitcast i8* %call453 to %class.btHingeConstraint*
@@ -1171,7 +1171,7 @@ invoke.cont459:                                   ; preds = %invoke.cont430
   store float 0x3FC3333340000000, float* %ref.tmp472, align 4
   store float 0.000000e+00, float* %ref.tmp473, align 4
   %call474 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp470, float* %ref.tmp471, float* %ref.tmp472, float* %ref.tmp473)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp469, float* %scale.addr, %class.btVector3* %ref.tmp470)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp469, float* %scale.addr, %class.btVector3* %ref.tmp470)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %localA, %class.btVector3* %ref.tmp469)
   %call475 = call %class.btMatrix3x3* @_ZN11btTransform8getBasisEv(%class.btTransform* %localB)
   call void @_ZN11btMatrix3x311setEulerZYXEfff(%class.btMatrix3x3* %call475, float 0.000000e+00, float 0.000000e+00, float 0x3FF921FB60000000)
@@ -1179,7 +1179,7 @@ invoke.cont459:                                   ; preds = %invoke.cont430
   store float 0xBFC70A3D80000000, float* %ref.tmp479, align 4
   store float 0.000000e+00, float* %ref.tmp480, align 4
   %call481 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp477, float* %ref.tmp478, float* %ref.tmp479, float* %ref.tmp480)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp476, float* %scale.addr, %class.btVector3* %ref.tmp477)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp476, float* %scale.addr, %class.btVector3* %ref.tmp477)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %localB, %class.btVector3* %ref.tmp476)
   %call482 = call noalias i8* @_Znwm(i32 628)
   %180 = bitcast i8* %call482 to %class.btConeTwistConstraint*
@@ -1219,7 +1219,7 @@ invoke.cont488:                                   ; preds = %invoke.cont459
   store float 0x3FC70A3D80000000, float* %ref.tmp501, align 4
   store float 0.000000e+00, float* %ref.tmp502, align 4
   %call503 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp499, float* %ref.tmp500, float* %ref.tmp501, float* %ref.tmp502)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp498, float* %scale.addr, %class.btVector3* %ref.tmp499)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp498, float* %scale.addr, %class.btVector3* %ref.tmp499)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %localA, %class.btVector3* %ref.tmp498)
   %call504 = call %class.btMatrix3x3* @_ZN11btTransform8getBasisEv(%class.btTransform* %localB)
   call void @_ZN11btMatrix3x311setEulerZYXEfff(%class.btMatrix3x3* %call504, float 0.000000e+00, float 0x3FF921FB60000000, float 0.000000e+00)
@@ -1227,7 +1227,7 @@ invoke.cont488:                                   ; preds = %invoke.cont459
   store float 0xBFC1EB8520000000, float* %ref.tmp508, align 4
   store float 0.000000e+00, float* %ref.tmp509, align 4
   %call510 = call %class.btVector3* @_ZN9btVector3C1ERKfS1_S1_(%class.btVector3* %ref.tmp506, float* %ref.tmp507, float* %ref.tmp508, float* %ref.tmp509)
-  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret %ref.tmp505, float* %scale.addr, %class.btVector3* %ref.tmp506)
+  call void @_ZmlRKfRK9btVector3(%class.btVector3* sret(%class.btVector3) %ref.tmp505, float* %scale.addr, %class.btVector3* %ref.tmp506)
   call void @_ZN11btTransform9setOriginERK9btVector3(%class.btTransform* %localB, %class.btVector3* %ref.tmp505)
   %call511 = call noalias i8* @_Znwm(i32 780)
   %190 = bitcast i8* %call511 to %class.btHingeConstraint*
diff --git a/llvm/test/CodeGen/VE/Scalar/callstruct.ll b/llvm/test/CodeGen/VE/Scalar/callstruct.ll
index 7241d752a484..8af058f19284 100644
--- a/llvm/test/CodeGen/VE/Scalar/callstruct.ll
+++ b/llvm/test/CodeGen/VE/Scalar/callstruct.ll
@@ -5,7 +5,7 @@
 @A = common global %struct.a zeroinitializer, align 4
 
 ; Function Attrs: norecurse nounwind
-define void @fun(%struct.a* noalias nocapture sret %a, i32 %p1, i32 %p2) {
+define void @fun(%struct.a* noalias nocapture sret(%struct.a) %a, i32 %p1, i32 %p2) {
 ; CHECK-LABEL: fun:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    stl %s1, (, %s0)
@@ -37,7 +37,7 @@ define void @caller() {
 ; CHECK-NEXT:    or %s11, 0, %s9
   %a = alloca i64, align 8
   %a.bc = bitcast i64* %a to %struct.a*
-  call void @callee(%struct.a* nonnull sret %a.bc, i32 3, i32 4)
+  call void @callee(%struct.a* nonnull sret(%struct.a) %a.bc, i32 3, i32 4)
   %a.val = load i64, i64* %a, align 8
   store i64 %a.val, i64* bitcast (%struct.a* @A to i64*), align 4
   ret void
diff --git a/llvm/test/CodeGen/WebAssembly/add-prototypes.ll b/llvm/test/CodeGen/WebAssembly/add-prototypes.ll
index 84d7657e9830..8730f2ab767e 100644
--- a/llvm/test/CodeGen/WebAssembly/add-prototypes.ll
+++ b/llvm/test/CodeGen/WebAssembly/add-prototypes.ll
@@ -58,12 +58,12 @@ define void @as_paramater() {
 
 ; Check if a sret parameter works in a no-prototype function.
 ; CHECK-LABEL: @sret_param
-; CHECK: call void @make_struct_foo(%struct.foo* sret %foo)
+; CHECK: call void @make_struct_foo(%struct.foo* sret(%struct.foo) %foo)
 %struct.foo = type { i32, i32 }
-declare void @make_struct_foo(%struct.foo* sret, ...) #1
+declare void @make_struct_foo(%struct.foo* sret(%struct.foo), ...) #1
 define void @sret_param() {
   %foo = alloca %struct.foo, align 4
-  call void bitcast (void (%struct.foo*, ...)* @make_struct_foo to void (%struct.foo*)*)(%struct.foo* sret %foo)
+  call void bitcast (void (%struct.foo*, ...)* @make_struct_foo to void (%struct.foo*)*)(%struct.foo* sret(%struct.foo) %foo)
   ret void
 }
 
diff --git a/llvm/test/CodeGen/WebAssembly/indirect-import.ll b/llvm/test/CodeGen/WebAssembly/indirect-import.ll
index afe1ebaa9786..c0f52e95c48a 100644
--- a/llvm/test/CodeGen/WebAssembly/indirect-import.ll
+++ b/llvm/test/CodeGen/WebAssembly/indirect-import.ll
@@ -62,7 +62,7 @@ declare i32 @extern_ijidf(i64, i32, double, float) #1
 
 declare void @extern_struct(%struct.big* byval(%struct.big) align 8) #1
 
-declare void @extern_sret(%struct.big* sret) #1
+declare void @extern_sret(%struct.big* sret(%struct.big)) #1
 
 declare i128 @extern_i128ret(i64) #1
 
diff --git a/llvm/test/CodeGen/X86/2006-11-12-CSRetCC.ll b/llvm/test/CodeGen/X86/2006-11-12-CSRetCC.ll
index 98d627b9ffe7..4d0eefbd5dd6 100644
--- a/llvm/test/CodeGen/X86/2006-11-12-CSRetCC.ll
+++ b/llvm/test/CodeGen/X86/2006-11-12-CSRetCC.ll
@@ -44,7 +44,7 @@ entry:
         %tmp9 = bitcast { double, double }* %tmp to { i64, i64 }*               ; <{ i64, i64 }*> [#uses=1]
         %tmp10 = getelementptr { i64, i64 }, { i64, i64 }* %tmp9, i64 0, i32 1                ; <i64*> [#uses=1]
         %tmp11 = load i64, i64* %tmp10               ; <i64> [#uses=1]
-        call void @cexp( { double, double }* sret  %tmp2, i64 %tmp.upgrd.5, i64 %tmp11 )
+        call void @cexp( { double, double }* sret({ double, double })  %tmp2, i64 %tmp.upgrd.5, i64 %tmp11 )
         %tmp12 = getelementptr { double, double }, { double, double }* %z, i64 0, i32 0             ; <double*> [#uses=1]
         %tmp13 = getelementptr { double, double }, { double, double }* %tmp2, i64 0, i32 0          ; <double*> [#uses=1]
         %tmp14 = load double, double* %tmp13            ; <double> [#uses=1]
@@ -65,7 +65,7 @@ finish:
         ret i32 %retval.upgrd.8
 }
 
-declare void @cexp({ double, double }* sret , i64, i64)
+declare void @cexp({ double, double }* sret({ double, double }), i64, i64)
 
 declare i32 @printf(i8*, ...)
 
diff --git a/llvm/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll b/llvm/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll
index ba80086a1510..050c12c9c0a5 100644
--- a/llvm/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll
+++ b/llvm/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll
@@ -1,11 +1,11 @@
 ; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
 
 ; CHECK: xorps {{.*}}{{LCPI0_0|__xmm@}}
-define void @casin({ double, double }* sret  %agg.result, double %z.0, double %z.1) nounwind  {
+define void @casin({ double, double }* sret({ double, double })  %agg.result, double %z.0, double %z.1) nounwind  {
 entry:
 	%memtmp = alloca { double, double }, align 8		; <{ double, double }*> [#uses=3]
 	%tmp4 = fsub double -0.000000e+00, %z.1		; <double> [#uses=1]
-	call void @casinh( { double, double }* sret  %memtmp, double %tmp4, double %z.0 ) nounwind 
+	call void @casinh( { double, double }* sret({ double, double })  %memtmp, double %tmp4, double %z.0 ) nounwind
 	%tmp19 = getelementptr { double, double }, { double, double }* %memtmp, i32 0, i32 0		; <double*> [#uses=1]
 	%tmp20 = load double, double* %tmp19, align 8		; <double> [#uses=1]
 	%tmp22 = getelementptr { double, double }, { double, double }* %memtmp, i32 0, i32 1		; <double*> [#uses=1]
@@ -18,4 +18,4 @@ entry:
 	ret void
 }
 
-declare void @casinh({ double, double }* sret , double, double) nounwind 
+declare void @casinh({ double, double }* sret({ double, double }) , double, double) nounwind
diff --git a/llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll
index 65240d5aea71..5454d7ef1bb4 100644
--- a/llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll
@@ -14,7 +14,7 @@
 @.str33 = external constant [29 x i32]		; <[29 x i32]*> [#uses=1]
 @.str89 = external constant [5 x i32]		; <[5 x i32]*> [#uses=1]
 
-define void @_ZNK10wxDateTime6FormatEPKwRKNS_8TimeZoneE(%struct.wxString* noalias sret  %agg.result, %struct.wxDateTime* %this, i32* %format, %"struct.wxDateTime::TimeZone"* %tz, i1 %foo) personality i32 (...)* @__gxx_personality_v0 {
+define void @_ZNK10wxDateTime6FormatEPKwRKNS_8TimeZoneE(%struct.wxString* noalias sret(%struct.wxString)  %agg.result, %struct.wxDateTime* %this, i32* %format, %"struct.wxDateTime::TimeZone"* %tz, i1 %foo) personality i32 (...)* @__gxx_personality_v0 {
 ; CHECK-LABEL: _ZNK10wxDateTime6FormatEPKwRKNS_8TimeZoneE:
 ; CHECK:       ## %bb.0: ## %entry
 ; CHECK-NEXT:    pushl %ebp
@@ -291,13 +291,13 @@ bb448.i8694:		; preds = %bb440.i8663, %bb278.i8617
 invcont5814:		; preds = %bb448.i8694, %bb265.i8606
 	%tmp812.0.0 = phi i16 [ %tmp477478.i8670, %bb448.i8694 ], [ %tmp273274.i8595, %bb265.i8606 ]		; <i16> [#uses=1]
 	%tmp58165817 = zext i16 %tmp812.0.0 to i32		; <i32> [#uses=1]
-	invoke void (%struct.wxString*, i32*, ...) @_ZN8wxString6FormatEPKwz( %struct.wxString* noalias sret  null, i32* null, i32 %tmp58165817 )
+	invoke void (%struct.wxString*, i32*, ...) @_ZN8wxString6FormatEPKwz(%struct.wxString* noalias sret(%struct.wxString)  null, i32* null, i32 %tmp58165817 )
 			to label %invcont5831 unwind label %lpad
 invcont5831:		; preds = %invcont5814
-	%tmp5862 = invoke zeroext  i8 @_ZN12wxStringBase10ConcatSelfEmPKwm( %struct.wxStringBase* null, i32 0, i32* null, i32 0 )
+	%tmp5862 = invoke zeroext  i8 @_ZN12wxStringBase10ConcatSelfEmPKwm(%struct.wxStringBase* null, i32 0, i32* null, i32 0 )
 			to label %bb7834 unwind label %lpad8185		; <i8> [#uses=0]
 bb5968:		; preds = %bb3314
-	invoke void (%struct.wxString*, i32*, ...) @_ZN8wxString6FormatEPKwz( %struct.wxString* noalias sret  null, i32* null, i32 0 )
+	invoke void (%struct.wxString*, i32*, ...) @_ZN8wxString6FormatEPKwz(%struct.wxString* noalias sret(%struct.wxString)  null, i32* null, i32 0 )
 			to label %invcont5981 unwind label %lpad
 invcont5981:		; preds = %bb5968
 	ret void
@@ -346,6 +346,6 @@ declare %struct.wxStringBase* @_ZN12wxStringBase6appendEmw(%struct.wxStringBase*
 
 declare %struct.wxStringBase* @_ZN12wxStringBaseaSEPKw(%struct.wxStringBase*, i32*)
 
-declare void @_ZN8wxString6FormatEPKwz(%struct.wxString* noalias sret , i32*, ...)
+declare void @_ZN8wxString6FormatEPKwz(%struct.wxString* noalias sret(%struct.wxString) , i32*, ...)
 
 declare i32 @__gxx_personality_v0(...)
diff --git a/llvm/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll b/llvm/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll
index e8dd814b2167..b2c3f582b75c 100644
--- a/llvm/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll
+++ b/llvm/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll
@@ -2,7 +2,7 @@
 
 declare <2 x double> @llvm.x86.sse2.min.pd(<2 x double>, <2 x double>) nounwind readnone
 
-define void @__mindd16(<16 x double>* sret %vec.result, <16 x double> %x, double %y) nounwind {
+define void @__mindd16(<16 x double>* sret(<16 x double>) %vec.result, <16 x double> %x, double %y) nounwind {
 entry:
 	%tmp3.i = shufflevector <16 x double> zeroinitializer, <16 x double> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >		; <<8 x double>> [#uses=1]
 	%tmp10.i.i = shufflevector <8 x double> %tmp3.i, <8 x double> undef, <4 x i32> < i32 4, i32 5, i32 6, i32 7 >		; <<4 x double>> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2009-02-12-SpillerBug.ll b/llvm/test/CodeGen/X86/2009-02-12-SpillerBug.ll
index acf2f6d65122..2a787d95c0b1 100644
--- a/llvm/test/CodeGen/X86/2009-02-12-SpillerBug.ll
+++ b/llvm/test/CodeGen/X86/2009-02-12-SpillerBug.ll
@@ -1,7 +1,7 @@
 ; RUN: llc < %s -mtriple=i386-apple-darwin8
 ; PR3561
 
-define hidden void @__mulxc3({ x86_fp80, x86_fp80 }* noalias nocapture sret %agg.result, x86_fp80 %a, x86_fp80 %b, x86_fp80 %c, x86_fp80 %d) nounwind {
+define hidden void @__mulxc3({ x86_fp80, x86_fp80 }* noalias nocapture sret({ x86_fp80, x86_fp80 }) %agg.result, x86_fp80 %a, x86_fp80 %b, x86_fp80 %c, x86_fp80 %d) nounwind {
 entry:
 	%0 = fmul x86_fp80 %b, %d		; <x86_fp80> [#uses=1]
 	%1 = fsub x86_fp80 0xK00000000000000000000, %0		; <x86_fp80> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2010-04-21-CoalescerBug.ll b/llvm/test/CodeGen/X86/2010-04-21-CoalescerBug.ll
index 46dedb48ff1d..6ec2fd962d5a 100644
--- a/llvm/test/CodeGen/X86/2010-04-21-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2010-04-21-CoalescerBug.ll
@@ -5,7 +5,7 @@
 %struct.CMTimeMapping = type { %struct.CMTimeRange, %struct.CMTimeRange }
 %struct.CMTimeRange = type { %struct.CMTime, %struct.CMTime }
 
-define void @t(%struct.CMTimeMapping* noalias nocapture sret %agg.result) nounwind optsize ssp {
+define void @t(%struct.CMTimeMapping* noalias nocapture sret(%struct.CMTimeMapping) %agg.result) nounwind optsize ssp {
 entry:
   %agg.result1 = bitcast %struct.CMTimeMapping* %agg.result to i8* ; <i8*> [#uses=1]
   tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %agg.result1, i8* align 4 null, i64 96, i1 false)
diff --git a/llvm/test/CodeGen/X86/2012-01-11-split-cv.ll b/llvm/test/CodeGen/X86/2012-01-11-split-cv.ll
index c8424fa69aaf..342c81e23f10 100644
--- a/llvm/test/CodeGen/X86/2012-01-11-split-cv.ll
+++ b/llvm/test/CodeGen/X86/2012-01-11-split-cv.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mattr=+avx -mtriple=i686-unknown-unknown | FileCheck %s
 
-define void @add18i16(<18 x i16>* nocapture sret %ret, <18 x i16>* %bp) nounwind {
+define void @add18i16(<18 x i16>* nocapture sret(<18 x i16>) %ret, <18 x i16>* %bp) nounwind {
 ; CHECK-LABEL: add18i16:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
diff --git a/llvm/test/CodeGen/X86/StackColoring-use-between-allocas.mir b/llvm/test/CodeGen/X86/StackColoring-use-between-allocas.mir
index 9838aab18489..bf63e2b038c1 100644
--- a/llvm/test/CodeGen/X86/StackColoring-use-between-allocas.mir
+++ b/llvm/test/CodeGen/X86/StackColoring-use-between-allocas.mir
@@ -50,7 +50,7 @@
     call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %6) #3
     %7 = bitcast %"struct.e::f"* %tmp to i8*
     call void @llvm.lifetime.start.p0i8(i64 32, i8* nonnull %7) #3
-    call void @_ZN1j1kEv(%"struct.e::f"* nonnull sret align 8 %tmp, %struct.j* nonnull %b)
+    call void @_ZN1j1kEv(%"struct.e::f"* nonnull sret(%"struct.e::f") align 8 %tmp, %struct.j* nonnull %b)
     call void @llvm.lifetime.end.p0i8(i64 32, i8* nonnull %7) #3
     call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %6) #3
     call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %0) #3
@@ -67,7 +67,7 @@
   ; Function Attrs: argmemonly nounwind willreturn
   declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #1
 
-  declare void @_ZN1j1kEv(%"struct.e::f"* sret align 8, %struct.j*) local_unnamed_addr #2
+  declare void @_ZN1j1kEv(%"struct.e::f"* sret(%"struct.e::f") align 8, %struct.j*) local_unnamed_addr #2
 
   ; Function Attrs: nounwind
   declare void @llvm.stackprotector(i8*, i8**) #3
diff --git a/llvm/test/CodeGen/X86/addcarry.ll b/llvm/test/CodeGen/X86/addcarry.ll
index 9edcb9492a3d..0db0d4ebd43c 100644
--- a/llvm/test/CodeGen/X86/addcarry.ll
+++ b/llvm/test/CodeGen/X86/addcarry.ll
@@ -794,7 +794,7 @@ define i32 @add_U320_uaddo(%struct.U320* nocapture dereferenceable(40) %0, i64 %
 
 %struct.U192 = type { [3 x i64] }
 
-define void @PR39464(%struct.U192* noalias nocapture sret %0, %struct.U192* nocapture readonly dereferenceable(24) %1, %struct.U192* nocapture readonly dereferenceable(24) %2) {
+define void @PR39464(%struct.U192* noalias nocapture sret(%struct.U192) %0, %struct.U192* nocapture readonly dereferenceable(24) %1, %struct.U192* nocapture readonly dereferenceable(24) %2) {
 ; CHECK-LABEL: PR39464:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    movq %rdi, %rax
@@ -873,7 +873,7 @@ define zeroext i1 @uaddo_U128_without_i128_or(i64 %0, i64 %1, i64 %2, i64 %3, %u
 
 %uint192 = type { i64, i64, i64 }
 
-define void @add_U192_without_i128_or(%uint192* sret %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5, i64 %6) nounwind {
+define void @add_U192_without_i128_or(%uint192* sret(%uint192) %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5, i64 %6) nounwind {
 ; CHECK-LABEL: add_U192_without_i128_or:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    movq %rdi, %rax
@@ -909,7 +909,7 @@ define void @add_U192_without_i128_or(%uint192* sret %0, i64 %1, i64 %2, i64 %3,
 
 ; Classic unrolled 256-bit addition implementation using i64 as the word type.
 ; It starts by adding least significant words and propagates carry to additions of the higher words.
-define void @add_U256_without_i128_or_by_i64_words(%uint256* sret %0, %uint256* %1, %uint256* %2) nounwind {
+define void @add_U256_without_i128_or_by_i64_words(%uint256* sret(%uint256) %0, %uint256* %1, %uint256* %2) nounwind {
 ; CHECK-LABEL: add_U256_without_i128_or_by_i64_words:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    movq %rdi, %rax
@@ -972,7 +972,7 @@ define void @add_U256_without_i128_or_by_i64_words(%uint256* sret %0, %uint256*
 
 ; The 256-bit addition implementation using two inlined uaddo procedures for U128 type { i64, i64 }.
 ; This is similar to how LLVM legalize types in CodeGen.
-define void @add_U256_without_i128_or_recursive(%uint256* sret %0, %uint256* %1, %uint256* %2) nounwind {
+define void @add_U256_without_i128_or_recursive(%uint256* sret(%uint256) %0, %uint256* %1, %uint256* %2) nounwind {
 ; CHECK-LABEL: add_U256_without_i128_or_recursive:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    movq %rdi, %rax
diff --git a/llvm/test/CodeGen/X86/arg-copy-elide.ll b/llvm/test/CodeGen/X86/arg-copy-elide.ll
index 159be2f9b3a7..f8761bd0ac9b 100644
--- a/llvm/test/CodeGen/X86/arg-copy-elide.ll
+++ b/llvm/test/CodeGen/X86/arg-copy-elide.ll
@@ -280,7 +280,7 @@ define void @escape_with_store(i32 %x) {
 
 ; This test case exposed issues with the use of TokenFactor.
 
-define void @sret_and_elide(i32* sret %sret, i32 %v) {
+define void @sret_and_elide(i32* sret(i32) %sret, i32 %v) {
   %v.p = alloca i32
   store i32 %v, i32* %v.p
   call void @addrof_i32(i32* %v.p)
diff --git a/llvm/test/CodeGen/X86/atom-fixup-lea2.ll b/llvm/test/CodeGen/X86/atom-fixup-lea2.ll
index b8a0369a45f4..9aa51dca4b81 100644
--- a/llvm/test/CodeGen/X86/atom-fixup-lea2.ll
+++ b/llvm/test/CodeGen/X86/atom-fixup-lea2.ll
@@ -37,7 +37,7 @@
 define i32 @test() {
 entry:
   %n = alloca %struct.node_t, align 4
-  call void bitcast (void (%struct.node_t*, ...)* @getnode to void (%struct.node_t*)*)(%struct.node_t* sret %n)
+  call void bitcast (void (%struct.node_t*, ...)* @getnode to void (%struct.node_t*)*)(%struct.node_t* sret(%struct.node_t) %n)
   %array = getelementptr inbounds %struct.node_t, %struct.node_t* %n, i32 0, i32 4
   %0 = load i32*, i32** %array, align 4
   %cmp = icmp eq i32* %0, null
@@ -82,4 +82,4 @@ if.end:
   ret i32 %sum.0
 }
 
-declare void @getnode(%struct.node_t* sret, ...)
+declare void @getnode(%struct.node_t* sret(%struct.node_t), ...)
diff --git a/llvm/test/CodeGen/X86/avoid-sfb.ll b/llvm/test/CodeGen/X86/avoid-sfb.ll
index ac1e47eb154b..5c914286a25c 100644
--- a/llvm/test/CodeGen/X86/avoid-sfb.ll
+++ b/llvm/test/CodeGen/X86/avoid-sfb.ll
@@ -724,7 +724,7 @@ if.end:                                           ; preds = %if.then, %entry
 %struct.S6 = type { [4 x i32], i32, i32, i32, i32 }
 
 ; Function Attrs: nounwind uwtable
-define void @test_stack(%struct.S6* noalias nocapture sret %agg.result, %struct.S6* byval(%struct.S6) nocapture readnone align 8 %s1, %struct.S6* byval(%struct.S6) nocapture align 8 %s2, i32 %x) local_unnamed_addr #0 {
+define void @test_stack(%struct.S6* noalias nocapture sret(%struct.S6) %agg.result, %struct.S6* byval(%struct.S6) nocapture readnone align 8 %s1, %struct.S6* byval(%struct.S6) nocapture align 8 %s2, i32 %x) local_unnamed_addr #0 {
 ; CHECK-LABEL: test_stack:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movq %rdi, %rax
diff --git a/llvm/test/CodeGen/X86/avx512vl-arith.ll b/llvm/test/CodeGen/X86/avx512vl-arith.ll
old mode 100755
new mode 100644
diff --git a/llvm/test/CodeGen/X86/complex-fca.ll b/llvm/test/CodeGen/X86/complex-fca.ll
index d1da121213d4..62faedfba7a3 100644
--- a/llvm/test/CodeGen/X86/complex-fca.ll
+++ b/llvm/test/CodeGen/X86/complex-fca.ll
@@ -1,13 +1,13 @@
 ; RUN: llc < %s -mtriple=i686-- | FileCheck %s
 
-define void @ccosl({ x86_fp80, x86_fp80 }* noalias sret %agg.result, { x86_fp80, x86_fp80 } %z) nounwind {
+define void @ccosl({ x86_fp80, x86_fp80 }* noalias sret({ x86_fp80, x86_fp80 }) %agg.result, { x86_fp80, x86_fp80 } %z) nounwind {
 entry:
   %z8 = extractvalue { x86_fp80, x86_fp80 } %z, 0
   %z9 = extractvalue { x86_fp80, x86_fp80 } %z, 1
   %0 = fsub x86_fp80 0xK80000000000000000000, %z9
   %insert = insertvalue { x86_fp80, x86_fp80 } undef, x86_fp80 %0, 0
   %insert7 = insertvalue { x86_fp80, x86_fp80 } %insert, x86_fp80 %z8, 1
-  call void @ccoshl({ x86_fp80, x86_fp80 }* noalias sret %agg.result, { x86_fp80, x86_fp80 } %insert7) nounwind
+  call void @ccoshl({ x86_fp80, x86_fp80 }* noalias sret({ x86_fp80, x86_fp80 }) %agg.result, { x86_fp80, x86_fp80 } %insert7) nounwind
   ret void
 }
 
@@ -18,4 +18,4 @@ entry:
 ; CHECK:         movl    %[[sret_reg]], %eax
 ; CHECK:         retl
 
-declare void @ccoshl({ x86_fp80, x86_fp80 }* noalias sret, { x86_fp80, x86_fp80 }) nounwind
+declare void @ccoshl({ x86_fp80, x86_fp80 }* noalias sret({ x86_fp80, x86_fp80 }), { x86_fp80, x86_fp80 }) nounwind
diff --git a/llvm/test/CodeGen/X86/dagcombine-tokenfactor-limit-crash.ll b/llvm/test/CodeGen/X86/dagcombine-tokenfactor-limit-crash.ll
index 412eb7126f5f..8354491c3cd1 100644
--- a/llvm/test/CodeGen/X86/dagcombine-tokenfactor-limit-crash.ll
+++ b/llvm/test/CodeGen/X86/dagcombine-tokenfactor-limit-crash.ll
@@ -27,7 +27,7 @@ target triple = "x86_64-unknown-linux-gnu"
 ; CHECK-NEXT:     popq    %rbp
 ; CHECK-NEXT:    .cfi_def_cfa %rsp, 8
 ; CHECK-NEXT:    retq
-define void @spam(%struct.snork* noalias sret %arg, %struct.snork* %arg2) {
+define void @spam(%struct.snork* noalias sret(%struct.snork) %arg, %struct.snork* %arg2) {
 bb:
   %tmp = alloca i8, i64 66112, align 32
   %tmp7 = ptrtoint i8* %tmp to i64
diff --git a/llvm/test/CodeGen/X86/fast-isel-x86-64.ll b/llvm/test/CodeGen/X86/fast-isel-x86-64.ll
index 5d3c07fb46c3..e2de3f334385 100644
--- a/llvm/test/CodeGen/X86/fast-isel-x86-64.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-x86-64.ll
@@ -251,13 +251,13 @@ define void @test19(double* %p1) {
 define void @test20() nounwind ssp {
 entry:
   %tmp = alloca %struct.a, align 8
-  call void @test20sret(%struct.a* sret %tmp)
+  call void @test20sret(%struct.a* sret(%struct.a) %tmp)
   ret void
 ; CHECK-LABEL: test20:
 ; CHECK: movq %rsp, %rdi
 ; CHECK: callq _test20sret
 }
-declare void @test20sret(%struct.a* sret)
+declare void @test20sret(%struct.a* sret(%struct.a))
 
 ; Check that -0.0 is not materialized using xor
 define void @test21(double* %p1) {
@@ -292,7 +292,7 @@ entry:
 declare void @foo22(i32)
 
 ; PR13563
-define void @test23(i8* noalias sret %result) {
+define void @test23(i8* noalias sret(i8) %result) {
   %a = alloca i8
   %b = call i8* @foo23()
   ret void
diff --git a/llvm/test/CodeGen/X86/fast-isel-x86.ll b/llvm/test/CodeGen/X86/fast-isel-x86.ll
index f5bc648d0bb2..8da199df8135 100644
--- a/llvm/test/CodeGen/X86/fast-isel-x86.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-x86.ll
@@ -14,7 +14,7 @@ define float @test0() nounwind {
 ; This should pop 4 bytes on return.
 ; CHECK-LABEL: test1:
 ; CHECK: retl $4
-define void @test1({i32, i32, i32, i32}* sret %p) nounwind {
+define void @test1({i32, i32, i32, i32}* sret({i32, i32, i32, i32}) %p) nounwind {
   store {i32, i32, i32, i32} zeroinitializer, {i32, i32, i32, i32}* %p
   ret void
 }
@@ -65,7 +65,7 @@ define i32 @test2() nounwind {
 define void @test3() nounwind ssp {
 entry:
   %tmp = alloca %struct.a, align 8
-  call void @test3sret(%struct.a* sret %tmp)
+  call void @test3sret(%struct.a* sret(%struct.a) %tmp)
   ret void
 ; CHECK-LABEL: test3:
 ; CHECK: subl $44
@@ -73,13 +73,13 @@ entry:
 ; CHECK: calll _test3sret
 ; CHECK: addl $40
 }
-declare void @test3sret(%struct.a* sret)
+declare void @test3sret(%struct.a* sret(%struct.a))
 
 ; Check that fast-isel sret works with fastcc (and does not callee-pop)
 define void @test4() nounwind ssp {
 entry:
   %tmp = alloca %struct.a, align 8
-  call fastcc void @test4fastccsret(%struct.a* sret %tmp)
+  call fastcc void @test4fastccsret(%struct.a* sret(%struct.a) %tmp)
   ret void
 ; CHECK-LABEL: test4:
 ; CHECK: subl $28
@@ -87,4 +87,4 @@ entry:
 ; CHECK: calll _test4fastccsret
 ; CHECK: addl $28
 }
-declare fastcc void @test4fastccsret(%struct.a* sret)
+declare fastcc void @test4fastccsret(%struct.a* sret(%struct.a))
diff --git a/llvm/test/CodeGen/X86/fastcc-sret.ll b/llvm/test/CodeGen/X86/fastcc-sret.ll
index 2962f8ec1ffe..ce715b68b642 100644
--- a/llvm/test/CodeGen/X86/fastcc-sret.ll
+++ b/llvm/test/CodeGen/X86/fastcc-sret.ll
@@ -2,7 +2,7 @@
 
 	%struct.foo = type { [4 x i32] }
 
-define fastcc void @bar(%struct.foo* noalias sret %agg.result) nounwind  {
+define fastcc void @bar(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind  {
 entry:
 	%tmp1 = getelementptr %struct.foo, %struct.foo* %agg.result, i32 0, i32 0
 	%tmp3 = getelementptr [4 x i32], [4 x i32]* %tmp1, i32 0, i32 0
@@ -16,7 +16,7 @@ entry:
 
 define void @foo() nounwind {
 	%memtmp = alloca %struct.foo, align 4
-        call fastcc void @bar( %struct.foo* sret %memtmp ) nounwind
+        call fastcc void @bar(%struct.foo* sret(%struct.foo) %memtmp ) nounwind
         %tmp4 = getelementptr %struct.foo, %struct.foo* %memtmp, i32 0, i32 0
 	%tmp5 = getelementptr [4 x i32], [4 x i32]* %tmp4, i32 0, i32 0
         %tmp6 = load i32, i32* %tmp5
diff --git a/llvm/test/CodeGen/X86/fp128-i128.ll b/llvm/test/CodeGen/X86/fp128-i128.ll
index 453e81fcfd7a..74722a37f38d 100644
--- a/llvm/test/CodeGen/X86/fp128-i128.ll
+++ b/llvm/test/CodeGen/X86/fp128-i128.ll
@@ -440,7 +440,7 @@ declare fp128 @fabsl(fp128) #1
 declare fp128 @copysignl(fp128, fp128) #1
 
 ; Test more complicated logical operations generated from copysignl.
-define void @TestCopySign({ fp128, fp128 }* noalias nocapture sret %agg.result, { fp128, fp128 }* byval({ fp128, fp128 }) nocapture readonly align 16 %z) #0 {
+define void @TestCopySign({ fp128, fp128 }* noalias nocapture sret({ fp128, fp128 }) %agg.result, { fp128, fp128 }* byval({ fp128, fp128 }) nocapture readonly align 16 %z) #0 {
 ; SSE-LABEL: TestCopySign:
 ; SSE:       # %bb.0: # %entry
 ; SSE-NEXT:    pushq %rbp
diff --git a/llvm/test/CodeGen/X86/inalloca-invoke.ll b/llvm/test/CodeGen/X86/inalloca-invoke.ll
index d90e5012ba45..4623c58210a3 100644
--- a/llvm/test/CodeGen/X86/inalloca-invoke.ll
+++ b/llvm/test/CodeGen/X86/inalloca-invoke.ll
@@ -7,8 +7,8 @@
 declare i32 @pers(...)
 declare void @llvm.stackrestore(i8*)
 declare i8* @llvm.stacksave()
-declare void @begin(%Iter* sret)
-declare void @plus(%Iter* sret, %Iter*, i32)
+declare void @begin(%Iter* sret(%Iter))
+declare void @plus(%Iter* sret(%Iter), %Iter*, i32)
 declare void @reverse(%frame.reverse* inalloca align 4)
 
 define i32 @main() personality i32 (...)* @pers {
@@ -26,10 +26,10 @@ blah:
 ; CHECK:  movl %esp, %[[beg:[^ ]*]]
 ; CHECK:  leal 12(%[[beg]]), %[[end:[^ ]*]]
 
-  call void @begin(%Iter* sret %temp.lvalue)
+  call void @begin(%Iter* sret(%Iter) %temp.lvalue)
 ; CHECK:  calll _begin
 
-  invoke void @plus(%Iter* sret %end, %Iter* %temp.lvalue, i32 4)
+  invoke void @plus(%Iter* sret(%Iter) %end, %Iter* %temp.lvalue, i32 4)
           to label %invoke.cont unwind label %lpad
 
 ;  Uses end as sret param.
@@ -37,7 +37,7 @@ blah:
 ; CHECK:  calll _plus
 
 invoke.cont:
-  call void @begin(%Iter* sret %beg)
+  call void @begin(%Iter* sret(%Iter) %beg)
 
 ; CHECK:  pushl %[[beg]]
 ; CHECK:  calll _begin
diff --git a/llvm/test/CodeGen/X86/inreg.ll b/llvm/test/CodeGen/X86/inreg.ll
index cf26798c84e2..bb65b67a51e4 100644
--- a/llvm/test/CodeGen/X86/inreg.ll
+++ b/llvm/test/CodeGen/X86/inreg.ll
@@ -6,7 +6,7 @@
 define void @g1() nounwind {
 entry:
   %tmp = alloca %struct.s1, align 4
-  call void @f(%struct.s1* inreg sret %tmp, i32 inreg 41, i32 inreg 42, i32 43)
+  call void @f(%struct.s1* inreg sret(%struct.s1) %tmp, i32 inreg 41, i32 inreg 42, i32 43)
   ret void
   ; DAG-LABEL: g1:
   ; DAG: subl $[[AMT:.*]], %esp
@@ -29,11 +29,11 @@ entry:
   ; FAST: ret
 }
 
-declare void @f(%struct.s1* inreg sret, i32 inreg, i32 inreg, i32)
+declare void @f(%struct.s1* inreg sret(%struct.s1), i32 inreg, i32 inreg, i32)
 
 %struct.s2 = type {}
 
-define void @g2(%struct.s2* inreg sret %agg.result) nounwind {
+define void @g2(%struct.s2* inreg sret(%struct.s2) %agg.result) nounwind {
 entry:
   ret void
   ; DAG: g2
diff --git a/llvm/test/CodeGen/X86/movtopush.ll b/llvm/test/CodeGen/X86/movtopush.ll
index 184127b8f533..0debe9706716 100644
--- a/llvm/test/CodeGen/X86/movtopush.ll
+++ b/llvm/test/CodeGen/X86/movtopush.ll
@@ -415,7 +415,7 @@ entry:
   store i64 %1, i64* %agg.tmp, align 4
   %call = call x86_thiscallcc %struct.B* @B_ctor(%struct.B* %ref.tmp, %struct.A* byval(%struct.A) %tmpcast)
   %2 = getelementptr inbounds %struct.B, %struct.B* %tmp, i32 0, i32 0
-  call void @B_func(%struct.B* sret %tmp, %struct.B* %ref.tmp, i32 1)
+  call void @B_func(%struct.B* sret(%struct.B) %tmp, %struct.B* %ref.tmp, i32 1)
   ret void
 }
 
diff --git a/llvm/test/CodeGen/X86/musttail-indirect.ll b/llvm/test/CodeGen/X86/musttail-indirect.ll
index 5d2e0694e344..f30d775a343b 100644
--- a/llvm/test/CodeGen/X86/musttail-indirect.ll
+++ b/llvm/test/CodeGen/X86/musttail-indirect.ll
@@ -126,13 +126,13 @@ entry:
 ; CHECK-LABEL: j_thunk:
 ; CHECK: jmpl
 ; CHECK-NOT: ret
-define x86_thiscallcc void @j_thunk(%struct.A* noalias sret %agg.result, %struct.B* %this, i32) {
+define x86_thiscallcc void @j_thunk(%struct.A* noalias sret(%struct.A) %agg.result, %struct.B* %this, i32) {
 entry:
   %1 = bitcast %struct.B* %this to void (%struct.A*, %struct.B*, i32)***
   %vtable = load void (%struct.A*, %struct.B*, i32)**, void (%struct.A*, %struct.B*, i32)*** %1
   %vfn = getelementptr inbounds void (%struct.A*, %struct.B*, i32)*, void (%struct.A*, %struct.B*, i32)** %vtable, i32 4
   %2 = load void (%struct.A*, %struct.B*, i32)*, void (%struct.A*, %struct.B*, i32)** %vfn
-  musttail call x86_thiscallcc void %2(%struct.A* sret %agg.result, %struct.B* %this, i32 %0)
+  musttail call x86_thiscallcc void %2(%struct.A* sret(%struct.A) %agg.result, %struct.B* %this, i32 %0)
   ret void
 }
 
diff --git a/llvm/test/CodeGen/X86/noreturn-call-linux.ll b/llvm/test/CodeGen/X86/noreturn-call-linux.ll
index da4694690335..e7a361621215 100644
--- a/llvm/test/CodeGen/X86/noreturn-call-linux.ll
+++ b/llvm/test/CodeGen/X86/noreturn-call-linux.ll
@@ -34,11 +34,11 @@ if.then:                                          ; preds = %entry
   unreachable
 
 if.end:                                           ; preds = %entry
-  call void @getbyval(%struct.ByVal* nonnull sret %agg.tmp) #4
+  call void @getbyval(%struct.ByVal* nonnull sret(%struct.ByVal) %agg.tmp) #4
   call void @make_push_unprofitable(%struct.ByVal* nonnull byval(%struct.ByVal) align 8 %agg.tmp) #4
-  call void @getbyval(%struct.ByVal* nonnull sret %agg.tmp1) #4
+  call void @getbyval(%struct.ByVal* nonnull sret(%struct.ByVal) %agg.tmp1) #4
   call void @make_push_unprofitable(%struct.ByVal* nonnull byval(%struct.ByVal) align 8 %agg.tmp1) #4
-  call void @getbyval(%struct.ByVal* nonnull sret %agg.tmp2) #4
+  call void @getbyval(%struct.ByVal* nonnull sret(%struct.ByVal) %agg.tmp2) #4
   call void @make_push_unprofitable(%struct.ByVal* nonnull byval(%struct.ByVal) align 8 %agg.tmp2) #4
   ret i32 0
 }
@@ -55,5 +55,5 @@ declare dso_local void @exit_manyarg(i32, i32, i32, i32, i32, i32, i32, i32, i32
 
 declare dso_local void @make_push_unprofitable(%struct.ByVal* byval(%struct.ByVal) align 8)
 
-declare dso_local void @getbyval(%struct.ByVal* sret)
+declare dso_local void @getbyval(%struct.ByVal* sret(%struct.ByVal))
 
diff --git a/llvm/test/CodeGen/X86/noreturn-call.ll b/llvm/test/CodeGen/X86/noreturn-call.ll
index 6f877b6d1b8f..13082c50bc4e 100644
--- a/llvm/test/CodeGen/X86/noreturn-call.ll
+++ b/llvm/test/CodeGen/X86/noreturn-call.ll
@@ -72,11 +72,11 @@ if.then3:                                         ; preds = %if.end
   unreachable
 
 if.end4:                                          ; preds = %if.end
-  call void @getbyval(%struct.ByVal* nonnull sret %agg.tmp)
+  call void @getbyval(%struct.ByVal* nonnull sret(%struct.ByVal) %agg.tmp)
   call void @make_push_unprofitable(%struct.ByVal* nonnull byval(%struct.ByVal) align 4 %agg.tmp)
-  call void @getbyval(%struct.ByVal* nonnull sret %agg.tmp5)
+  call void @getbyval(%struct.ByVal* nonnull sret(%struct.ByVal) %agg.tmp5)
   call void @make_push_unprofitable(%struct.ByVal* nonnull byval(%struct.ByVal) align 4 %agg.tmp5)
-  call void @getbyval(%struct.ByVal* nonnull sret %agg.tmp6)
+  call void @getbyval(%struct.ByVal* nonnull sret(%struct.ByVal) %agg.tmp6)
   call void @make_push_unprofitable(%struct.ByVal* nonnull byval(%struct.ByVal) align 4 %agg.tmp6)
   ret i32 0
 }
@@ -101,4 +101,4 @@ declare dso_local x86_stdcallcc void @stdcall_abort(i32, i32) noreturn
 
 declare dso_local void @make_push_unprofitable(%struct.ByVal* byval(%struct.ByVal) align 4)
 
-declare dso_local void @getbyval(%struct.ByVal* sret)
+declare dso_local void @getbyval(%struct.ByVal* sret(%struct.ByVal))
diff --git a/llvm/test/CodeGen/X86/pr38865-2.ll b/llvm/test/CodeGen/X86/pr38865-2.ll
index ab2e3e34e5f2..a574696f98a4 100644
--- a/llvm/test/CodeGen/X86/pr38865-2.ll
+++ b/llvm/test/CodeGen/X86/pr38865-2.ll
@@ -5,7 +5,7 @@ target datalayout = "e-m:e-p:32:32-i64:64-f80:128-n8:16:32:64-S128"
 
 %struct.a = type { i8 }
 
-define void @_Z1bv(%struct.a* noalias sret %agg.result) {
+define void @_Z1bv(%struct.a* noalias sret(%struct.a) %agg.result) {
 ; CHECK-LABEL: _Z1bv:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    pushq %rax
@@ -18,6 +18,6 @@ define void @_Z1bv(%struct.a* noalias sret %agg.result) {
 ; CHECK-NEXT:    .cfi_def_cfa_offset 8
 ; CHECK-NEXT:    retq
 entry:
-  call void @_Z1bv(%struct.a* sret %agg.result)
+  call void @_Z1bv(%struct.a* sret(%struct.a) %agg.result)
   ret void
 }
diff --git a/llvm/test/CodeGen/X86/scev-interchange.ll b/llvm/test/CodeGen/X86/scev-interchange.ll
index 9cbb462e47da..17bed79d2827 100644
--- a/llvm/test/CodeGen/X86/scev-interchange.ll
+++ b/llvm/test/CodeGen/X86/scev-interchange.ll
@@ -57,7 +57,7 @@ entry:
 			to label %invcont.i unwind label %lpad.i
 
 invcont.i:		; preds = %entry
-	invoke fastcc void @_ZN4FE_QILi3EE14get_dpo_vectorEj(%"struct.std::vector<int,std::allocator<int> >"* noalias sret undef, i32 %degree)
+	invoke fastcc void @_ZN4FE_QILi3EE14get_dpo_vectorEj(%"struct.std::vector<int,std::allocator<int> >"* noalias sret(%"struct.std::vector<int,std::allocator<int> >") undef, i32 %degree)
 			to label %invcont1.i unwind label %lpad120.i
 
 invcont1.i:		; preds = %invcont.i
@@ -65,7 +65,7 @@ invcont1.i:		; preds = %invcont.i
 			to label %invcont3.i unwind label %lpad124.i
 
 invcont3.i:		; preds = %invcont1.i
-	invoke fastcc void @_ZN4FE_QILi3EE14get_dpo_vectorEj(%"struct.std::vector<int,std::allocator<int> >"* noalias sret undef, i32 %degree)
+	invoke fastcc void @_ZN4FE_QILi3EE14get_dpo_vectorEj(%"struct.std::vector<int,std::allocator<int> >"* noalias sret(%"struct.std::vector<int,std::allocator<int> >") undef, i32 %degree)
 			to label %invcont4.i unwind label %lpad128.i
 
 invcont4.i:		; preds = %invcont3.i
@@ -73,11 +73,11 @@ invcont4.i:		; preds = %invcont3.i
 			to label %invcont6.i unwind label %lpad132.i
 
 invcont6.i:		; preds = %invcont4.i
-	invoke fastcc void @_ZN4FE_QILi3EE14get_dpo_vectorEj(%"struct.std::vector<int,std::allocator<int> >"* noalias sret undef, i32 %degree)
+	invoke fastcc void @_ZN4FE_QILi3EE14get_dpo_vectorEj(%"struct.std::vector<int,std::allocator<int> >"* noalias sret(%"struct.std::vector<int,std::allocator<int> >") undef, i32 %degree)
 			to label %invcont7.i unwind label %lpad136.i
 
 invcont7.i:		; preds = %invcont6.i
-	invoke fastcc void @_ZN11Polynomials19LagrangeEquidistant23generate_complete_basisEj(%"struct.std::vector<Polynomials::Polynomial<double>,std::allocator<Polynomials::Polynomial<double> > >"* noalias sret undef, i32 %degree)
+	invoke fastcc void @_ZN11Polynomials19LagrangeEquidistant23generate_complete_basisEj(%"struct.std::vector<Polynomials::Polynomial<double>,std::allocator<Polynomials::Polynomial<double> > >"* noalias sret(%"struct.std::vector<Polynomials::Polynomial<double>,std::allocator<Polynomials::Polynomial<double> > >") undef, i32 %degree)
 			to label %invcont9.i unwind label %lpad140.i
 
 invcont9.i:		; preds = %invcont7.i
@@ -179,7 +179,7 @@ bb.i.i.i.i.i.i.i.i.i.i:		; preds = %bb.i.i.i.i.i.i.i.i.i.i, %_ZNSt12_Vector_base
 	br i1 undef, label %bb50.i.i.i, label %bb.i.i.i.i.i.i.i.i.i.i
 
 bb50.i.i.i:		; preds = %bb.i.i.i.i.i.i.i.i.i.i, %_ZNSt12_Vector_baseIjSaIjEEC2EmRKS0_.exit.i.i.i12.i.i
-	invoke fastcc void @_ZN11FE_Q_Helper12_GLOBAL__N_116invert_numberingERKSt6vectorIjSaIjEE(%"struct.std::vector<int,std::allocator<int> >"* noalias sret undef, %"struct.std::vector<int,std::allocator<int> >"* undef)
+	invoke fastcc void @_ZN11FE_Q_Helper12_GLOBAL__N_116invert_numberingERKSt6vectorIjSaIjEE(%"struct.std::vector<int,std::allocator<int> >"* noalias sret(%"struct.std::vector<int,std::allocator<int> >") undef, %"struct.std::vector<int,std::allocator<int> >"* undef)
 			to label %bb83.i unwind label %lpad188.i
 
 lpad.i19.i.i:		; preds = %lpad.i.i.i.i8.i.i
@@ -213,7 +213,7 @@ bb.i.i.i.i.i.i.i.i320.i:		; preds = %bb.i.i.i.i.i.i.i.i320.i, %_ZNSt12_Vector_ba
 	br i1 undef, label %bb50.i.i, label %bb.i.i.i.i.i.i.i.i320.i
 
 bb50.i.i:		; preds = %bb.i.i.i.i.i.i.i.i320.i, %_ZNSt12_Vector_baseIjSaIjEEC2EmRKS0_.exit.i.i.i.i
-	invoke fastcc void @_ZN11FE_Q_Helper12_GLOBAL__N_116invert_numberingERKSt6vectorIjSaIjEE(%"struct.std::vector<int,std::allocator<int> >"* noalias sret undef, %"struct.std::vector<int,std::allocator<int> >"* undef)
+	invoke fastcc void @_ZN11FE_Q_Helper12_GLOBAL__N_116invert_numberingERKSt6vectorIjSaIjEE(%"struct.std::vector<int,std::allocator<int> >"* noalias sret(%"struct.std::vector<int,std::allocator<int> >") undef, %"struct.std::vector<int,std::allocator<int> >"* undef)
 			to label %invcont86.i unwind label %lpad200.i
 
 lpad.i352.i:		; preds = %lpad.i.i.i.i315.i
diff --git a/llvm/test/CodeGen/X86/sibcall.ll b/llvm/test/CodeGen/X86/sibcall.ll
index 45f7a581a373..d0fd7a66e54b 100644
--- a/llvm/test/CodeGen/X86/sibcall.ll
+++ b/llvm/test/CodeGen/X86/sibcall.ll
@@ -452,7 +452,7 @@ entry:
 ; rdar://7726868
 %struct.foo = type { [4 x i32] }
 
-define void @t15(%struct.foo* noalias sret %agg.result) nounwind  {
+define void @t15(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind  {
 ; X86-LABEL: t15:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
@@ -482,11 +482,11 @@ define void @t15(%struct.foo* noalias sret %agg.result) nounwind  {
 ; X32-NEXT:    movl %ebx, %eax
 ; X32-NEXT:    popq %rbx
 ; X32-NEXT:    retq
-  tail call fastcc void @f(%struct.foo* noalias sret %agg.result) nounwind
+  tail call fastcc void @f(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind
   ret void
 }
 
-declare void @f(%struct.foo* noalias sret) nounwind
+declare void @f(%struct.foo* noalias sret(%struct.foo)) nounwind
 
 define void @t16() nounwind ssp {
 ; X86-LABEL: t16:
@@ -627,7 +627,7 @@ entry:
 declare fastcc double @foo20(double) nounwind
 
 ; bug 28417
-define fastcc void @t21_sret_to_sret(%struct.foo* noalias sret %agg.result) nounwind  {
+define fastcc void @t21_sret_to_sret(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind  {
 ; X86-LABEL: t21_sret_to_sret:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
@@ -656,11 +656,11 @@ define fastcc void @t21_sret_to_sret(%struct.foo* noalias sret %agg.result) noun
 ; X32-NEXT:    movl %ebx, %eax
 ; X32-NEXT:    popq %rbx
 ; X32-NEXT:    retq
-  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret %agg.result) nounwind
+  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind
   ret void
 }
 
-define fastcc void @t21_sret_to_sret_alloca(%struct.foo* noalias sret %agg.result) nounwind  {
+define fastcc void @t21_sret_to_sret_alloca(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind  {
 ; X86-LABEL: t21_sret_to_sret_alloca:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
@@ -697,11 +697,11 @@ define fastcc void @t21_sret_to_sret_alloca(%struct.foo* noalias sret %agg.resul
 ; X32-NEXT:    popq %rbx
 ; X32-NEXT:    retq
   %a = alloca %struct.foo, align 8
-  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret %a) nounwind
+  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret(%struct.foo) %a) nounwind
   ret void
 }
 
-define fastcc void @t21_sret_to_sret_more_args(%struct.foo* noalias sret %agg.result, i32 %a, i32 %b) nounwind  {
+define fastcc void @t21_sret_to_sret_more_args(%struct.foo* noalias sret(%struct.foo) %agg.result, i32 %a, i32 %b) nounwind  {
 ; X86-LABEL: t21_sret_to_sret_more_args:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
@@ -732,11 +732,11 @@ define fastcc void @t21_sret_to_sret_more_args(%struct.foo* noalias sret %agg.re
 ; X32-NEXT:    movl %ebx, %eax
 ; X32-NEXT:    popq %rbx
 ; X32-NEXT:    retq
-  tail call fastcc void @f_sret(%struct.foo* noalias sret %agg.result, i32 %a, i32 %b) nounwind
+  tail call fastcc void @f_sret(%struct.foo* noalias sret(%struct.foo) %agg.result, i32 %a, i32 %b) nounwind
   ret void
 }
 
-define fastcc void @t21_sret_to_sret_second_arg_sret(%struct.foo* noalias %agg.result, %struct.foo* noalias sret %ret) nounwind  {
+define fastcc void @t21_sret_to_sret_second_arg_sret(%struct.foo* noalias %agg.result, %struct.foo* noalias sret(%struct.foo) %ret) nounwind  {
 ; X86-LABEL: t21_sret_to_sret_second_arg_sret:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
@@ -768,11 +768,11 @@ define fastcc void @t21_sret_to_sret_second_arg_sret(%struct.foo* noalias %agg.r
 ; X32-NEXT:    movl %ebx, %eax
 ; X32-NEXT:    popq %rbx
 ; X32-NEXT:    retq
-  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret %ret) nounwind
+  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret(%struct.foo) %ret) nounwind
   ret void
 }
 
-define fastcc void @t21_sret_to_sret_more_args2(%struct.foo* noalias sret %agg.result, i32 %a, i32 %b) nounwind  {
+define fastcc void @t21_sret_to_sret_more_args2(%struct.foo* noalias sret(%struct.foo) %agg.result, i32 %a, i32 %b) nounwind  {
 ; X86-LABEL: t21_sret_to_sret_more_args2:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
@@ -810,12 +810,12 @@ define fastcc void @t21_sret_to_sret_more_args2(%struct.foo* noalias sret %agg.r
 ; X32-NEXT:    movl %ebx, %eax
 ; X32-NEXT:    popq %rbx
 ; X32-NEXT:    retq
-  tail call fastcc void @f_sret(%struct.foo* noalias sret %agg.result, i32 %b, i32 %a) nounwind
+  tail call fastcc void @f_sret(%struct.foo* noalias sret(%struct.foo) %agg.result, i32 %b, i32 %a) nounwind
   ret void
 }
 
 
-define fastcc void @t21_sret_to_sret_args_mismatch(%struct.foo* noalias sret %agg.result, %struct.foo* noalias %ret) nounwind  {
+define fastcc void @t21_sret_to_sret_args_mismatch(%struct.foo* noalias sret(%struct.foo) %agg.result, %struct.foo* noalias %ret) nounwind  {
 ; X86-LABEL: t21_sret_to_sret_args_mismatch:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
@@ -847,11 +847,11 @@ define fastcc void @t21_sret_to_sret_args_mismatch(%struct.foo* noalias sret %ag
 ; X32-NEXT:    movl %ebx, %eax
 ; X32-NEXT:    popq %rbx
 ; X32-NEXT:    retq
-  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret %ret) nounwind
+  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret(%struct.foo) %ret) nounwind
   ret void
 }
 
-define fastcc void @t21_sret_to_sret_args_mismatch2(%struct.foo* noalias sret %agg.result, %struct.foo* noalias %ret) nounwind  {
+define fastcc void @t21_sret_to_sret_args_mismatch2(%struct.foo* noalias sret(%struct.foo) %agg.result, %struct.foo* noalias %ret) nounwind  {
 ; X86-LABEL: t21_sret_to_sret_args_mismatch2:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
@@ -883,11 +883,11 @@ define fastcc void @t21_sret_to_sret_args_mismatch2(%struct.foo* noalias sret %a
 ; X32-NEXT:    movl %ebx, %eax
 ; X32-NEXT:    popq %rbx
 ; X32-NEXT:    retq
-  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret %ret) nounwind
+  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret(%struct.foo) %ret) nounwind
   ret void
 }
 
-define fastcc void @t21_sret_to_sret_arg_mismatch(%struct.foo* noalias sret %agg.result) nounwind  {
+define fastcc void @t21_sret_to_sret_arg_mismatch(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind  {
 ; X86-LABEL: t21_sret_to_sret_arg_mismatch:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
@@ -923,11 +923,11 @@ define fastcc void @t21_sret_to_sret_arg_mismatch(%struct.foo* noalias sret %agg
 ; X32-NEXT:    popq %rbx
 ; X32-NEXT:    retq
   %a = call fastcc %struct.foo* @ret_struct()
-  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret %a) nounwind
+  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret(%struct.foo) %a) nounwind
   ret void
 }
 
-define fastcc void @t21_sret_to_sret_structs_mismatch(%struct.foo* noalias sret %agg.result, %struct.foo* noalias %a) nounwind  {
+define fastcc void @t21_sret_to_sret_structs_mismatch(%struct.foo* noalias sret(%struct.foo) %agg.result, %struct.foo* noalias %a) nounwind  {
 ; X86-LABEL: t21_sret_to_sret_structs_mismatch:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %edi
@@ -979,14 +979,14 @@ define fastcc void @t21_sret_to_sret_structs_mismatch(%struct.foo* noalias sret
 ; X32-NEXT:    popq %rbp
 ; X32-NEXT:    retq
   %b = call fastcc %struct.foo* @ret_struct()
-  tail call fastcc void @t21_f_sret2(%struct.foo* noalias sret %a, %struct.foo* noalias %b) nounwind
+  tail call fastcc void @t21_f_sret2(%struct.foo* noalias sret(%struct.foo) %a, %struct.foo* noalias %b) nounwind
   ret void
 }
 
 declare ccc %struct.foo* @ret_struct() nounwind
 
 
-define fastcc void @t21_sret_to_non_sret(%struct.foo* noalias sret %agg.result) nounwind  {
+define fastcc void @t21_sret_to_non_sret(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind  {
 ; X86-LABEL: t21_sret_to_non_sret:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
@@ -1043,14 +1043,14 @@ define ccc void @t22_non_sret_to_sret(%struct.foo* %agg.result) nounwind  {
 ; X32-NEXT:    callq t22_f_sret
 ; X32-NEXT:    popq %rax
 ; X32-NEXT:    retq
-  tail call ccc void @t22_f_sret(%struct.foo* noalias sret %agg.result) nounwind
+  tail call ccc void @t22_f_sret(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind
   ret void
 }
 
-declare fastcc void @t21_f_sret(%struct.foo* noalias sret) nounwind
-declare fastcc void @t21_f_sret2(%struct.foo* noalias sret, %struct.foo* noalias) nounwind
+declare fastcc void @t21_f_sret(%struct.foo* noalias sret(%struct.foo)) nounwind
+declare fastcc void @t21_f_sret2(%struct.foo* noalias sret(%struct.foo), %struct.foo* noalias) nounwind
 declare fastcc void @t21_f_non_sret(%struct.foo*) nounwind
 
-declare ccc void @t22_f_sret(%struct.foo* noalias sret) nounwind
+declare ccc void @t22_f_sret(%struct.foo* noalias sret(%struct.foo)) nounwind
 
-declare ccc void @f_sret(%struct.foo* noalias sret, i32, i32) nounwind
+declare ccc void @f_sret(%struct.foo* noalias sret(%struct.foo), i32, i32) nounwind
diff --git a/llvm/test/CodeGen/X86/sret-implicit.ll b/llvm/test/CodeGen/X86/sret-implicit.ll
index 75aaf46188c6..242082deb058 100644
--- a/llvm/test/CodeGen/X86/sret-implicit.ll
+++ b/llvm/test/CodeGen/X86/sret-implicit.ll
@@ -4,7 +4,7 @@
 ; RUN: llc -mtriple=x86_64-apple-darwin8 -terminal-rule < %s | FileCheck %s --check-prefix=X64
 ; RUN: llc -mtriple=x86_64-pc-linux -terminal-rule < %s | FileCheck %s --check-prefix=X64
 
-define void @sret_void(i32* sret %p) {
+define void @sret_void(i32* sret(i32) %p) {
   store i32 0, i32* %p
   ret void
 }
diff --git a/llvm/test/CodeGen/X86/subcarry.ll b/llvm/test/CodeGen/X86/subcarry.ll
index f5476cdebdd3..18167458bd61 100644
--- a/llvm/test/CodeGen/X86/subcarry.ll
+++ b/llvm/test/CodeGen/X86/subcarry.ll
@@ -312,7 +312,7 @@ define i32 @sub_U320_usubo(%struct.U320* nocapture dereferenceable(40) %0, i64 %
 
 %struct.U192 = type { [3 x i64] }
 
-define void @PR39464(%struct.U192* noalias nocapture sret %0, %struct.U192* nocapture readonly dereferenceable(24) %1, %struct.U192* nocapture readonly dereferenceable(24) %2) {
+define void @PR39464(%struct.U192* noalias nocapture sret(%struct.U192) %0, %struct.U192* nocapture readonly dereferenceable(24) %1, %struct.U192* nocapture readonly dereferenceable(24) %2) {
 ; CHECK-LABEL: PR39464:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    movq %rdi, %rax
@@ -366,7 +366,7 @@ define void @PR39464(%struct.U192* noalias nocapture sret %0, %struct.U192* noca
 
 ; The 256-bit subtraction implementation using two inlined usubo procedures for U128 type { i64, i64 }.
 ; This is similar to how LLVM legalize types in CodeGen.
-define void @sub_U256_without_i128_or_recursive(%uint256* sret %0, %uint256* %1, %uint256* %2) nounwind {
+define void @sub_U256_without_i128_or_recursive(%uint256* sret(%uint256) %0, %uint256* %1, %uint256* %2) nounwind {
 ; CHECK-LABEL: sub_U256_without_i128_or_recursive:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    movq %rdi, %rax
diff --git a/llvm/test/CodeGen/X86/swift-return.ll b/llvm/test/CodeGen/X86/swift-return.ll
index 11312f08edfa..fc3115405963 100644
--- a/llvm/test/CodeGen/X86/swift-return.ll
+++ b/llvm/test/CodeGen/X86/swift-return.ll
@@ -294,7 +294,7 @@ define void @consume_i1_ret() {
 
 declare swiftcc { i1, i1, i1, i1 } @produce_i1_ret()
 
-define swiftcc void @foo(i64* sret %agg.result, i64 %val) {
+define swiftcc void @foo(i64* sret(i64) %agg.result, i64 %val) {
 ; CHECK-LABEL: foo:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    movq %rdi, (%rax)
diff --git a/llvm/test/CodeGen/X86/swifterror.ll b/llvm/test/CodeGen/X86/swifterror.ll
index ffb896926738..ac23473b8ecc 100644
--- a/llvm/test/CodeGen/X86/swifterror.ll
+++ b/llvm/test/CodeGen/X86/swifterror.ll
@@ -204,7 +204,7 @@ bb_end:
 
 ; "foo_sret" is a function that takes a swifterror parameter, it also has a sret
 ; parameter.
-define void @foo_sret(%struct.S* sret %agg.result, i32 %val1, %swift_error** swifterror %error_ptr_ref) {
+define void @foo_sret(%struct.S* sret(%struct.S) %agg.result, i32 %val1, %swift_error** swifterror %error_ptr_ref) {
 ; CHECK-APPLE-LABEL: foo_sret:
 ; CHECK-APPLE: movq %rdi, %{{.*}}
 ; CHECK-APPLE: movl $16, %edi
@@ -269,7 +269,7 @@ entry:
   %s = alloca %struct.S, align 8
   %error_ptr_ref = alloca swifterror %swift_error*
   store %swift_error* null, %swift_error** %error_ptr_ref
-  call void @foo_sret(%struct.S* sret %s, i32 1, %swift_error** swifterror %error_ptr_ref)
+  call void @foo_sret(%struct.S* sret(%struct.S) %s, i32 1, %swift_error** swifterror %error_ptr_ref)
   %error_from_foo = load %swift_error*, %swift_error** %error_ptr_ref
   %had_error_from_foo = icmp ne %swift_error* %error_from_foo, null
   %tmp = bitcast %swift_error* %error_from_foo to i8*
diff --git a/llvm/test/CodeGen/X86/vectorcall.ll b/llvm/test/CodeGen/X86/vectorcall.ll
index 4a375acc4b97..d3d44f6bdd7a 100644
--- a/llvm/test/CodeGen/X86/vectorcall.ll
+++ b/llvm/test/CodeGen/X86/vectorcall.ll
@@ -171,7 +171,7 @@ declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1)
 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1)
 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i1)
 
-define x86_vectorcallcc void @test_mixed_7(%struct.HVA5* noalias sret %agg.result) {
+define x86_vectorcallcc void @test_mixed_7(%struct.HVA5* noalias sret(%struct.HVA5) %agg.result) {
 ; X86-LABEL: test_mixed_7@@4
 ; X64-LABEL: test_mixed_7@@8
 ; X64:         mov{{[ql]}}	%rcx, %rax
diff --git a/llvm/test/CodeGen/X86/widen_load-2.ll b/llvm/test/CodeGen/X86/widen_load-2.ll
index 4ca71ceb2e0f..c9531f2c9ced 100644
--- a/llvm/test/CodeGen/X86/widen_load-2.ll
+++ b/llvm/test/CodeGen/X86/widen_load-2.ll
@@ -6,7 +6,7 @@
 ;
 
 %i32vec3 = type <3 x i32>
-define void @add3i32(%i32vec3*  sret %ret, %i32vec3* %ap, %i32vec3* %bp)  {
+define void @add3i32(%i32vec3* sret(%i32vec3) %ret, %i32vec3* %ap, %i32vec3* %bp)  {
 ; X86-LABEL: add3i32:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
@@ -34,7 +34,7 @@ define void @add3i32(%i32vec3*  sret %ret, %i32vec3* %ap, %i32vec3* %bp)  {
 	ret void
 }
 
-define void @add3i32_2(%i32vec3*  sret %ret, %i32vec3* %ap, %i32vec3* %bp)  {
+define void @add3i32_2(%i32vec3* sret(%i32vec3) %ret, %i32vec3* %ap, %i32vec3* %bp)  {
 ; X86-LABEL: add3i32_2:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
@@ -71,7 +71,7 @@ define void @add3i32_2(%i32vec3*  sret %ret, %i32vec3* %ap, %i32vec3* %bp)  {
 }
 
 %i32vec7 = type <7 x i32>
-define void @add7i32(%i32vec7*  sret %ret, %i32vec7* %ap, %i32vec7* %bp)  {
+define void @add7i32(%i32vec7* sret(%i32vec7) %ret, %i32vec7* %ap, %i32vec7* %bp)  {
 ; X86-LABEL: add7i32:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
@@ -106,7 +106,7 @@ define void @add7i32(%i32vec7*  sret %ret, %i32vec7* %ap, %i32vec7* %bp)  {
 }
 
 %i32vec12 = type <12 x i32>
-define void @add12i32(%i32vec12*  sret %ret, %i32vec12* %ap, %i32vec12* %bp)  {
+define void @add12i32(%i32vec12* sret(%i32vec12) %ret, %i32vec12* %ap, %i32vec12* %bp)  {
 ; X86-LABEL: add12i32:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
@@ -145,7 +145,7 @@ define void @add12i32(%i32vec12*  sret %ret, %i32vec12* %ap, %i32vec12* %bp)  {
 
 
 %i16vec3 = type <3 x i16>
-define void @add3i16(%i16vec3* nocapture sret %ret, %i16vec3* %ap, %i16vec3* %bp) nounwind {
+define void @add3i16(%i16vec3* nocapture sret(%i16vec3) %ret, %i16vec3* %ap, %i16vec3* %bp) nounwind {
 ; X86-LABEL: add3i16:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
@@ -177,7 +177,7 @@ define void @add3i16(%i16vec3* nocapture sret %ret, %i16vec3* %ap, %i16vec3* %bp
 }
 
 %i16vec4 = type <4 x i16>
-define void @add4i16(%i16vec4* nocapture sret %ret, %i16vec4* %ap, %i16vec4* %bp) nounwind {
+define void @add4i16(%i16vec4* nocapture sret(%i16vec4) %ret, %i16vec4* %ap, %i16vec4* %bp) nounwind {
 ; X86-LABEL: add4i16:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
@@ -205,7 +205,7 @@ define void @add4i16(%i16vec4* nocapture sret %ret, %i16vec4* %ap, %i16vec4* %bp
 }
 
 %i16vec12 = type <12 x i16>
-define void @add12i16(%i16vec12* nocapture sret %ret, %i16vec12* %ap, %i16vec12* %bp) nounwind {
+define void @add12i16(%i16vec12* nocapture sret(%i16vec12) %ret, %i16vec12* %ap, %i16vec12* %bp) nounwind {
 ; X86-LABEL: add12i16:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
@@ -238,7 +238,7 @@ define void @add12i16(%i16vec12* nocapture sret %ret, %i16vec12* %ap, %i16vec12*
 }
 
 %i16vec18 = type <18 x i16>
-define void @add18i16(%i16vec18* nocapture sret %ret, %i16vec18* %ap, %i16vec18* %bp) nounwind {
+define void @add18i16(%i16vec18* nocapture sret(%i16vec18) %ret, %i16vec18* %ap, %i16vec18* %bp) nounwind {
 ; X86-LABEL: add18i16:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
@@ -277,7 +277,7 @@ define void @add18i16(%i16vec18* nocapture sret %ret, %i16vec18* %ap, %i16vec18*
 
 
 %i8vec3 = type <3 x i8>
-define void @add3i8(%i8vec3* nocapture sret %ret, %i8vec3* %ap, %i8vec3* %bp) nounwind {
+define void @add3i8(%i8vec3* nocapture sret(%i8vec3) %ret, %i8vec3* %ap, %i8vec3* %bp) nounwind {
 ; X86-LABEL: add3i8:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
@@ -307,7 +307,7 @@ define void @add3i8(%i8vec3* nocapture sret %ret, %i8vec3* %ap, %i8vec3* %bp) no
 }
 
 %i8vec31 = type <31 x i8>
-define void @add31i8(%i8vec31* nocapture sret %ret, %i8vec31* %ap, %i8vec31* %bp) nounwind {
+define void @add31i8(%i8vec31* nocapture sret(%i8vec31) %ret, %i8vec31* %ap, %i8vec31* %bp) nounwind {
 ; X86-LABEL: add31i8:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
@@ -347,7 +347,7 @@ define void @add31i8(%i8vec31* nocapture sret %ret, %i8vec31* %ap, %i8vec31* %bp
 
 
 %i8vec3pack = type { <3 x i8>, i8 }
-define void @rot(%i8vec3pack* nocapture sret %result, %i8vec3pack* %X, %i8vec3pack* %rot) nounwind {
+define void @rot(%i8vec3pack* nocapture sret(%i8vec3pack) %result, %i8vec3pack* %X, %i8vec3pack* %rot) nounwind {
 ; X86-LABEL: rot:
 ; X86:       # %bb.0: # %entry
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
diff --git a/llvm/test/CodeGen/X86/win32_sret.ll b/llvm/test/CodeGen/X86/win32_sret.ll
index ea164ae28f87..ded578255edc 100644
--- a/llvm/test/CodeGen/X86/win32_sret.ll
+++ b/llvm/test/CodeGen/X86/win32_sret.ll
@@ -13,7 +13,7 @@
 ; is callee-cleanup. However, in MSVC's cdecl calling convention, sret pointer
 ; arguments are caller-cleanup like normal arguments.
 
-define void @sret1(i8* sret %x) nounwind {
+define void @sret1(i8* sret(i8) %x) nounwind {
 entry:
 ; WIN32-LABEL:      _sret1:
 ; WIN32:      movb $42, ({{%e[abcd]x}})
@@ -33,7 +33,7 @@ entry:
   ret void
 }
 
-define void @sret2(i8* sret %x, i8 %y) nounwind {
+define void @sret2(i8* sret(i8) %x, i8 %y) nounwind {
 entry:
 ; WIN32-LABEL:      _sret2:
 ; WIN32:      movb {{.*}}, ({{%e[abcd]x}})
@@ -53,7 +53,7 @@ entry:
   ret void
 }
 
-define void @sret3(i8* sret %x, i8* %y) nounwind {
+define void @sret3(i8* sret(i8) %x, i8* %y) nounwind {
 entry:
 ; WIN32-LABEL:      _sret3:
 ; WIN32:      movb $42, ([[REG1:%e[abcd]x]])
@@ -78,7 +78,7 @@ entry:
 ; PR15556
 %struct.S4 = type { i32, i32, i32 }
 
-define void @sret4(%struct.S4* noalias sret %agg.result) {
+define void @sret4(%struct.S4* noalias sret(%struct.S4) %agg.result) {
 entry:
 ; WIN32-LABEL:     _sret4:
 ; WIN32:     movl $42, ({{%e[abcd]x}})
@@ -102,7 +102,7 @@ entry:
 %struct.S5 = type { i32 }
 %class.C5 = type { i8 }
 
-define x86_thiscallcc void @"\01?foo@C5@@QAE?AUS5@@XZ"(%struct.S5* noalias sret %agg.result, %class.C5* %this) {
+define x86_thiscallcc void @"\01?foo@C5@@QAE?AUS5@@XZ"(%struct.S5* noalias sret(%struct.S5) %agg.result, %class.C5* %this) {
 entry:
   %this.addr = alloca %class.C5*, align 4
   store %class.C5* %this, %class.C5** %this.addr, align 4
@@ -127,7 +127,7 @@ define void @call_foo5() {
 entry:
   %c = alloca %class.C5, align 1
   %s = alloca %struct.S5, align 4
-  call x86_thiscallcc void @"\01?foo@C5@@QAE?AUS5@@XZ"(%struct.S5* sret %s, %class.C5* %c)
+  call x86_thiscallcc void @"\01?foo@C5@@QAE?AUS5@@XZ"(%struct.S5* sret(%struct.S5) %s, %class.C5* %c)
 ; WIN32-LABEL:      {{^}}_call_foo5:
 ; MINGW_X86-LABEL:  {{^}}_call_foo5:
 ; CYGWIN-LABEL:     {{^}}_call_foo5:
@@ -172,7 +172,7 @@ define void @test6_f(%struct.test6* %x) nounwind {
 ; CYGWIN-NEXT: calll   _test6_g
 
   %tmp = alloca %struct.test6, align 4
-  call x86_thiscallcc void @test6_g(%struct.test6* sret %tmp, %struct.test6* %x)
+  call x86_thiscallcc void @test6_g(%struct.test6* sret(%struct.test6) %tmp, %struct.test6* %x)
   ret void
 }
 declare x86_thiscallcc void @test6_g(%struct.test6* sret, %struct.test6*)
@@ -199,11 +199,11 @@ define void @test7_f(%struct.test7* %x) nounwind {
 ; CYGWIN-NEXT: {{pushl   %eax|movl %eax, \(%esp\)}}
 
   %tmp = alloca %struct.test7, align 4
-  call x86_thiscallcc void @test7_g(%struct.test7* %x, %struct.test7* sret %tmp)
+  call x86_thiscallcc void @test7_g(%struct.test7* %x, %struct.test7* sret(%struct.test7) %tmp)
   ret void
 }
 
-define x86_thiscallcc void @test7_g(%struct.test7* %in, %struct.test7* sret %out) {
+define x86_thiscallcc void @test7_g(%struct.test7* %in, %struct.test7* sret(%struct.test7) %out) {
   %s = getelementptr %struct.test7, %struct.test7* %in, i32 0, i32 0
   %d = getelementptr %struct.test7, %struct.test7* %out, i32 0, i32 0
   %v = load i32, i32* %s
@@ -223,7 +223,7 @@ declare void @clobber_eax()
 ; Test what happens if the first parameter has to be split by codegen.
 ; Realistically, no frontend will generate code like this, but here it is for
 ; completeness.
-define void @test8_f(i64 inreg %a, i64* sret %out) {
+define void @test8_f(i64 inreg %a, i64* sret(i64) %out) {
   store i64 %a, i64* %out
   call void @clobber_eax()
   ret void
diff --git a/llvm/test/CodeGen/X86/win64_vararg.ll b/llvm/test/CodeGen/X86/win64_vararg.ll
index 91841ced39f2..cf99725f0525 100644
--- a/llvm/test/CodeGen/X86/win64_vararg.ll
+++ b/llvm/test/CodeGen/X86/win64_vararg.ll
@@ -110,7 +110,7 @@ entry:
   ret i32 %tmp
 }
 
-define void @sret_arg(i32* sret %agg.result, i8* nocapture readnone %format, ...) {
+define void @sret_arg(i32* sret(i32) %agg.result, i8* nocapture readnone %format, ...) {
 entry:
   %ap = alloca i8*
   %ap_i8 = bitcast i8** %ap to i8*
diff --git a/llvm/test/CodeGen/X86/x86-64-sret-return-2.ll b/llvm/test/CodeGen/X86/x86-64-sret-return-2.ll
index 9f57ee1960e1..62a7e83871b9 100644
--- a/llvm/test/CodeGen/X86/x86-64-sret-return-2.ll
+++ b/llvm/test/CodeGen/X86/x86-64-sret-return-2.ll
@@ -6,7 +6,7 @@
 ; RUNX: llc -mtriple=x86_64-pc-linux-gnux32 < %s | FileCheck -check-prefix=X32ABI %s
 
 ; This used to crash due to topological sorting issues in selection DAG.
-define void @foo(i32* sret %agg.result, i32, i32, i32, i32, i32, void (i32)* %pred) {
+define void @foo(i32* sret(i32) %agg.result, i32, i32, i32, i32, i32, void (i32)* %pred) {
 entry:
   call void %pred(i32 undef)
   ret void
diff --git a/llvm/test/CodeGen/X86/x86-64-sret-return.ll b/llvm/test/CodeGen/X86/x86-64-sret-return.ll
index a0c43488db1e..3b685134ec4d 100644
--- a/llvm/test/CodeGen/X86/x86-64-sret-return.ll
+++ b/llvm/test/CodeGen/X86/x86-64-sret-return.ll
@@ -11,7 +11,7 @@
 ; X32ABI-LABEL: bar:
 ; X32ABI: movl %edi, %eax
 
-define void @bar(%struct.foo* noalias sret  %agg.result, %struct.foo* %d) nounwind  {
+define void @bar(%struct.foo* noalias sret(%struct.foo)  %agg.result, %struct.foo* %d) nounwind  {
 entry:
 	%d_addr = alloca %struct.foo*		; <%struct.foo**> [#uses=2]
 	%memtmp = alloca %struct.foo, align 8		; <%struct.foo*> [#uses=1]
@@ -67,7 +67,7 @@ return:		; preds = %entry
 ; X32ABI-LABEL: foo:
 ; X32ABI: movl %edi, %eax
 
-define void @foo({ i64 }* noalias nocapture sret %agg.result) nounwind {
+define void @foo({ i64 }* noalias nocapture sret({ i64 }) %agg.result) nounwind {
   store { i64 } { i64 0 }, { i64 }* %agg.result
   ret void
 }
diff --git a/llvm/test/DebugInfo/ARM/selectiondag-deadcode.ll b/llvm/test/DebugInfo/ARM/selectiondag-deadcode.ll
index d4d0207bf07d..5246575efd1d 100644
--- a/llvm/test/DebugInfo/ARM/selectiondag-deadcode.ll
+++ b/llvm/test/DebugInfo/ARM/selectiondag-deadcode.ll
@@ -1,7 +1,7 @@
 ; RUN: llc -filetype=asm < %s | FileCheck %s
 target triple = "thumbv7-apple-ios7.0.0"
 %class.Matrix3.0.6.10 = type { [9 x float] }
-define arm_aapcscc void @_Z9GetMatrixv(%class.Matrix3.0.6.10* noalias nocapture sret %agg.result) #0 !dbg !39 {
+define arm_aapcscc void @_Z9GetMatrixv(%class.Matrix3.0.6.10* noalias nocapture sret(%class.Matrix3.0.6.10) %agg.result) #0 !dbg !39 {
   br i1 fcmp oeq (float fadd (float fadd (float fmul (float undef, float undef), float fmul (float undef, float undef)), float fmul (float undef, float undef)), float 0.000000e+00), label %_ZN7Vector39NormalizeEv.exit, label %1
   tail call arm_aapcscc void @_ZL4Sqrtd() #3
   br label %_ZN7Vector39NormalizeEv.exit
diff --git a/llvm/test/DebugInfo/COFF/class-options-common.ll b/llvm/test/DebugInfo/COFF/class-options-common.ll
index da29415489c9..b50c5555c206 100644
--- a/llvm/test/DebugInfo/COFF/class-options-common.ll
+++ b/llvm/test/DebugInfo/COFF/class-options-common.ll
@@ -708,7 +708,7 @@ entry:
 declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
 
 ; Function Attrs: noinline nounwind optnone uwtable
-define dso_local void @"?Func_ExplicitCtorClass@@YA?AVExplicitCtorClass@@AEAV1@@Z"(%class.ExplicitCtorClass* noalias sret %agg.result, %class.ExplicitCtorClass* dereferenceable(1) %arg) #0 !dbg !37 {
+define dso_local void @"?Func_ExplicitCtorClass@@YA?AVExplicitCtorClass@@AEAV1@@Z"(%class.ExplicitCtorClass* noalias sret(%class.ExplicitCtorClass) %agg.result, %class.ExplicitCtorClass* dereferenceable(1) %arg) #0 !dbg !37 {
 entry:
   %arg.addr = alloca %class.ExplicitCtorClass*, align 8
   store %class.ExplicitCtorClass* %arg, %class.ExplicitCtorClass** %arg.addr, align 8
@@ -718,7 +718,7 @@ entry:
 }
 
 ; Function Attrs: noinline nounwind optnone uwtable
-define dso_local void @"?Func_DefaultedCtorClass@@YA?AVDefaultedCtorClass@@AEAV1@@Z"(%class.DefaultedCtorClass* noalias sret %agg.result, %class.DefaultedCtorClass* dereferenceable(1) %arg) #0 !dbg !49 {
+define dso_local void @"?Func_DefaultedCtorClass@@YA?AVDefaultedCtorClass@@AEAV1@@Z"(%class.DefaultedCtorClass* noalias sret(%class.DefaultedCtorClass) %agg.result, %class.DefaultedCtorClass* dereferenceable(1) %arg) #0 !dbg !49 {
 entry:
   %arg.addr = alloca %class.DefaultedCtorClass*, align 8
   store %class.DefaultedCtorClass* %arg, %class.DefaultedCtorClass** %arg.addr, align 8
@@ -728,7 +728,7 @@ entry:
 }
 
 ; Function Attrs: noinline nounwind optnone uwtable
-define dso_local void @"?Func_DefaultArgumentCtorClass@@YA?AVDefaultArgumentCtorClass@@AEAV1@@Z"(%class.DefaultArgumentCtorClass* noalias sret %agg.result, %class.DefaultArgumentCtorClass* dereferenceable(1) %arg) #0 !dbg !61 {
+define dso_local void @"?Func_DefaultArgumentCtorClass@@YA?AVDefaultArgumentCtorClass@@AEAV1@@Z"(%class.DefaultArgumentCtorClass* noalias sret(%class.DefaultArgumentCtorClass) %agg.result, %class.DefaultArgumentCtorClass* dereferenceable(1) %arg) #0 !dbg !61 {
 entry:
   %arg.addr = alloca %class.DefaultArgumentCtorClass*, align 8
   store %class.DefaultArgumentCtorClass* %arg, %class.DefaultArgumentCtorClass** %arg.addr, align 8
@@ -738,7 +738,7 @@ entry:
 }
 
 ; Function Attrs: noinline nounwind optnone uwtable
-define dso_local void @"?Func_UserDtorClass@@YA?AVUserDtorClass@@AEAV1@@Z"(%class.UserDtorClass* noalias sret %agg.result, %class.UserDtorClass* dereferenceable(1) %arg) #0 !dbg !73 {
+define dso_local void @"?Func_UserDtorClass@@YA?AVUserDtorClass@@AEAV1@@Z"(%class.UserDtorClass* noalias sret(%class.UserDtorClass) %agg.result, %class.UserDtorClass* dereferenceable(1) %arg) #0 !dbg !73 {
 entry:
   %arg.addr = alloca %class.UserDtorClass*, align 8
   store %class.UserDtorClass* %arg, %class.UserDtorClass** %arg.addr, align 8
@@ -748,7 +748,7 @@ entry:
 }
 
 ; Function Attrs: noinline nounwind optnone uwtable
-define dso_local void @"?Func_DefaultedDtorClass@@YA?AVDefaultedDtorClass@@AEAV1@@Z"(%class.DefaultedDtorClass* noalias sret %agg.result, %class.DefaultedDtorClass* dereferenceable(1) %arg) #0 !dbg !85 {
+define dso_local void @"?Func_DefaultedDtorClass@@YA?AVDefaultedDtorClass@@AEAV1@@Z"(%class.DefaultedDtorClass* noalias sret(%class.DefaultedDtorClass) %agg.result, %class.DefaultedDtorClass* dereferenceable(1) %arg) #0 !dbg !85 {
 entry:
   %arg.addr = alloca %class.DefaultedDtorClass*, align 8
   store %class.DefaultedDtorClass* %arg, %class.DefaultedDtorClass** %arg.addr, align 8
@@ -758,7 +758,7 @@ entry:
 }
 
 ; Function Attrs: noinline nounwind optnone uwtable
-define dso_local void @"?Func_AClass@@YA?AVAClass@@AEAV1@@Z"(%class.AClass* noalias sret %agg.result, %class.AClass* dereferenceable(1) %arg) #0 !dbg !97 {
+define dso_local void @"?Func_AClass@@YA?AVAClass@@AEAV1@@Z"(%class.AClass* noalias sret(%class.AClass) %agg.result, %class.AClass* dereferenceable(1) %arg) #0 !dbg !97 {
 entry:
   %arg.addr = alloca %class.AClass*, align 8
   store %class.AClass* %arg, %class.AClass** %arg.addr, align 8
@@ -794,7 +794,7 @@ entry:
 }
 
 ; Function Attrs: noinline nounwind optnone uwtable
-define dso_local void @"?Func_BStruct@@YA?AUBStruct@@AEAU1@@Z"(%struct.BStruct* noalias sret %agg.result, %struct.BStruct* dereferenceable(1) %arg) #0 !dbg !122 {
+define dso_local void @"?Func_BStruct@@YA?AUBStruct@@AEAU1@@Z"(%struct.BStruct* noalias sret(%struct.BStruct) %agg.result, %struct.BStruct* dereferenceable(1) %arg) #0 !dbg !122 {
 entry:
   %arg.addr = alloca %struct.BStruct*, align 8
   store %struct.BStruct* %arg, %struct.BStruct** %arg.addr, align 8
@@ -825,7 +825,7 @@ entry:
 }
 
 ; Function Attrs: noinline nounwind optnone uwtable
-define dso_local void @"?Func_BUnion@@YA?ATBUnion@@AEAT1@@Z"(%union.BUnion* noalias sret %agg.result, %union.BUnion* dereferenceable(1) %arg) #0 !dbg !151 {
+define dso_local void @"?Func_BUnion@@YA?ATBUnion@@AEAT1@@Z"(%union.BUnion* noalias sret(%union.BUnion) %agg.result, %union.BUnion* dereferenceable(1) %arg) #0 !dbg !151 {
 entry:
   %arg.addr = alloca %union.BUnion*, align 8
   store %union.BUnion* %arg, %union.BUnion** %arg.addr, align 8
diff --git a/llvm/test/DebugInfo/COFF/function-options.ll b/llvm/test/DebugInfo/COFF/function-options.ll
index 7e166facf382..835f3fbe3c8a 100644
--- a/llvm/test/DebugInfo/COFF/function-options.ll
+++ b/llvm/test/DebugInfo/COFF/function-options.ll
@@ -409,7 +409,7 @@ entry:
 declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
 
 ; Function Attrs: noinline nounwind optnone uwtable
-define dso_local void @"?Func_BClass@@YA?AVBClass@@AEAV1@@Z"(%class.BClass* noalias sret %agg.result, %class.BClass* dereferenceable(1) %arg) #0 !dbg !15 {
+define dso_local void @"?Func_BClass@@YA?AVBClass@@AEAV1@@Z"(%class.BClass* noalias sret(%class.BClass) %agg.result, %class.BClass* dereferenceable(1) %arg) #0 !dbg !15 {
 entry:
   %result.ptr = alloca i8*, align 8
   %arg.addr = alloca %class.BClass*, align 8
@@ -422,7 +422,7 @@ entry:
 }
 
 ; Function Attrs: noinline nounwind optnone uwtable
-define dso_local void @"?Func_C1Class@@YA?AVC1Class@@AEAV1@@Z"(%class.C1Class* noalias sret %agg.result, %class.C1Class* dereferenceable(1) %arg) #0 !dbg !27 {
+define dso_local void @"?Func_C1Class@@YA?AVC1Class@@AEAV1@@Z"(%class.C1Class* noalias sret(%class.C1Class) %agg.result, %class.C1Class* dereferenceable(1) %arg) #0 !dbg !27 {
 entry:
   %result.ptr = alloca i8*, align 8
   %arg.addr = alloca %class.C1Class*, align 8
@@ -435,7 +435,7 @@ entry:
 }
 
 ; Function Attrs: noinline nounwind optnone uwtable
-define dso_local void @"?Func_C2Class@@YA?AVC2Class@@AEAV1@@Z"(%class.C2Class* noalias sret %agg.result, %class.C2Class* dereferenceable(1) %arg) #0 !dbg !39 {
+define dso_local void @"?Func_C2Class@@YA?AVC2Class@@AEAV1@@Z"(%class.C2Class* noalias sret(%class.C2Class) %agg.result, %class.C2Class* dereferenceable(1) %arg) #0 !dbg !39 {
 entry:
   %result.ptr = alloca i8*, align 8
   %arg.addr = alloca %class.C2Class*, align 8
@@ -448,7 +448,7 @@ entry:
 }
 
 ; Function Attrs: noinline nounwind optnone uwtable
-define dso_local void @"?Func_DClass@@YA?AVDClass@@AEAV1@@Z"(%class.DClass* noalias sret %agg.result, %class.DClass* dereferenceable(1) %arg) #0 !dbg !51 {
+define dso_local void @"?Func_DClass@@YA?AVDClass@@AEAV1@@Z"(%class.DClass* noalias sret(%class.DClass) %agg.result, %class.DClass* dereferenceable(1) %arg) #0 !dbg !51 {
 entry:
   %result.ptr = alloca i8*, align 8
   %arg.addr = alloca %class.DClass*, align 8
@@ -487,7 +487,7 @@ entry:
 }
 
 ; Function Attrs: noinline nounwind optnone uwtable
-define dso_local void @"?Func_BStruct@@YA?AUBStruct@@AEAU1@@Z"(%struct.BStruct* noalias sret %agg.result, %struct.BStruct* dereferenceable(1) %arg) #0 !dbg !84 {
+define dso_local void @"?Func_BStruct@@YA?AUBStruct@@AEAU1@@Z"(%struct.BStruct* noalias sret(%struct.BStruct) %agg.result, %struct.BStruct* dereferenceable(1) %arg) #0 !dbg !84 {
 entry:
   %result.ptr = alloca i8*, align 8
   %arg.addr = alloca %struct.BStruct*, align 8
@@ -513,7 +513,7 @@ entry:
 }
 
 ; Function Attrs: noinline nounwind optnone uwtable
-define dso_local void @"?Func_BUnion@@YA?ATBUnion@@AEAT1@@Z"(%union.BUnion* noalias sret %agg.result, %union.BUnion* dereferenceable(1) %arg) #0 !dbg !103 {
+define dso_local void @"?Func_BUnion@@YA?ATBUnion@@AEAT1@@Z"(%union.BUnion* noalias sret(%union.BUnion) %agg.result, %union.BUnion* dereferenceable(1) %arg) #0 !dbg !103 {
 entry:
   %result.ptr = alloca i8*, align 8
   %arg.addr = alloca %union.BUnion*, align 8
diff --git a/llvm/test/DebugInfo/COFF/nrvo.ll b/llvm/test/DebugInfo/COFF/nrvo.ll
index 77f13fcb7daf..7bd9d35b7a00 100644
--- a/llvm/test/DebugInfo/COFF/nrvo.ll
+++ b/llvm/test/DebugInfo/COFF/nrvo.ll
@@ -68,7 +68,7 @@ entry:
 declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
 
 ; Function Attrs: noinline nounwind optnone uwtable
-define dso_local void @"?GetFoo@@YA?AUFoo@@XZ"(%struct.Foo* noalias sret %agg.result) #0 !dbg !14 {
+define dso_local void @"?GetFoo@@YA?AUFoo@@XZ"(%struct.Foo* noalias sret(%struct.Foo) %agg.result) #0 !dbg !14 {
 entry:
   %result.ptr = alloca i8*, align 8
   %0 = bitcast %struct.Foo* %agg.result to i8*
@@ -89,7 +89,7 @@ entry:
   %bar = alloca %struct.Foo, align 4
   store i32 0, i32* %retval, align 4
   call void @llvm.dbg.declare(metadata %struct.Foo* %bar, metadata !36, metadata !DIExpression()), !dbg !37
-  call void @"?GetFoo@@YA?AUFoo@@XZ"(%struct.Foo* sret %bar), !dbg !37
+  call void @"?GetFoo@@YA?AUFoo@@XZ"(%struct.Foo* sret(%struct.Foo) %bar), !dbg !37
   %x = getelementptr inbounds %struct.Foo, %struct.Foo* %bar, i32 0, i32 0, !dbg !38
   %0 = load i32, i32* %x, align 4, !dbg !38
   ret i32 %0, !dbg !38
diff --git a/llvm/test/DebugInfo/Generic/2010-10-01-crash.ll b/llvm/test/DebugInfo/Generic/2010-10-01-crash.ll
index 4c513890462a..acab6e8a33d4 100644
--- a/llvm/test/DebugInfo/Generic/2010-10-01-crash.ll
+++ b/llvm/test/DebugInfo/Generic/2010-10-01-crash.ll
@@ -1,6 +1,6 @@
 ; RUN: llc -O0 %s -o /dev/null
 
-define void @CGRectStandardize(i32* sret %agg.result, i32* byval(i32) %rect) nounwind ssp !dbg !0 {
+define void @CGRectStandardize(i32* sret(i32) %agg.result, i32* byval(i32) %rect) nounwind ssp !dbg !0 {
 entry:
   call void @llvm.dbg.declare(metadata i32* %rect, metadata !23, metadata !DIExpression()), !dbg !24
   ret void
diff --git a/llvm/test/DebugInfo/X86/dbg-declare-arg.ll b/llvm/test/DebugInfo/X86/dbg-declare-arg.ll
index b2b88cb8b1b8..3498cc3038b7 100644
--- a/llvm/test/DebugInfo/X86/dbg-declare-arg.ll
+++ b/llvm/test/DebugInfo/X86/dbg-declare-arg.ll
@@ -25,7 +25,7 @@ target triple = "x86_64-apple-macosx10.6.7"
 
 %class.A = type { i32, i32, i32, i32 }
 
-define void @_Z3fooi(%class.A* sret %agg.result, i32 %i) ssp !dbg !19 {
+define void @_Z3fooi(%class.A* sret(%class.A) %agg.result, i32 %i) ssp !dbg !19 {
 entry:
   %i.addr = alloca i32, align 4
   %j = alloca i32, align 4
diff --git a/llvm/test/DebugInfo/X86/dbg_value_direct.ll b/llvm/test/DebugInfo/X86/dbg_value_direct.ll
index 9b2d63a5ea2f..daaca2ffb600 100644
--- a/llvm/test/DebugInfo/X86/dbg_value_direct.ll
+++ b/llvm/test/DebugInfo/X86/dbg_value_direct.ll
@@ -23,7 +23,7 @@ target triple = "x86_64-unknown-linux-gnu"
 @___asan_gen_ = private unnamed_addr constant [16 x i8] c"1 32 4 5 .addr \00", align 1
 
 ; Function Attrs: sanitize_address uwtable
-define void @_Z4funci(%struct.A* noalias sret %agg.result, i32) #0 "stack-protector-buffer-size"="1" !dbg !4 {
+define void @_Z4funci(%struct.A* noalias sret(%struct.A) %agg.result, i32) #0 "stack-protector-buffer-size"="1" !dbg !4 {
 entry:
   %MyAlloca = alloca [96 x i8], align 32
   %1 = ptrtoint [96 x i8]* %MyAlloca to i64
diff --git a/llvm/test/DebugInfo/X86/parameters.ll b/llvm/test/DebugInfo/X86/parameters.ll
index dafde9acceff..2eff34a43c6e 100644
--- a/llvm/test/DebugInfo/X86/parameters.ll
+++ b/llvm/test/DebugInfo/X86/parameters.ll
@@ -46,7 +46,7 @@
 %"struct.pr14763::foo" = type { i8 }
 
 ; Function Attrs: uwtable
-define void @_ZN7pr147634funcENS_3fooE(%"struct.pr14763::foo"* noalias sret %agg.result, %"struct.pr14763::foo"* %f) #0 !dbg !4 {
+define void @_ZN7pr147634funcENS_3fooE(%"struct.pr14763::foo"* noalias sret(%"struct.pr14763::foo") %agg.result, %"struct.pr14763::foo"* %f) #0 !dbg !4 {
 entry:
   call void @llvm.dbg.declare(metadata %"struct.pr14763::foo"* %f, metadata !22, metadata !DIExpression(DW_OP_deref)), !dbg !24
   call void @_ZN7pr147633fooC1ERKS0_(%"struct.pr14763::foo"* %agg.result, %"struct.pr14763::foo"* %f), !dbg !25
diff --git a/llvm/test/DebugInfo/X86/spill-indirect-nrvo.ll b/llvm/test/DebugInfo/X86/spill-indirect-nrvo.ll
index fb0c5779ca8b..aa2490ecb46a 100644
--- a/llvm/test/DebugInfo/X86/spill-indirect-nrvo.ll
+++ b/llvm/test/DebugInfo/X86/spill-indirect-nrvo.ll
@@ -44,7 +44,7 @@ target triple = "x86_64--linux"
 %struct.string = type { i32 }
 
 ; Function Attrs: uwtable
-define void @_Z10get_stringv(%struct.string* noalias sret %agg.result) #0 !dbg !7 {
+define void @_Z10get_stringv(%struct.string* noalias sret(%struct.string) %agg.result) #0 !dbg !7 {
 entry:
   %nrvo = alloca i1, align 1
   store i1 false, i1* %nrvo, align 1, !dbg !24
diff --git a/llvm/test/DebugInfo/X86/sret.ll b/llvm/test/DebugInfo/X86/sret.ll
index 59d98866e091..479f2f605421 100644
--- a/llvm/test/DebugInfo/X86/sret.ll
+++ b/llvm/test/DebugInfo/X86/sret.ll
@@ -101,7 +101,7 @@ entry:
 }
 
 ; Function Attrs: uwtable
-define void @_ZN1B9AInstanceEv(%class.A* noalias sret %agg.result, %class.B* %this) #2 align 2 !dbg !53 {
+define void @_ZN1B9AInstanceEv(%class.A* noalias sret(%class.A) %agg.result, %class.B* %this) #2 align 2 !dbg !53 {
 entry:
   %this.addr = alloca %class.B*, align 8
   %nrvo = alloca i1
@@ -156,7 +156,7 @@ entry:
   call void @llvm.dbg.declare(metadata %class.B* %b, metadata !107, metadata !DIExpression()), !dbg !108
   call void @_ZN1BC2Ev(%class.B* %b), !dbg !108
   call void @llvm.dbg.declare(metadata i32* %return_val, metadata !109, metadata !DIExpression()), !dbg !110
-  call void @_ZN1B9AInstanceEv(%class.A* sret %temp.lvalue, %class.B* %b), !dbg !110
+  call void @_ZN1B9AInstanceEv(%class.A* sret(%class.A) %temp.lvalue, %class.B* %b), !dbg !110
   %call = invoke i32 @_ZN1A7get_intEv(%class.A* %temp.lvalue)
           to label %invoke.cont unwind label %lpad, !dbg !110
 
@@ -164,7 +164,7 @@ invoke.cont:                                      ; preds = %entry
   call void @_ZN1AD2Ev(%class.A* %temp.lvalue), !dbg !111
   store i32 %call, i32* %return_val, align 4, !dbg !111
   call void @llvm.dbg.declare(metadata %class.A* %a, metadata !113, metadata !DIExpression()), !dbg !114
-  call void @_ZN1B9AInstanceEv(%class.A* sret %a, %class.B* %b), !dbg !114
+  call void @_ZN1B9AInstanceEv(%class.A* sret(%class.A) %a, %class.B* %b), !dbg !114
   %0 = load i32, i32* %return_val, align 4, !dbg !115
   store i32 %0, i32* %retval, !dbg !115
   store i32 1, i32* %cleanup.dest.slot
diff --git a/llvm/test/Feature/callingconventions.ll b/llvm/test/Feature/callingconventions.ll
index ac4c5090a51d..ea30a8e7f4d1 100644
--- a/llvm/test/Feature/callingconventions.ll
+++ b/llvm/test/Feature/callingconventions.ll
@@ -11,8 +11,8 @@ define coldcc void @bar() {
         ret void
 }
 
-define void @structret({ i8 }* sret  %P) {
-        call void @structret( { i8 }* sret  %P )
+define void @structret({ i8 }* sret({ i8 })  %P) {
+        call void @structret( { i8 }* sret({ i8 })  %P )
         ret void
 }
 
diff --git a/llvm/test/Linker/func-attrs-a.ll b/llvm/test/Linker/func-attrs-a.ll
index 4f43c6dbc53d..55b27aae79f6 100644
--- a/llvm/test/Linker/func-attrs-a.ll
+++ b/llvm/test/Linker/func-attrs-a.ll
@@ -1,13 +1,13 @@
 ; RUN: llvm-link %s %p/func-attrs-b.ll -S -o - | FileCheck %s
 ; PR2382
 
-; CHECK: call void @check0(%struct.S0* sret null, %struct.S0* byval(%struct.S0) align 4 null, %struct.S0* align 4 null, %struct.S0* byval(%struct.S0) align 4 null)
-; CHECK: define void @check0(%struct.S0* sret %agg.result, %struct.S0* byval(%struct.S0) %arg0, %struct.S0* %arg1, %struct.S0* byval(%struct.S0) %arg2)
+; CHECK: call void @check0(%struct.S0* sret(%struct.S0) null, %struct.S0* byval(%struct.S0) align 4 null, %struct.S0* align 4 null, %struct.S0* byval(%struct.S0) align 4 null)
+; CHECK: define void @check0(%struct.S0* sret(%struct.S0) %agg.result, %struct.S0* byval(%struct.S0) %arg0, %struct.S0* %arg1, %struct.S0* byval(%struct.S0) %arg2)
 
 %struct.S0 = type <{ i8, i8, i8, i8 }>
 
 define void @a() {
-  call void @check0(%struct.S0* sret null, %struct.S0* byval(%struct.S0) align 4 null, %struct.S0* align 4 null, %struct.S0* byval(%struct.S0) align 4 null)
+  call void @check0(%struct.S0* sret(%struct.S0) null, %struct.S0* byval(%struct.S0) align 4 null, %struct.S0* align 4 null, %struct.S0* byval(%struct.S0) align 4 null)
   ret void
 }
 
diff --git a/llvm/test/Linker/func-attrs-b.ll b/llvm/test/Linker/func-attrs-b.ll
index fad59c229255..beb373207c1b 100644
--- a/llvm/test/Linker/func-attrs-b.ll
+++ b/llvm/test/Linker/func-attrs-b.ll
@@ -3,6 +3,6 @@
 
 %struct.S0 = type <{ i8, i8, i8, i8 }>
 
-define void @check0(%struct.S0* sret %agg.result, %struct.S0* byval(%struct.S0) %arg0, %struct.S0* %arg1, %struct.S0* byval(%struct.S0) %arg2) {
+define void @check0(%struct.S0* sret(%struct.S0) %agg.result, %struct.S0* byval(%struct.S0) %arg0, %struct.S0* %arg1, %struct.S0* byval(%struct.S0) %arg2) {
   ret void
 }
diff --git a/llvm/test/Other/lint.ll b/llvm/test/Other/lint.ll
index a156301c1c26..5e9b4660ec17 100644
--- a/llvm/test/Other/lint.ll
+++ b/llvm/test/Other/lint.ll
@@ -6,7 +6,7 @@ declare fastcc void @bar()
 declare void @llvm.stackrestore(i8*)
 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind
 declare void @llvm.memcpy.inline.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind
-declare void @has_sret(i8* sret %p)
+declare void @has_sret(i8* sret(i8) %p)
 declare void @has_noaliases(i32* noalias %p, i32* %q)
 declare void @one_arg(i32)
 
diff --git a/llvm/test/Transforms/ArgumentPromotion/sret.ll b/llvm/test/Transforms/ArgumentPromotion/sret.ll
index c4328e41bb26..ea4a9070a5fc 100644
--- a/llvm/test/Transforms/ArgumentPromotion/sret.ll
+++ b/llvm/test/Transforms/ArgumentPromotion/sret.ll
@@ -5,7 +5,7 @@
 target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-pc-windows-msvc"
 
-define internal void @add({i32, i32}* %this, i32* sret %r) {
+define internal void @add({i32, i32}* %this, i32* sret(i32) %r) {
 ; CHECK-LABEL: define {{[^@]+}}@add
 ; CHECK-SAME: (i32 [[THIS_0_0_VAL:%.*]], i32 [[THIS_0_1_VAL:%.*]], i32* noalias [[R:%.*]])
 ; CHECK-NEXT:    [[AB:%.*]] = add i32 [[THIS_0_0_VAL]], [[THIS_0_1_VAL]]
@@ -35,6 +35,6 @@ define void @f() {
   %r = alloca i32
   %pair = alloca {i32, i32}
 
-  call void @add({i32, i32}* %pair, i32* sret %r)
+  call void @add({i32, i32}* %pair, i32* sret(i32) %r)
   ret void
 }
diff --git a/llvm/test/Transforms/DeadArgElim/2006-06-27-struct-ret.ll b/llvm/test/Transforms/DeadArgElim/2006-06-27-struct-ret.ll
index fac6dd24efb1..571519e6eaf5 100644
--- a/llvm/test/Transforms/DeadArgElim/2006-06-27-struct-ret.ll
+++ b/llvm/test/Transforms/DeadArgElim/2006-06-27-struct-ret.ll
@@ -1,11 +1,11 @@
 ; RUN: opt < %s -deadargelim -disable-output
 
-define internal void @build_delaunay({ i32 }* sret  %agg.result) {
+define internal void @build_delaunay({ i32 }* sret({ i32 })  %agg.result) {
         ret void
 }
 
 define void @test() {
-        call void @build_delaunay( { i32 }* sret  null )
+        call void @build_delaunay({ i32 }* sret({ i32 }) null)
         ret void
 }
 
diff --git a/llvm/test/Transforms/DeadStoreElimination/MSSA/2011-09-06-EndOfFunction.ll b/llvm/test/Transforms/DeadStoreElimination/MSSA/2011-09-06-EndOfFunction.ll
index 7e46d28a9c47..e94fd9cb23d4 100644
--- a/llvm/test/Transforms/DeadStoreElimination/MSSA/2011-09-06-EndOfFunction.ll
+++ b/llvm/test/Transforms/DeadStoreElimination/MSSA/2011-09-06-EndOfFunction.ll
@@ -6,10 +6,10 @@ target triple = "x86_64-apple-darwin"
 %"class.std::auto_ptr" = type { i32* }
 
 ; CHECK-LABEL: @_Z3foov(
-define void @_Z3foov(%"class.std::auto_ptr"* noalias nocapture sret %agg.result) uwtable ssp {
+define void @_Z3foov(%"class.std::auto_ptr"* noalias nocapture sret(%"class.std::auto_ptr") %agg.result) uwtable ssp {
 _ZNSt8auto_ptrIiED1Ev.exit:
   %temp.lvalue = alloca %"class.std::auto_ptr", align 8
-  call void @_Z3barv(%"class.std::auto_ptr"* sret %temp.lvalue)
+  call void @_Z3barv(%"class.std::auto_ptr"* sret(%"class.std::auto_ptr") %temp.lvalue)
   %_M_ptr.i.i = getelementptr inbounds %"class.std::auto_ptr", %"class.std::auto_ptr"* %temp.lvalue, i64 0, i32 0
   %tmp.i.i = load i32*, i32** %_M_ptr.i.i, align 8
 ; CHECK-NOT: store i32* null
@@ -20,4 +20,4 @@ _ZNSt8auto_ptrIiED1Ev.exit:
   ret void
 }
 
-declare void @_Z3barv(%"class.std::auto_ptr"* sret)
+declare void @_Z3barv(%"class.std::auto_ptr"* sret(%"class.std::auto_ptr"))
diff --git a/llvm/test/Transforms/DeadStoreElimination/MSSA/combined-partial-overwrites.ll b/llvm/test/Transforms/DeadStoreElimination/MSSA/combined-partial-overwrites.ll
index ab957e0c3cf0..9cf847b36eeb 100644
--- a/llvm/test/Transforms/DeadStoreElimination/MSSA/combined-partial-overwrites.ll
+++ b/llvm/test/Transforms/DeadStoreElimination/MSSA/combined-partial-overwrites.ll
@@ -5,7 +5,7 @@ target triple = "powerpc64le-unknown-linux"
 
 %"struct.std::complex" = type { { float, float } }
 
-define void @_Z4testSt7complexIfE(%"struct.std::complex"* noalias nocapture sret %agg.result, i64 %c.coerce) {
+define void @_Z4testSt7complexIfE(%"struct.std::complex"* noalias nocapture sret(%"struct.std::complex") %agg.result, i64 %c.coerce) {
 ; CHECK-LABEL: @_Z4testSt7complexIfE(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[REF_TMP:%.*]] = alloca i64, align 8
@@ -15,7 +15,7 @@ define void @_Z4testSt7complexIfE(%"struct.std::complex"* noalias nocapture sret
 ; CHECK-NEXT:    [[TMP0:%.*]] = bitcast i32 [[C_SROA_0_0_EXTRACT_TRUNC]] to float
 ; CHECK-NEXT:    [[C_SROA_2_0_EXTRACT_TRUNC:%.*]] = trunc i64 [[C_COERCE]] to i32
 ; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i32 [[C_SROA_2_0_EXTRACT_TRUNC]] to float
-; CHECK-NEXT:    call void @_Z3barSt7complexIfE(%"struct.std::complex"* nonnull sret [[TMPCAST]], i64 [[C_COERCE]])
+; CHECK-NEXT:    call void @_Z3barSt7complexIfE(%"struct.std::complex"* nonnull sret(%"struct.std::complex") [[TMPCAST]], i64 [[C_COERCE]])
 ; CHECK-NEXT:    [[TMP2:%.*]] = load i64, i64* [[REF_TMP]], align 8
 ; CHECK-NEXT:    [[_M_VALUE_REALP_I_I:%.*]] = getelementptr inbounds %"struct.std::complex", %"struct.std::complex"* [[AGG_RESULT:%.*]], i64 0, i32 0, i32 0
 ; CHECK-NEXT:    [[TMP3:%.*]] = lshr i64 [[TMP2]], 32
@@ -43,7 +43,7 @@ entry:
   %0 = bitcast i32 %c.sroa.0.0.extract.trunc to float
   %c.sroa.2.0.extract.trunc = trunc i64 %c.coerce to i32
   %1 = bitcast i32 %c.sroa.2.0.extract.trunc to float
-  call void @_Z3barSt7complexIfE(%"struct.std::complex"* nonnull sret %tmpcast, i64 %c.coerce)
+  call void @_Z3barSt7complexIfE(%"struct.std::complex"* nonnull sret(%"struct.std::complex") %tmpcast, i64 %c.coerce)
   %2 = bitcast %"struct.std::complex"* %agg.result to i64*
   %3 = load i64, i64* %ref.tmp, align 8
   store i64 %3, i64* %2, align 4
@@ -66,7 +66,7 @@ entry:
   ret void
 }
 
-declare void @_Z3barSt7complexIfE(%"struct.std::complex"* sret, i64)
+declare void @_Z3barSt7complexIfE(%"struct.std::complex"* sret(%"struct.std::complex"), i64)
 
 define void @test1(i32 *%ptr) {
 ; CHECK-LABEL: @test1(
diff --git a/llvm/test/Transforms/DeadStoreElimination/MemDepAnalysis/2011-09-06-EndOfFunction.ll b/llvm/test/Transforms/DeadStoreElimination/MemDepAnalysis/2011-09-06-EndOfFunction.ll
index 3f7734987917..635498336ff2 100644
--- a/llvm/test/Transforms/DeadStoreElimination/MemDepAnalysis/2011-09-06-EndOfFunction.ll
+++ b/llvm/test/Transforms/DeadStoreElimination/MemDepAnalysis/2011-09-06-EndOfFunction.ll
@@ -6,10 +6,10 @@ target triple = "x86_64-apple-darwin"
 %"class.std::auto_ptr" = type { i32* }
 
 ; CHECK-LABEL: @_Z3foov(
-define void @_Z3foov(%"class.std::auto_ptr"* noalias nocapture sret %agg.result) uwtable ssp {
+define void @_Z3foov(%"class.std::auto_ptr"* noalias nocapture sret(%"class.std::auto_ptr") %agg.result) uwtable ssp {
 _ZNSt8auto_ptrIiED1Ev.exit:
   %temp.lvalue = alloca %"class.std::auto_ptr", align 8
-  call void @_Z3barv(%"class.std::auto_ptr"* sret %temp.lvalue)
+  call void @_Z3barv(%"class.std::auto_ptr"* sret(%"class.std::auto_ptr") %temp.lvalue)
   %_M_ptr.i.i = getelementptr inbounds %"class.std::auto_ptr", %"class.std::auto_ptr"* %temp.lvalue, i64 0, i32 0
   %tmp.i.i = load i32*, i32** %_M_ptr.i.i, align 8
 ; CHECK-NOT: store i32* null
@@ -20,4 +20,4 @@ _ZNSt8auto_ptrIiED1Ev.exit:
   ret void
 }
 
-declare void @_Z3barv(%"class.std::auto_ptr"* sret)
+declare void @_Z3barv(%"class.std::auto_ptr"* sret(%"class.std::auto_ptr"))
diff --git a/llvm/test/Transforms/DeadStoreElimination/MemDepAnalysis/combined-partial-overwrites.ll b/llvm/test/Transforms/DeadStoreElimination/MemDepAnalysis/combined-partial-overwrites.ll
index 0e98e966ce1d..a9c501bc86bd 100644
--- a/llvm/test/Transforms/DeadStoreElimination/MemDepAnalysis/combined-partial-overwrites.ll
+++ b/llvm/test/Transforms/DeadStoreElimination/MemDepAnalysis/combined-partial-overwrites.ll
@@ -4,7 +4,7 @@ target triple = "powerpc64le-unknown-linux"
 
 %"struct.std::complex" = type { { float, float } }
 
-define void @_Z4testSt7complexIfE(%"struct.std::complex"* noalias nocapture sret %agg.result, i64 %c.coerce) {
+define void @_Z4testSt7complexIfE(%"struct.std::complex"* noalias nocapture sret(%"struct.std::complex") %agg.result, i64 %c.coerce) {
 entry:
 ; CHECK-LABEL: @_Z4testSt7complexIfE
 
@@ -15,7 +15,7 @@ entry:
   %0 = bitcast i32 %c.sroa.0.0.extract.trunc to float
   %c.sroa.2.0.extract.trunc = trunc i64 %c.coerce to i32
   %1 = bitcast i32 %c.sroa.2.0.extract.trunc to float
-  call void @_Z3barSt7complexIfE(%"struct.std::complex"* nonnull sret %tmpcast, i64 %c.coerce)
+  call void @_Z3barSt7complexIfE(%"struct.std::complex"* nonnull sret(%"struct.std::complex") %tmpcast, i64 %c.coerce)
   %2 = bitcast %"struct.std::complex"* %agg.result to i64*
   %3 = load i64, i64* %ref.tmp, align 8
   store i64 %3, i64* %2, align 4
diff --git a/llvm/test/Transforms/EarlyCSE/getmatchingvalue-crash.ll b/llvm/test/Transforms/EarlyCSE/getmatchingvalue-crash.ll
index 5a8b244db83a..60791e78ba3a 100644
--- a/llvm/test/Transforms/EarlyCSE/getmatchingvalue-crash.ll
+++ b/llvm/test/Transforms/EarlyCSE/getmatchingvalue-crash.ll
@@ -54,7 +54,7 @@ b0:
   br label %b1
 
 b1:                                               ; preds = %b0
-  invoke void @f5(%s.10* nonnull sret align 8 undef, i8* nonnull undef)
+  invoke void @f5(%s.10* nonnull sret(%s.10) align 8 undef, i8* nonnull undef)
           to label %b6 unwind label %b3
 
 b2:                                               ; preds = %b2
@@ -84,7 +84,7 @@ b7:                                               ; preds = %b6
   br label %b20
 
 b8:                                               ; preds = %b6
-  invoke void @f2(%s.10* sret align 8 undef, %s.2* undef)
+  invoke void @f2(%s.10* sret(%s.10) align 8 undef, %s.2* undef)
           to label %b10 unwind label %b14
 
 b9:                                               ; No predecessors!
@@ -100,7 +100,7 @@ b11:                                              ; preds = %b10
   unreachable
 
 b12:                                              ; preds = %b10
-  invoke void @f3(%s.10* nonnull sret align 8 undef, i8* %a1, i32 %a2)
+  invoke void @f3(%s.10* nonnull sret(%s.10) align 8 undef, i8* %a1, i32 %a2)
           to label %b13 unwind label %b15
 
 b13:                                              ; preds = %b12
diff --git a/llvm/test/Transforms/GVN/2009-03-10-PREOnVoid.ll b/llvm/test/Transforms/GVN/2009-03-10-PREOnVoid.ll
index a0cf92989b81..0822ebb4a4e7 100644
--- a/llvm/test/Transforms/GVN/2009-03-10-PREOnVoid.ll
+++ b/llvm/test/Transforms/GVN/2009-03-10-PREOnVoid.ll
@@ -34,7 +34,7 @@ target triple = "i386-pc-linux-gnu"
 
 declare fastcc void @_ZNSt10_Select1stISt4pairIKPvS1_EEC1Ev() nounwind readnone
 
-define fastcc void @_ZNSt8_Rb_treeIPvSt4pairIKS0_S0_ESt10_Select1stIS3_ESt4lessIS0_ESaIS3_EE16_M_insert_uniqueERKS3_(%"struct.std::pair<std::_Rb_tree_iterator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,bool>"* noalias nocapture sret %agg.result, %"struct.std::_Rb_tree<void*,std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > >,std::_Select1st<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,std::less<void*>,std::allocator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > > >"* %this, %"struct.std::pair<void* const,void*>"* %__v) nounwind {
+define fastcc void @_ZNSt8_Rb_treeIPvSt4pairIKS0_S0_ESt10_Select1stIS3_ESt4lessIS0_ESaIS3_EE16_M_insert_uniqueERKS3_(%"struct.std::pair<std::_Rb_tree_iterator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,bool>"* noalias nocapture sret(%"struct.std::pair<std::_Rb_tree_iterator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,bool>") %agg.result, %"struct.std::_Rb_tree<void*,std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > >,std::_Select1st<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,std::less<void*>,std::allocator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > > >"* %this, %"struct.std::pair<void* const,void*>"* %__v) nounwind {
 entry:
 	br i1 false, label %bb7, label %bb
 
diff --git a/llvm/test/Transforms/GlobalOpt/2006-07-07-InlineAsmCrash.ll b/llvm/test/Transforms/GlobalOpt/2006-07-07-InlineAsmCrash.ll
index a8531964fb11..d70a7534b569 100644
--- a/llvm/test/Transforms/GlobalOpt/2006-07-07-InlineAsmCrash.ll
+++ b/llvm/test/Transforms/GlobalOpt/2006-07-07-InlineAsmCrash.ll
@@ -67,7 +67,7 @@ entry:
 	ret void
 }
 
-define void @_ZNSt3mapIPKc15FlagDescriptionIiE9StringCmpSaISt4pairIKS1_S3_EEE3endEv(%"struct.std::_Rb_tree_const_iterator<std::basic_string<char, std::char_traits<char>, std::allocator<char> > >"* sret  %agg.result) {
+define void @_ZNSt3mapIPKc15FlagDescriptionIiE9StringCmpSaISt4pairIKS1_S3_EEE3endEv(%"struct.std::_Rb_tree_const_iterator<std::basic_string<char, std::char_traits<char>, std::allocator<char> > >"* sret(%"struct.std::_Rb_tree_const_iterator<std::basic_string<char, std::char_traits<char>, std::allocator<char> > >")  %agg.result) {
 entry:
 	unreachable
 }
diff --git a/llvm/test/Transforms/IndVarSimplify/interesting-invoke-use.ll b/llvm/test/Transforms/IndVarSimplify/interesting-invoke-use.ll
index 131b02c3aaed..00cc4ae48a7b 100644
--- a/llvm/test/Transforms/IndVarSimplify/interesting-invoke-use.ll
+++ b/llvm/test/Transforms/IndVarSimplify/interesting-invoke-use.ll
@@ -32,11 +32,11 @@ invcont127:             ; preds = %bb123
   br i1 %2, label %bb178, label %bb128
 
 bb128:          ; preds = %invcont127
-  invoke void @system__img_int__image_integer(%struct.string___XUP* noalias sret null, i32 %i.0)
+  invoke void @system__img_int__image_integer(%struct.string___XUP* noalias sret(%struct.string___XUP) null, i32 %i.0)
       to label %invcont129 unwind label %lpad266
 
 invcont129:             ; preds = %bb128
-  invoke void @system__string_ops__str_concat(%struct.string___XUP* noalias sret null, [0 x i8]* bitcast ([24 x i8]* @.str7 to [0 x i8]*), %struct.string___XUB* @C.17.316, [0 x i8]* null, %struct.string___XUB* null)
+  invoke void @system__string_ops__str_concat(%struct.string___XUP* noalias sret(%struct.string___XUP) null, [0 x i8]* bitcast ([24 x i8]* @.str7 to [0 x i8]*), %struct.string___XUB* @C.17.316, [0 x i8]* null, %struct.string___XUB* null)
       to label %invcont138 unwind label %lpad266
 
 invcont138:             ; preds = %invcont129
diff --git a/llvm/test/Transforms/Inline/2009-05-07-CallUsingSelfCrash.ll b/llvm/test/Transforms/Inline/2009-05-07-CallUsingSelfCrash.ll
index c8629ea22eb1..0b6e1196141e 100644
--- a/llvm/test/Transforms/Inline/2009-05-07-CallUsingSelfCrash.ll
+++ b/llvm/test/Transforms/Inline/2009-05-07-CallUsingSelfCrash.ll
@@ -4,7 +4,7 @@
 	%struct.S1 = type <{ i8, i8, i8, i8, %struct.S0 }>
 	%struct.S2 = type <{ %struct.S1, i32 }>
 
-define void @func_113(%struct.S1* noalias nocapture sret %agg.result, i8 signext %p_114) noreturn nounwind {
+define void @func_113(%struct.S1* noalias nocapture sret(%struct.S1) %agg.result, i8 signext %p_114) noreturn nounwind {
 entry:
 	unreachable
 
diff --git a/llvm/test/Transforms/InstCombine/2007-05-18-CastFoldBug.ll b/llvm/test/Transforms/InstCombine/2007-05-18-CastFoldBug.ll
index eb0c364bfa25..4cc14a4fd6df 100644
--- a/llvm/test/Transforms/InstCombine/2007-05-18-CastFoldBug.ll
+++ b/llvm/test/Transforms/InstCombine/2007-05-18-CastFoldBug.ll
@@ -3,7 +3,7 @@
 
 define void @blah(i16* %tmp10) {
 entry:
-	call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend_stret to void (i16*)*)( i16*  sret %tmp10  )
+	call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend_stret to void (i16*)*)(i16* sret(i16) %tmp10)
 	ret void
 }
 
diff --git a/llvm/test/Transforms/InstCombine/align-addr.ll b/llvm/test/Transforms/InstCombine/align-addr.ll
index d6dc5e91da45..68cd13a2c537 100644
--- a/llvm/test/Transforms/InstCombine/align-addr.ll
+++ b/llvm/test/Transforms/InstCombine/align-addr.ll
@@ -110,7 +110,7 @@ declare void @use(i8*)
 
 %struct.s = type { i32, i32, i32, i32 }
 
-define void @test3(%struct.s* sret %a4) {
+define void @test3(%struct.s* sret(%struct.s) %a4) {
 ; Check that the alignment is bumped up the alignment of the sret type.
 ; CHECK-LABEL: @test3(
 ; CHECK-NEXT:    [[A4_CAST:%.*]] = bitcast %struct.s* [[A4:%.*]] to i8*
diff --git a/llvm/test/Transforms/InstCombine/call-cast-attrs.ll b/llvm/test/Transforms/InstCombine/call-cast-attrs.ll
index ddaf90c3e74f..87ac3dc76313 100644
--- a/llvm/test/Transforms/InstCombine/call-cast-attrs.ll
+++ b/llvm/test/Transforms/InstCombine/call-cast-attrs.ll
@@ -18,12 +18,12 @@ define void @d(i32 %x, ...) {
 define void @g(i32* %y) {
   call i32 bitcast (i32 (i32*)* @b to i32 (i32)*)(i32 zeroext 0)
   call void bitcast (void (...)* @c to void (i32*)*)(i32* %y)
-  call void bitcast (void (...)* @c to void (i32*)*)(i32* sret %y)
-  call void bitcast (void (i32, ...)* @d to void (i32, i32*)*)(i32 0, i32* sret %y)
+  call void bitcast (void (...)* @c to void (i32*)*)(i32* sret(i32) %y)
+  call void bitcast (void (i32, ...)* @d to void (i32, i32*)*)(i32 0, i32* sret(i32) %y)
   ret void
 }
 ; CHECK-LABEL: define void @g(i32* %y)
 ; CHECK: call i32 bitcast (i32 (i32*)* @b to i32 (i32)*)(i32 zeroext 0)
 ; CHECK: call void (...) @c(i32* %y)
-; CHECK: call void bitcast (void (...)* @c to void (i32*)*)(i32* sret %y)
-; CHECK: call void bitcast (void (i32, ...)* @d to void (i32, i32*)*)(i32 0, i32* sret %y)
+; CHECK: call void bitcast (void (...)* @c to void (i32*)*)(i32* sret(i32) %y)
+; CHECK: call void bitcast (void (i32, ...)* @d to void (i32, i32*)*)(i32 0, i32* sret(i32) %y)
diff --git a/llvm/test/Transforms/InstCombine/object-size-opaque.ll b/llvm/test/Transforms/InstCombine/object-size-opaque.ll
index 741586fead1f..123c6160a3ff 100644
--- a/llvm/test/Transforms/InstCombine/object-size-opaque.ll
+++ b/llvm/test/Transforms/InstCombine/object-size-opaque.ll
@@ -2,7 +2,7 @@
 %opaque = type opaque
 
 ; CHECK: call i64 @llvm.objectsize.i64
-define void @foo(%opaque* sret %in, i64* %sizeptr) {
+define void @foo(%opaque* sret(%opaque) %in, i64* %sizeptr) {
   %ptr = bitcast %opaque* %in to i8*
   %size = call i64 @llvm.objectsize.i64(i8* %ptr, i1 0, i1 0, i1 0)
   store i64 %size, i64* %sizeptr
diff --git a/llvm/test/Transforms/InstMerge/st_sink_debuginvariant.ll b/llvm/test/Transforms/InstMerge/st_sink_debuginvariant.ll
index 4a2d80407263..d85a3a34596e 100644
--- a/llvm/test/Transforms/InstMerge/st_sink_debuginvariant.ll
+++ b/llvm/test/Transforms/InstMerge/st_sink_debuginvariant.ll
@@ -19,7 +19,7 @@
 @g_173 = dso_local local_unnamed_addr global i16 0, !dbg !0
 
 ; Function Attrs: noinline norecurse nounwind
-define dso_local void @func_34(%struct.S0* noalias sret %agg.result) local_unnamed_addr #0 !dbg !11 {
+define dso_local void @func_34(%struct.S0* noalias sret(%struct.S0) %agg.result) local_unnamed_addr #0 !dbg !11 {
 entry:
   br i1 undef, label %if.end, label %if.then, !dbg !18
 
diff --git a/llvm/test/Transforms/JumpThreading/ddt-crash2.ll b/llvm/test/Transforms/JumpThreading/ddt-crash2.ll
index 92bea6a7dffd..f9b7b89f5054 100644
--- a/llvm/test/Transforms/JumpThreading/ddt-crash2.ll
+++ b/llvm/test/Transforms/JumpThreading/ddt-crash2.ll
@@ -2,7 +2,7 @@
 
 %struct.aaa = type { i8 }
 
-define void @chrome(%struct.aaa* noalias sret %arg) local_unnamed_addr #0 align 2 personality i8* bitcast (i32 (...)* @chrome2 to i8*) {
+define void @chrome(%struct.aaa* noalias sret(%struct.aaa) %arg) local_unnamed_addr #0 align 2 personality i8* bitcast (i32 (...)* @chrome2 to i8*) {
 bb:
   %tmp = load i32, i32* undef, align 4
   %tmp1 = icmp eq i32 %tmp, 0
diff --git a/llvm/test/Transforms/LoopUnswitch/2007-08-01-Dom.ll b/llvm/test/Transforms/LoopUnswitch/2007-08-01-Dom.ll
index a5bf368d9833..69bc3eddf412 100644
--- a/llvm/test/Transforms/LoopUnswitch/2007-08-01-Dom.ll
+++ b/llvm/test/Transforms/LoopUnswitch/2007-08-01-Dom.ll
@@ -3,7 +3,7 @@
 
       	%struct.QBasicAtomic = type { i32 }
 
-define void @_ZNK5QDate9addMonthsEi(%struct.QBasicAtomic* sret  %agg.result, %struct.QBasicAtomic* %this, i32 %nmonths) {
+define void @_ZNK5QDate9addMonthsEi(%struct.QBasicAtomic* sret(%struct.QBasicAtomic)  %agg.result, %struct.QBasicAtomic* %this, i32 %nmonths) {
 entry:
 	br label %cond_true90
 
diff --git a/llvm/test/Transforms/MemCpyOpt/2008-02-24-MultipleUseofSRet.ll b/llvm/test/Transforms/MemCpyOpt/2008-02-24-MultipleUseofSRet.ll
index 17867dc52db8..361341ffba9a 100644
--- a/llvm/test/Transforms/MemCpyOpt/2008-02-24-MultipleUseofSRet.ll
+++ b/llvm/test/Transforms/MemCpyOpt/2008-02-24-MultipleUseofSRet.ll
@@ -8,7 +8,7 @@ target triple = "i386-pc-linux-gnu"
 
 %0 = type { x86_fp80, x86_fp80 }
 
-define internal fastcc void @initialize(%0* noalias nocapture sret %agg.result) nounwind {
+define internal fastcc void @initialize(%0* noalias nocapture sret(%0) %agg.result) nounwind {
 ; CHECK-LABEL: @initialize(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[AGG_RESULT_03:%.*]] = getelementptr [[TMP0:%.*]], %0* [[AGG_RESULT:%.*]], i32 0, i32 0
@@ -33,7 +33,7 @@ define fastcc void @badly_optimized() nounwind {
 ; CHECK-NEXT:    [[Z:%.*]] = alloca [[TMP0:%.*]], align 8
 ; CHECK-NEXT:    [[TMP:%.*]] = alloca [[TMP0]], align 8
 ; CHECK-NEXT:    [[MEMTMP:%.*]] = alloca [[TMP0]], align 8
-; CHECK-NEXT:    call fastcc void @initialize(%0* noalias sret [[Z]])
+; CHECK-NEXT:    call fastcc void @initialize(%0* noalias sret(%0) [[Z]])
 ; CHECK-NEXT:    [[TMP1:%.*]] = bitcast %0* [[TMP]] to i8*
 ; CHECK-NEXT:    [[MEMTMP2:%.*]] = bitcast %0* [[MEMTMP]] to i8*
 ; CHECK-NEXT:    [[Z3:%.*]] = bitcast %0* [[Z]] to i8*
@@ -45,7 +45,7 @@ entry:
   %z = alloca %0
   %tmp = alloca %0
   %memtmp = alloca %0, align 8
-  call fastcc void @initialize(%0* noalias sret %memtmp)
+  call fastcc void @initialize(%0* noalias sret(%0) %memtmp)
   %tmp1 = bitcast %0* %tmp to i8*
   %memtmp2 = bitcast %0* %memtmp to i8*
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %tmp1, i8* align 8 %memtmp2, i32 24, i1 false)
diff --git a/llvm/test/Transforms/MemCpyOpt/2011-06-02-CallSlotOverwritten.ll b/llvm/test/Transforms/MemCpyOpt/2011-06-02-CallSlotOverwritten.ll
index f12d77709d0e..3835b749b834 100644
--- a/llvm/test/Transforms/MemCpyOpt/2011-06-02-CallSlotOverwritten.ll
+++ b/llvm/test/Transforms/MemCpyOpt/2011-06-02-CallSlotOverwritten.ll
@@ -11,13 +11,13 @@ target triple = "i386-apple-darwin10"
 %struct1 = type { i32, i32 }
 %struct2 = type { %struct1, i8* }
 
-declare void @bar(%struct1* nocapture sret %agg.result) nounwind
+declare void @bar(%struct1* nocapture sret(%struct1) %agg.result) nounwind
 
 define i32 @foo() nounwind {
 ; CHECK-LABEL: @foo(
 ; CHECK-NEXT:    [[X:%.*]] = alloca [[STRUCT1:%.*]], align 8
 ; CHECK-NEXT:    [[Y:%.*]] = alloca [[STRUCT2:%.*]], align 8
-; CHECK-NEXT:    call void @bar(%struct1* sret [[X]]) [[ATTR0:#.*]]
+; CHECK-NEXT:    call void @bar(%struct1* sret(%struct1) [[X]]) [[ATTR0:#.*]]
 ; CHECK-NEXT:    [[GEPN1:%.*]] = getelementptr inbounds [[STRUCT2]], %struct2* [[Y]], i32 0, i32 0, i32 0
 ; CHECK-NEXT:    store i32 0, i32* [[GEPN1]], align 8
 ; CHECK-NEXT:    [[GEPN2:%.*]] = getelementptr inbounds [[STRUCT2]], %struct2* [[Y]], i32 0, i32 0, i32 1
@@ -32,7 +32,7 @@ define i32 @foo() nounwind {
 ;
   %x = alloca %struct1, align 8
   %y = alloca %struct2, align 8
-  call void @bar(%struct1* sret %x) nounwind
+  call void @bar(%struct1* sret(%struct1) %x) nounwind
 
   %gepn1 = getelementptr inbounds %struct2, %struct2* %y, i32 0, i32 0, i32 0
   store i32 0, i32* %gepn1, align 8
diff --git a/llvm/test/Transforms/MemCpyOpt/loadstore-sret.ll b/llvm/test/Transforms/MemCpyOpt/loadstore-sret.ll
index a7ff65fa0523..155958aeb3ee 100644
--- a/llvm/test/Transforms/MemCpyOpt/loadstore-sret.ll
+++ b/llvm/test/Transforms/MemCpyOpt/loadstore-sret.ll
@@ -8,18 +8,18 @@ target triple = "x86_64-apple-darwin10.0.0"
 
 %"class.std::auto_ptr" = type { i32* }
 
-define void @_Z3foov(%"class.std::auto_ptr"* noalias nocapture sret %agg.result) ssp {
+define void @_Z3foov(%"class.std::auto_ptr"* noalias nocapture sret(%"class.std::auto_ptr") %agg.result) ssp {
 ; CHECK-LABEL: @_Z3foov(
 ; CHECK-NEXT:  _ZNSt8auto_ptrIiED1Ev.exit:
 ; CHECK-NEXT:    [[TEMP_LVALUE:%.*]] = alloca %"class.std::auto_ptr", align 8
-; CHECK-NEXT:    call void @_Z3barv(%"class.std::auto_ptr"* sret [[AGG_RESULT:%.*]])
+; CHECK-NEXT:    call void @_Z3barv(%"class.std::auto_ptr"* sret(%"class.std::auto_ptr") [[AGG_RESULT:%.*]])
 ; CHECK-NEXT:    [[TMP_I_I:%.*]] = getelementptr inbounds %"class.std::auto_ptr", %"class.std::auto_ptr"* [[TEMP_LVALUE]], i64 0, i32 0
 ; CHECK-NEXT:    [[TMP_I_I4:%.*]] = getelementptr inbounds %"class.std::auto_ptr", %"class.std::auto_ptr"* [[AGG_RESULT]], i64 0, i32 0
 ; CHECK-NEXT:    ret void
 ;
 _ZNSt8auto_ptrIiED1Ev.exit:
   %temp.lvalue = alloca %"class.std::auto_ptr", align 8
-  call void @_Z3barv(%"class.std::auto_ptr"* sret %temp.lvalue)
+  call void @_Z3barv(%"class.std::auto_ptr"* sret(%"class.std::auto_ptr") %temp.lvalue)
   %tmp.i.i = getelementptr inbounds %"class.std::auto_ptr", %"class.std::auto_ptr"* %temp.lvalue, i64 0, i32 0
   %tmp2.i.i = load i32*, i32** %tmp.i.i, align 8
   %tmp.i.i4 = getelementptr inbounds %"class.std::auto_ptr", %"class.std::auto_ptr"* %agg.result, i64 0, i32 0
@@ -27,4 +27,4 @@ _ZNSt8auto_ptrIiED1Ev.exit:
   ret void
 }
 
-declare void @_Z3barv(%"class.std::auto_ptr"* nocapture sret) nounwind
+declare void @_Z3barv(%"class.std::auto_ptr"* nocapture sret(%"class.std::auto_ptr")) nounwind
diff --git a/llvm/test/Transforms/MemCpyOpt/memcpy-to-memset-with-lifetimes.ll b/llvm/test/Transforms/MemCpyOpt/memcpy-to-memset-with-lifetimes.ll
index 9ce335d07842..1594138d8333 100644
--- a/llvm/test/Transforms/MemCpyOpt/memcpy-to-memset-with-lifetimes.ll
+++ b/llvm/test/Transforms/MemCpyOpt/memcpy-to-memset-with-lifetimes.ll
@@ -5,7 +5,7 @@
 target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
-define void @foo([8 x i64]* noalias nocapture sret dereferenceable(64) %sret) {
+define void @foo([8 x i64]* noalias nocapture sret([8 x i64]) dereferenceable(64) %sret) {
 ; CHECK-LABEL: @foo(
 ; CHECK-NEXT:  entry-block:
 ; CHECK-NEXT:    [[SRET1:%.*]] = bitcast [8 x i64]* [[SRET:%.*]] to i8*
@@ -24,7 +24,7 @@ entry-block:
 
 }
 
-define void @bar([8 x i64]* noalias nocapture sret dereferenceable(64) %sret, [8 x i64]* noalias nocapture dereferenceable(64) %out) {
+define void @bar([8 x i64]* noalias nocapture sret([8 x i64]) dereferenceable(64) %sret, [8 x i64]* noalias nocapture dereferenceable(64) %out) {
 ; CHECK-LABEL: @bar(
 ; CHECK-NEXT:  entry-block:
 ; CHECK-NEXT:    [[A:%.*]] = alloca [8 x i64], align 8
diff --git a/llvm/test/Transforms/MemCpyOpt/memcpy-undef.ll b/llvm/test/Transforms/MemCpyOpt/memcpy-undef.ll
index 64a7d8df9683..360ccde6c891 100644
--- a/llvm/test/Transforms/MemCpyOpt/memcpy-undef.ll
+++ b/llvm/test/Transforms/MemCpyOpt/memcpy-undef.ll
@@ -31,7 +31,7 @@ define i32 @test1(%struct.foo* nocapture %foobie) nounwind noinline ssp uwtable
 }
 
 ; Check that the memcpy is removed.
-define void @test2(i8* sret noalias nocapture %out, i8* %in) nounwind noinline ssp uwtable {
+define void @test2(i8* sret(i8) noalias nocapture %out, i8* %in) nounwind noinline ssp uwtable {
 ; CHECK-LABEL: @test2(
 ; CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 8, i8* [[IN:%.*]])
 ; CHECK-NEXT:    ret void
@@ -42,7 +42,7 @@ define void @test2(i8* sret noalias nocapture %out, i8* %in) nounwind noinline s
 }
 
 ; Check that the memcpy is not removed.
-define void @test3(i8* sret noalias nocapture %out, i8* %in) nounwind noinline ssp uwtable {
+define void @test3(i8* sret(i8) noalias nocapture %out, i8* %in) nounwind noinline ssp uwtable {
 ; CHECK-LABEL: @test3(
 ; CHECK-NEXT:    call void @llvm.lifetime.start.p0i8(i64 4, i8* [[IN:%.*]])
 ; CHECK-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[OUT:%.*]], i8* [[IN]], i64 8, i1 false)
diff --git a/llvm/test/Transforms/MemCpyOpt/memcpy.ll b/llvm/test/Transforms/MemCpyOpt/memcpy.ll
index 0c1b283a8629..48bf4d5af559 100644
--- a/llvm/test/Transforms/MemCpyOpt/memcpy.ll
+++ b/llvm/test/Transforms/MemCpyOpt/memcpy.ll
@@ -8,13 +8,13 @@ target triple = "i686-apple-darwin9"
 %0 = type { x86_fp80, x86_fp80 }
 %1 = type { i32, i32 }
 
-define void @test1(%0* sret  %agg.result, x86_fp80 %z.0, x86_fp80 %z.1) nounwind  {
+define void @test1(%0* sret(%0)  %agg.result, x86_fp80 %z.0, x86_fp80 %z.1) nounwind  {
 ; CHECK-LABEL: @test1(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP2:%.*]] = alloca [[TMP0:%.*]], align 16
 ; CHECK-NEXT:    [[MEMTMP:%.*]] = alloca [[TMP0]], align 16
 ; CHECK-NEXT:    [[TMP5:%.*]] = fsub x86_fp80 0xK80000000000000000000, [[Z_1:%.*]]
-; CHECK-NEXT:    call void @ccoshl(%0* sret [[TMP2]], x86_fp80 [[TMP5]], x86_fp80 [[Z_0:%.*]]) [[ATTR0:#.*]]
+; CHECK-NEXT:    call void @ccoshl(%0* sret(%0) [[TMP2]], x86_fp80 [[TMP5]], x86_fp80 [[Z_0:%.*]]) [[ATTR0:#.*]]
 ; CHECK-NEXT:    [[TMP219:%.*]] = bitcast %0* [[TMP2]] to i8*
 ; CHECK-NEXT:    [[MEMTMP20:%.*]] = bitcast %0* [[MEMTMP]] to i8*
 ; CHECK-NEXT:    [[AGG_RESULT21:%.*]] = bitcast %0* [[AGG_RESULT:%.*]] to i8*
@@ -25,7 +25,7 @@ entry:
   %tmp2 = alloca %0
   %memtmp = alloca %0, align 16
   %tmp5 = fsub x86_fp80 0xK80000000000000000000, %z.1
-  call void @ccoshl(%0* sret %memtmp, x86_fp80 %tmp5, x86_fp80 %z.0) nounwind
+  call void @ccoshl(%0* sret(%0) %memtmp, x86_fp80 %tmp5, x86_fp80 %z.0) nounwind
   %tmp219 = bitcast %0* %tmp2 to i8*
   %memtmp20 = bitcast %0* %memtmp to i8*
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 16 %tmp219, i8* align 16 %memtmp20, i32 32, i1 false)
@@ -76,7 +76,7 @@ define void @test2_memcpy(i8* noalias %P, i8* noalias %Q) nounwind  {
 
 @x = external global %0
 
-define void @test3(%0* noalias sret %agg.result) nounwind  {
+define void @test3(%0* noalias sret(%0) %agg.result) nounwind  {
 ; CHECK-LABEL: @test3(
 ; CHECK-NEXT:    [[X_0:%.*]] = alloca [[TMP0:%.*]], align 16
 ; CHECK-NEXT:    [[X_01:%.*]] = bitcast %0* [[X_0]] to i8*
@@ -276,7 +276,7 @@ define void @test9_addrspacecast() nounwind ssp uwtable {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[B:%.*]] = alloca [[STRUCT_BIG:%.*]], align 4
 ; CHECK-NEXT:    [[TMP:%.*]] = alloca [[STRUCT_BIG]], align 4
-; CHECK-NEXT:    call void @f1(%struct.big* sret [[B]])
+; CHECK-NEXT:    call void @f1(%struct.big* sret(%struct.big) [[B]])
 ; CHECK-NEXT:    [[TMP0:%.*]] = addrspacecast %struct.big* [[B]] to i8 addrspace(1)*
 ; CHECK-NEXT:    [[TMP1:%.*]] = addrspacecast %struct.big* [[TMP]] to i8 addrspace(1)*
 ; CHECK-NEXT:    call void @f2(%struct.big* [[B]])
@@ -285,7 +285,7 @@ define void @test9_addrspacecast() nounwind ssp uwtable {
 entry:
   %b = alloca %struct.big, align 4
   %tmp = alloca %struct.big, align 4
-  call void @f1(%struct.big* sret %tmp)
+  call void @f1(%struct.big* sret(%struct.big) %tmp)
   %0 = addrspacecast %struct.big* %b to i8 addrspace(1)*
   %1 = addrspacecast %struct.big* %tmp to i8 addrspace(1)*
   call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* align 4 %0, i8 addrspace(1)* align 4 %1, i64 200, i1 false)
@@ -298,7 +298,7 @@ define void @test9() nounwind ssp uwtable {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[B:%.*]] = alloca [[STRUCT_BIG:%.*]], align 4
 ; CHECK-NEXT:    [[TMP:%.*]] = alloca [[STRUCT_BIG]], align 4
-; CHECK-NEXT:    call void @f1(%struct.big* sret [[B]])
+; CHECK-NEXT:    call void @f1(%struct.big* sret(%struct.big) [[B]])
 ; CHECK-NEXT:    [[TMP0:%.*]] = bitcast %struct.big* [[B]] to i8*
 ; CHECK-NEXT:    [[TMP1:%.*]] = bitcast %struct.big* [[TMP]] to i8*
 ; CHECK-NEXT:    call void @f2(%struct.big* [[B]])
@@ -307,7 +307,7 @@ define void @test9() nounwind ssp uwtable {
 entry:
   %b = alloca %struct.big, align 4
   %tmp = alloca %struct.big, align 4
-  call void @f1(%struct.big* sret %tmp)
+  call void @f1(%struct.big* sret(%struct.big) %tmp)
   %0 = bitcast %struct.big* %b to i8*
   %1 = bitcast %struct.big* %tmp to i8*
   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 %1, i64 200, i1 false)
@@ -322,7 +322,7 @@ entry:
 %opaque = type opaque
 declare void @foo(i32* noalias nocapture)
 
-define void @test10(%opaque* noalias nocapture sret %x, i32 %y) {
+define void @test10(%opaque* noalias nocapture sret(%opaque) %x, i32 %y) {
 ; CHECK-LABEL: @test10(
 ; CHECK-NEXT:    [[A:%.*]] = alloca i32, align 4
 ; CHECK-NEXT:    store i32 [[Y:%.*]], i32* [[A]], align 4
@@ -359,7 +359,7 @@ define void @test11([20 x i32] addrspace(1)* nocapture dereferenceable(80) %P) {
 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind
 declare void @llvm.memcpy.p1i8.p0i8.i64(i8 addrspace(1)* nocapture, i8* nocapture, i64, i1) nounwind
 
-declare void @f1(%struct.big* nocapture sret)
+declare void @f1(%struct.big* nocapture sret(%struct.big))
 declare void @f2(%struct.big*)
 
 ; CHECK: attributes [[ATTR0]] = { nounwind }
diff --git a/llvm/test/Transforms/MemCpyOpt/sret.ll b/llvm/test/Transforms/MemCpyOpt/sret.ll
index 2d48855fb0aa..ada56ff5b29f 100644
--- a/llvm/test/Transforms/MemCpyOpt/sret.ll
+++ b/llvm/test/Transforms/MemCpyOpt/sret.ll
@@ -7,7 +7,7 @@ target triple = "i686-apple-darwin9"
 
 %0 = type { x86_fp80, x86_fp80 }
 
-define void @ccosl(%0* noalias sret %agg.result, %0* byval(%0) align 8 %z) nounwind {
+define void @ccosl(%0* noalias sret(%0) %agg.result, %0* byval(%0) align 8 %z) nounwind {
 ; CHECK-LABEL: @ccosl(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[IZ:%.*]] = alloca [[TMP0:%.*]], align 16
@@ -21,7 +21,7 @@ define void @ccosl(%0* noalias sret %agg.result, %0* byval(%0) align 8 %z) nounw
 ; CHECK-NEXT:    [[TMP8:%.*]] = load x86_fp80, x86_fp80* [[TMP7]], align 16
 ; CHECK-NEXT:    store x86_fp80 [[TMP3]], x86_fp80* [[REAL]], align 16
 ; CHECK-NEXT:    store x86_fp80 [[TMP8]], x86_fp80* [[TMP4]], align 16
-; CHECK-NEXT:    call void @ccoshl(%0* noalias sret [[AGG_RESULT:%.*]], %0* byval(%0) align 8 [[IZ]]) [[ATTR0:#.*]]
+; CHECK-NEXT:    call void @ccoshl(%0* noalias sret(%0) [[AGG_RESULT:%.*]], %0* byval(%0) align 8 [[IZ]]) [[ATTR0:#.*]]
 ; CHECK-NEXT:    [[MEMTMP14:%.*]] = bitcast %0* [[MEMTMP]] to i8*
 ; CHECK-NEXT:    [[AGG_RESULT15:%.*]] = bitcast %0* [[AGG_RESULT]] to i8*
 ; CHECK-NEXT:    ret void
@@ -38,7 +38,7 @@ entry:
   %tmp8 = load x86_fp80, x86_fp80* %tmp7, align 16
   store x86_fp80 %tmp3, x86_fp80* %real, align 16
   store x86_fp80 %tmp8, x86_fp80* %tmp4, align 16
-  call void @ccoshl(%0* noalias sret %memtmp, %0* byval(%0) align 8 %iz) nounwind
+  call void @ccoshl(%0* noalias sret(%0) %memtmp, %0* byval(%0) align 8 %iz) nounwind
   %memtmp14 = bitcast %0* %memtmp to i8*
   %agg.result15 = bitcast %0* %agg.result to i8*
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 16 %agg.result15, i8* align 16 %memtmp14, i32 32, i1 false)
diff --git a/llvm/test/Transforms/MergeFunc/apply_function_attributes.ll b/llvm/test/Transforms/MergeFunc/apply_function_attributes.ll
index e9ede4518206..2ed0e1da79c9 100644
--- a/llvm/test/Transforms/MergeFunc/apply_function_attributes.ll
+++ b/llvm/test/Transforms/MergeFunc/apply_function_attributes.ll
@@ -6,7 +6,7 @@
 %Di = type <{ i32 }>
 %Si = type <{ i32 }>
 
-define void @B(%Opaque_type* sret %a, %S2i* %b, i32* %xp, i32* %yp) {
+define void @B(%Opaque_type* sret(%Opaque_type) %a, %S2i* %b, i32* %xp, i32* %yp) {
   %x = load i32, i32* %xp
   %y = load i32, i32* %yp
   %sum = add i32 %x, %y
@@ -15,7 +15,7 @@ define void @B(%Opaque_type* sret %a, %S2i* %b, i32* %xp, i32* %yp) {
   ret void
 }
 
-define void @C(%Opaque_type* sret %a, %S2i* %b, i32* %xp, i32* %yp) {
+define void @C(%Opaque_type* sret(%Opaque_type) %a, %S2i* %b, i32* %xp, i32* %yp) {
   %x = load i32, i32* %xp
   %y = load i32, i32* %yp
   %sum = add i32 %x, %y
@@ -24,7 +24,7 @@ define void @C(%Opaque_type* sret %a, %S2i* %b, i32* %xp, i32* %yp) {
   ret void
 }
 
-define void @A(%Opaque_type* sret %a, %D2i* %b, i32* %xp, i32* %yp) {
+define void @A(%Opaque_type* sret(%Opaque_type) %a, %D2i* %b, i32* %xp, i32* %yp) {
   %x = load i32, i32* %xp
   %y = load i32, i32* %yp
   %sum = add i32 %x, %y
@@ -35,13 +35,13 @@ define void @A(%Opaque_type* sret %a, %D2i* %b, i32* %xp, i32* %yp) {
 
 ; Make sure we transfer the parameter attributes to the call site.
 ; CHECK-LABEL: define void @C(%Opaque_type* sret
-; CHECK:  tail call void bitcast (void (%Opaque_type*, %D2i*, i32*, i32*)* @A to void (%Opaque_type*, %S2i*, i32*, i32*)*)(%Opaque_type* sret %0, %S2i* %1, i32* %2, i32* %3)
+; CHECK:  tail call void bitcast (void (%Opaque_type*, %D2i*, i32*, i32*)* @A to void (%Opaque_type*, %S2i*, i32*, i32*)*)(%Opaque_type* sret(%Opaque_type) %0, %S2i* %1, i32* %2, i32* %3)
 ; CHECK:  ret void
 
 
 ; Make sure we transfer the parameter attributes to the call site.
 ; CHECK-LABEL: define void @B(%Opaque_type* sret
 ; CHECK:  %5 = bitcast
-; CHECK:  tail call void @A(%Opaque_type* sret %0, %D2i* %5, i32* %2, i32* %3)
+; CHECK:  tail call void @A(%Opaque_type* sret(%Opaque_type) %0, %D2i* %5, i32* %2, i32* %3)
 ; CHECK:  ret void
 
diff --git a/llvm/test/Transforms/MetaRenamer/metarenamer.ll b/llvm/test/Transforms/MetaRenamer/metarenamer.ll
index 19e49b1892e8..041dac86f886 100644
--- a/llvm/test/Transforms/MetaRenamer/metarenamer.ll
+++ b/llvm/test/Transforms/MetaRenamer/metarenamer.ll
@@ -23,7 +23,7 @@ define i32 @func_3_xxx() nounwind uwtable ssp {
   ret i32 3
 }
 
-define void @func_4_xxx(%struct.foo_xxx* sret %agg.result) nounwind uwtable ssp {
+define void @func_4_xxx(%struct.foo_xxx* sret(%struct.foo_xxx) %agg.result) nounwind uwtable ssp {
   %1 = alloca %struct.foo_xxx, align 8
   %2 = getelementptr inbounds %struct.foo_xxx, %struct.foo_xxx* %1, i32 0, i32 0
   store i32 1, i32* %2, align 4
diff --git a/llvm/test/Transforms/NewGVN/2009-03-10-PREOnVoid.ll b/llvm/test/Transforms/NewGVN/2009-03-10-PREOnVoid.ll
index 701556e57eb2..8b7f7b8c4eec 100644
--- a/llvm/test/Transforms/NewGVN/2009-03-10-PREOnVoid.ll
+++ b/llvm/test/Transforms/NewGVN/2009-03-10-PREOnVoid.ll
@@ -34,7 +34,7 @@ target triple = "i386-pc-linux-gnu"
 
 declare fastcc void @_ZNSt10_Select1stISt4pairIKPvS1_EEC1Ev() nounwind readnone
 
-define fastcc void @_ZNSt8_Rb_treeIPvSt4pairIKS0_S0_ESt10_Select1stIS3_ESt4lessIS0_ESaIS3_EE16_M_insert_uniqueERKS3_(%"struct.std::pair<std::_Rb_tree_iterator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,bool>"* noalias nocapture sret %agg.result, %"struct.std::_Rb_tree<void*,std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > >,std::_Select1st<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,std::less<void*>,std::allocator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > > >"* %this, %"struct.std::pair<void* const,void*>"* %__v) nounwind {
+define fastcc void @_ZNSt8_Rb_treeIPvSt4pairIKS0_S0_ESt10_Select1stIS3_ESt4lessIS0_ESaIS3_EE16_M_insert_uniqueERKS3_(%"struct.std::pair<std::_Rb_tree_iterator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,bool>"* noalias nocapture sret(%"struct.std::pair<std::_Rb_tree_iterator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,bool>") %agg.result, %"struct.std::_Rb_tree<void*,std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > >,std::_Select1st<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,std::less<void*>,std::allocator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > > >"* %this, %"struct.std::pair<void* const,void*>"* %__v) nounwind {
 entry:
 	br i1 false, label %bb7, label %bb
 
diff --git a/llvm/test/Transforms/ObjCARC/path-overflow.ll b/llvm/test/Transforms/ObjCARC/path-overflow.ll
index 227d6e5b047a..e84cfc315406 100644
--- a/llvm/test/Transforms/ObjCARC/path-overflow.ll
+++ b/llvm/test/Transforms/ObjCARC/path-overflow.ll
@@ -1567,7 +1567,7 @@ invoke.cont512:                                   ; preds = %invoke.cont509
   br i1 undef, label %msgSend.null-receiver, label %msgSend.call
 
 msgSend.call:                                     ; preds = %invoke.cont512
-  invoke void bitcast (void (i8*, i8*, ...)* @llvm.objc.msgSend_stret to void (%struct.CGPoint*, i8*, i8*)*)(%struct.CGPoint* sret undef, i8* undef, i8* undef)
+  invoke void bitcast (void (i8*, i8*, ...)* @llvm.objc.msgSend_stret to void (%struct.CGPoint*, i8*, i8*)*)(%struct.CGPoint* sret(%struct.CGPoint) undef, i8* undef, i8* undef)
           to label %msgSend.cont unwind label %lpad514
 
 msgSend.null-receiver:                            ; preds = %invoke.cont512
diff --git a/llvm/test/Transforms/PGOProfile/icp_vararg_sret.ll b/llvm/test/Transforms/PGOProfile/icp_vararg_sret.ll
index 5f1232a09e58..3dc43b9f2912 100644
--- a/llvm/test/Transforms/PGOProfile/icp_vararg_sret.ll
+++ b/llvm/test/Transforms/PGOProfile/icp_vararg_sret.ll
@@ -22,7 +22,7 @@ define void @test() {
 
   %s = alloca %struct
   %tmp = load void (i32, %struct*)*, void (i32, %struct*)** @func_ptr, align 8
-  call void %tmp(i32 1, %struct* sret %s), !prof !1
+  call void %tmp(i32 1, %struct* sret(%struct) %s), !prof !1
   ret void
 }
 
diff --git a/llvm/test/Transforms/PhaseOrdering/inlining-alignment-assumptions.ll b/llvm/test/Transforms/PhaseOrdering/inlining-alignment-assumptions.ll
index 59243a9ff8c9..4fe75883959e 100644
--- a/llvm/test/Transforms/PhaseOrdering/inlining-alignment-assumptions.ll
+++ b/llvm/test/Transforms/PhaseOrdering/inlining-alignment-assumptions.ll
@@ -88,7 +88,7 @@ false2:
 ; This test checks that alignment assumptions do not prevent SROA.
 ; See PR45763.
 
-define internal void @callee2(i64* noalias sret align 32 %arg) {
+define internal void @callee2(i64* noalias sret(i64) align 32 %arg) {
   store i64 0, i64* %arg, align 8
   ret void
 }
@@ -99,6 +99,6 @@ define amdgpu_kernel void @caller2() {
 ;
   %alloca = alloca i64, align 8, addrspace(5)
   %cast = addrspacecast i64 addrspace(5)* %alloca to i64*
-  call void @callee2(i64* sret align 32 %cast)
+  call void @callee2(i64* sret(i64) align 32 %cast)
   ret void
 }
diff --git a/llvm/test/Transforms/PhaseOrdering/instcombine-sroa-inttoptr.ll b/llvm/test/Transforms/PhaseOrdering/instcombine-sroa-inttoptr.ll
index d8cf0cb6ff6a..f54bc424856c 100644
--- a/llvm/test/Transforms/PhaseOrdering/instcombine-sroa-inttoptr.ll
+++ b/llvm/test/Transforms/PhaseOrdering/instcombine-sroa-inttoptr.ll
@@ -47,7 +47,7 @@ target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16
 
 %0 = type { i32*, i32, i32, i32 }
 
-define dso_local void @_Z3gen1S(%0* noalias sret align 8 %arg, %0* byval(%0) align 8 %arg1) {
+define dso_local void @_Z3gen1S(%0* noalias sret(%0) align 8 %arg, %0* byval(%0) align 8 %arg1) {
 ; CHECK-LABEL: @_Z3gen1S(
 ; CHECK-NEXT:  bb:
 ; CHECK-NEXT:    [[I:%.*]] = getelementptr inbounds [[TMP0:%.*]], %0* [[ARG1:%.*]], i64 0, i32 0
@@ -84,7 +84,7 @@ bb:
   %i4 = bitcast %0* %i1 to i8*
   %i5 = bitcast %0* %arg to i8*
   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %i4, i8* align 8 %i5, i64 24, i1 false)
-  call void @_Z3gen1S(%0* sret align 8 %i, %0* byval(%0) align 8 %i1)
+  call void @_Z3gen1S(%0* sret(%0) align 8 %i, %0* byval(%0) align 8 %i1)
   %i6 = bitcast %0* %i2 to i8*
   %i7 = bitcast %0* %i to i8*
   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %i6, i8* align 8 %i7, i64 24, i1 false)
@@ -131,7 +131,7 @@ bb:
   %i3 = bitcast %0* %i1 to i8*
   %i4 = bitcast %0* %arg to i8*
   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %i3, i8* align 8 %i4, i64 24, i1 false)
-  call void @_Z3gen1S(%0* sret align 8 %i, %0* byval(%0) align 8 %i1)
+  call void @_Z3gen1S(%0* sret(%0) align 8 %i, %0* byval(%0) align 8 %i1)
   %i5 = call i32 @_Z4condv()
   %i6 = icmp ne i32 %i5, 0
   br i1 %i6, label %bb7, label %bb10
diff --git a/llvm/test/Transforms/SLPVectorizer/ARM/sroa.ll b/llvm/test/Transforms/SLPVectorizer/ARM/sroa.ll
index cd17cd83bfa4..6019c3c1e46e 100644
--- a/llvm/test/Transforms/SLPVectorizer/ARM/sroa.ll
+++ b/llvm/test/Transforms/SLPVectorizer/ARM/sroa.ll
@@ -9,7 +9,7 @@ target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-
 ; because the scalar version of the shl/or are handled by the
 ; backend and disappear, the vectorized code stays.
 
-define void @SROAed(%class.Complex* noalias nocapture sret %agg.result, [4 x i32] %a.coerce, [4 x i32] %b.coerce) {
+define void @SROAed(%class.Complex* noalias nocapture sret(%class.Complex) %agg.result, [4 x i32] %a.coerce, [4 x i32] %b.coerce) {
 ; CHECK-LABEL: @SROAed(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[A_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x i32] [[A_COERCE:%.*]], 0
diff --git a/llvm/test/Transforms/SROA/dead-inst.ll b/llvm/test/Transforms/SROA/dead-inst.ll
index 043d8509f3f4..5fc8096bdb14 100644
--- a/llvm/test/Transforms/SROA/dead-inst.ll
+++ b/llvm/test/Transforms/SROA/dead-inst.ll
@@ -15,7 +15,7 @@ target triple = "powerpc64le-grtev4-linux-gnu"
 
 %class.b = type { i64 }
 
-declare void @D(%class.b* sret, %class.b* dereferenceable(32)) local_unnamed_addr
+declare void @D(%class.b* sret(%class.b), %class.b* dereferenceable(32)) local_unnamed_addr
 
 ; Function Attrs: nounwind
 define hidden fastcc void @H(%class.b* noalias nocapture readnone, [2 x i64]) unnamed_addr {
@@ -75,7 +75,7 @@ a.exit:
   unreachable
 
 ; <label>:31:
-  call void @D(%class.b* nonnull sret %3, %class.b* nonnull dereferenceable(32) undef)
+  call void @D(%class.b* nonnull sret(%class.b) %3, %class.b* nonnull dereferenceable(32) undef)
   br label %G.exit
 
 G.exit:
diff --git a/llvm/test/Transforms/SimpleLoopUnswitch/2007-08-01-Dom.ll b/llvm/test/Transforms/SimpleLoopUnswitch/2007-08-01-Dom.ll
index 52794891c568..794d19e9c894 100644
--- a/llvm/test/Transforms/SimpleLoopUnswitch/2007-08-01-Dom.ll
+++ b/llvm/test/Transforms/SimpleLoopUnswitch/2007-08-01-Dom.ll
@@ -3,7 +3,7 @@
 
       	%struct.QBasicAtomic = type { i32 }
 
-define void @_ZNK5QDate9addMonthsEi(%struct.QBasicAtomic* sret  %agg.result, %struct.QBasicAtomic* %this, i32 %nmonths) {
+define void @_ZNK5QDate9addMonthsEi(%struct.QBasicAtomic* sret(%struct.QBasicAtomic)  %agg.result, %struct.QBasicAtomic* %this, i32 %nmonths) {
 entry:
 	br label %cond_true90
 
diff --git a/llvm/test/Transforms/TailCallElim/basic.ll b/llvm/test/Transforms/TailCallElim/basic.ll
index 98274c83beab..284bd8916bc2 100644
--- a/llvm/test/Transforms/TailCallElim/basic.ll
+++ b/llvm/test/Transforms/TailCallElim/basic.ll
@@ -163,7 +163,7 @@ define void @test9(i32* byval(i32) %a) {
 %struct.X = type { i8* }
 
 declare void @ctor(%struct.X*)
-define void @test10(%struct.X* noalias sret %agg.result, i1 zeroext %b) {
+define void @test10(%struct.X* noalias sret(%struct.X) %agg.result, i1 zeroext %b) {
 ; CHECK-LABEL: @test10
 entry:
   %x = alloca %struct.X, align 8
diff --git a/llvm/test/Verifier/2008-01-11-VarargAttrs.ll b/llvm/test/Verifier/2008-01-11-VarargAttrs.ll
index d3eb7c72699a..71dcbc67899e 100644
--- a/llvm/test/Verifier/2008-01-11-VarargAttrs.ll
+++ b/llvm/test/Verifier/2008-01-11-VarargAttrs.ll
@@ -1,10 +1,10 @@
 ; RUN: not llvm-as < %s > /dev/null 2>&1
 
-	%struct = type {  }
+%struct = type {  }
 
 declare void @foo(...)
 
 define void @bar() {
-	call void (...) @foo(%struct* sret null )
+	call void (...) @foo(%struct* sret(%struct) null )
 	ret void
 }
diff --git a/llvm/test/Verifier/amdgpu-cc.ll b/llvm/test/Verifier/amdgpu-cc.ll
index df2a8199e0b5..b9b4c5027a19 100644
--- a/llvm/test/Verifier/amdgpu-cc.ll
+++ b/llvm/test/Verifier/amdgpu-cc.ll
@@ -16,13 +16,13 @@ define amdgpu_kernel void @varargs_amdgpu_kernel(...) {
 
 ; CHECK: Calling convention does not allow sret
 ; CHECK-NEXT: void (i32*)* @sret_cc_amdgpu_kernel_as0
-define amdgpu_kernel void @sret_cc_amdgpu_kernel_as0(i32* sret %ptr) {
+define amdgpu_kernel void @sret_cc_amdgpu_kernel_as0(i32* sret(i32) %ptr) {
   ret void
 }
 
 ; CHECK: Calling convention does not allow sret
 ; CHECK-NEXT: void (i32 addrspace(5)*)* @sret_cc_amdgpu_kernel
-define amdgpu_kernel void @sret_cc_amdgpu_kernel(i32 addrspace(5)* sret %ptr) {
+define amdgpu_kernel void @sret_cc_amdgpu_kernel(i32 addrspace(5)* sret(i32) %ptr) {
   ret void
 }
 
diff --git a/llvm/test/Verifier/byref.ll b/llvm/test/Verifier/byref.ll
index 41bfb25a36c5..2f22ee37292e 100644
--- a/llvm/test/Verifier/byref.ll
+++ b/llvm/test/Verifier/byref.ll
@@ -40,7 +40,7 @@ define void @byref_preallocated(i32* byref(i32) preallocated(i32)) {
 
 ; CHECK: Attributes 'byval', 'inalloca', 'preallocated', 'inreg', 'nest', 'byref', and 'sret' are incompatible!
 ; CHECK-NEXT: void (i32*)* @byref_sret
-define void @byref_sret(i32* byref(i32) sret) {
+define void @byref_sret(i32* byref(i32) sret(i32)) {
   ret void
 }
 
diff --git a/llvm/test/Verifier/inalloca1.ll b/llvm/test/Verifier/inalloca1.ll
index 350c182d8c2b..7ee2cba5ac17 100644
--- a/llvm/test/Verifier/inalloca1.ll
+++ b/llvm/test/Verifier/inalloca1.ll
@@ -6,7 +6,7 @@ declare void @a(i64* byval(i64) inalloca %p)
 declare void @b(i64* inreg inalloca %p)
 ; CHECK: Attributes {{.*}} are incompatible
 
-declare void @c(i64* sret inalloca %p)
+declare void @c(i64* sret(i64) inalloca %p)
 ; CHECK: Attributes {{.*}} are incompatible
 
 declare void @d(i64* nest inalloca %p)
diff --git a/llvm/test/Verifier/musttail-invalid.ll b/llvm/test/Verifier/musttail-invalid.ll
index 5ec4ce5ecd22..32d86ba74605 100644
--- a/llvm/test/Verifier/musttail-invalid.ll
+++ b/llvm/test/Verifier/musttail-invalid.ll
@@ -53,10 +53,10 @@ define void @mismatched_inreg(i32 %a) {
   ret void
 }
 
-declare void @mismatched_sret_callee(i32* sret)
+declare void @mismatched_sret_callee(i32* sret(i32))
 define void @mismatched_sret(i32* %a) {
 ; CHECK: mismatched ABI impacting function attributes
-  musttail call void @mismatched_sret_callee(i32* sret %a)
+  musttail call void @mismatched_sret_callee(i32* sret(i32) %a)
   ret void
 }
 
diff --git a/llvm/test/Verifier/sret.ll b/llvm/test/Verifier/sret.ll
index 1ddbf1f1a3bc..38187ef4c96d 100644
--- a/llvm/test/Verifier/sret.ll
+++ b/llvm/test/Verifier/sret.ll
@@ -1,7 +1,7 @@
 ; RUN: not llvm-as %s -o /dev/null 2>&1 | FileCheck %s
 
-declare void @a(i32* sret %a, i32* sret %b)
+declare void @a(i32* sret(i32) %a, i32* sret(i32) %b)
 ; CHECK: Cannot have multiple 'sret' parameters!
 
-declare void @b(i32* %a, i32* %b, i32* sret %c)
+declare void @b(i32* %a, i32* %b, i32* sret(i32) %c)
 ; CHECK: Attribute 'sret' is not on first or second parameter!
diff --git a/llvm/test/Verifier/statepoint.ll b/llvm/test/Verifier/statepoint.ll
index 96ab02ff4581..dae31035bba9 100644
--- a/llvm/test/Verifier/statepoint.ll
+++ b/llvm/test/Verifier/statepoint.ll
@@ -47,7 +47,7 @@ equal:
 ; CHECK-LABEL: test2
 ; CHECK-LABEL: equal
 ; CHECK: statepoint
-; CHECK-NEXT: %reloc = call 
+; CHECK-NEXT: %reloc = call
 ; CHECK-NEXT: call
 ; CHECK-NEXT: ret voi
 }
@@ -85,11 +85,11 @@ exceptional_return:
 ; This should be allowed as long as the wrapped function is not vararg.
 %struct = type { i64, i64, i64 }
 
-declare void @fn_sret(%struct* sret)
+declare void @fn_sret(%struct* sret(%struct))
 
 define void @test_sret() gc "statepoint-example" {
   %x = alloca %struct
-  %statepoint_token = call token (i64, i32, void (%struct*)*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidp0s_structsf(i64 0, i32 0, void (%struct*)* @fn_sret, i32 1, i32 0, %struct* sret %x, i32 0, i32 0)
+  %statepoint_token = call token (i64, i32, void (%struct*)*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidp0s_structsf(i64 0, i32 0, void (%struct*)* @fn_sret, i32 1, i32 0, %struct* sret(%struct) %x, i32 0, i32 0)
   ret void
   ; CHECK-LABEL: test_sret
   ; CHECK: alloca
-- 
2.34.1