From 2016585c3a9486ea438145f47a28ee7fa8f7060c Mon Sep 17 00:00:00 2001 From: Sergiu Moga Date: Fri, 1 Apr 2022 12:27:23 +0300 Subject: [PATCH] ARM: dts: at91: Add RSTC node Add node for RSTC. Signed-off-by: Sergiu Moga --- arch/arm/dts/sam9x60.dtsi | 6 ++++++ arch/arm/dts/sama7g5.dtsi | 7 +++++++ 2 files changed, 13 insertions(+) diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi index be44519..733cc5c 100644 --- a/arch/arm/dts/sam9x60.dtsi +++ b/arch/arm/dts/sam9x60.dtsi @@ -223,6 +223,12 @@ status = "okay"; }; + reset_controller: rstc@fffffe00 { + compatible = "microchip,sam9x60-rstc"; + reg = <0xfffffe00 0x10>; + clocks = <&clk32 0>; + }; + pit: timer@fffffe40 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe40 0x10>; diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index b7c261e..7015bd7 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -232,6 +232,13 @@ clocks = <&clk32k 0>; }; + reset_controller: rstc@e001d000 { + compatible = "microchip,sama7g5-rstc", "microchip,sam9x60-rstc"; + reg = <0xe001d000 0xc>, <0xe001d0e4 0x4>; + #reset-cells = <1>; + clocks = <&clk32k 0>; + }; + clk32k: clock-controller@e001d050 { compatible = "microchip,sama7g5-sckc", "microchip,sam9x60-sckc"; reg = <0xe001d050 0x4>; -- 2.7.4