From 200bb36778f841d9d80db0ddd8ce18e5fed3c5a8 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Wed, 12 Dec 2012 02:37:58 -0800 Subject: [PATCH] i965: Fix disassembly of jump targets on Gen7. Gen7 stores the JIP/UIP bits in different places. Reviewed-by: Eric Anholt --- src/mesa/drivers/dri/i965/brw_disasm.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c index ef88edd..6dd1736 100644 --- a/src/mesa/drivers/dri/i965/brw_disasm.c +++ b/src/mesa/drivers/dri/i965/brw_disasm.c @@ -1112,14 +1112,19 @@ int brw_disasm (FILE *file, struct brw_instruction *inst, int gen) if (opcode[inst->header.opcode].ndst > 0) { pad (file, 16); err |= dest (file, inst); - } else if (gen >= 6 && (inst->header.opcode == BRW_OPCODE_IF || + } else if (gen == 7 && (inst->header.opcode == BRW_OPCODE_ELSE || + inst->header.opcode == BRW_OPCODE_ENDIF || + inst->header.opcode == BRW_OPCODE_WHILE)) { + format (file, " %d", inst->bits3.break_cont.jip); + } else if (gen == 6 && (inst->header.opcode == BRW_OPCODE_IF || inst->header.opcode == BRW_OPCODE_ELSE || inst->header.opcode == BRW_OPCODE_ENDIF || inst->header.opcode == BRW_OPCODE_WHILE)) { format (file, " %d", inst->bits1.branch_gen6.jump_count); - } else if (gen >= 6 && (inst->header.opcode == BRW_OPCODE_BREAK || - inst->header.opcode == BRW_OPCODE_CONTINUE || - inst->header.opcode == BRW_OPCODE_HALT)) { + } else if ((gen >= 6 && (inst->header.opcode == BRW_OPCODE_BREAK || + inst->header.opcode == BRW_OPCODE_CONTINUE || + inst->header.opcode == BRW_OPCODE_HALT)) || + (gen == 7 && inst->header.opcode == BRW_OPCODE_IF)) { format (file, " %d %d", inst->bits3.break_cont.uip, inst->bits3.break_cont.jip); } else if (inst->header.opcode == BRW_OPCODE_JMPI) { format (file, " %d", inst->bits3.d); -- 2.7.4