From 1ff2d58e60c8093e9be935b1f191341c0cda957a Mon Sep 17 00:00:00 2001 From: Michael Tretter Date: Wed, 12 Jan 2022 16:15:40 +0100 Subject: [PATCH] arm64: zynqmp: Add missing #dma-cells property Requesting the dma controllers fails if #dma-cells is not defined. Add the missing property. Signed-off-by: Michael Tretter Link: https://lore.kernel.org/r/20220112151541.1328732-3-m.tretter@pengutronix.de Signed-off-by: Michal Simek --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 493719f..6d96b6b 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -261,6 +261,7 @@ interrupt-parent = <&gic>; interrupts = <0 124 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <128>; iommus = <&smmu 0x14e8>; power-domains = <&zynqmp_firmware PD_GDMA>; @@ -273,6 +274,7 @@ interrupt-parent = <&gic>; interrupts = <0 125 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <128>; iommus = <&smmu 0x14e9>; power-domains = <&zynqmp_firmware PD_GDMA>; @@ -285,6 +287,7 @@ interrupt-parent = <&gic>; interrupts = <0 126 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <128>; iommus = <&smmu 0x14ea>; power-domains = <&zynqmp_firmware PD_GDMA>; @@ -297,6 +300,7 @@ interrupt-parent = <&gic>; interrupts = <0 127 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <128>; iommus = <&smmu 0x14eb>; power-domains = <&zynqmp_firmware PD_GDMA>; @@ -309,6 +313,7 @@ interrupt-parent = <&gic>; interrupts = <0 128 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <128>; iommus = <&smmu 0x14ec>; power-domains = <&zynqmp_firmware PD_GDMA>; @@ -321,6 +326,7 @@ interrupt-parent = <&gic>; interrupts = <0 129 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <128>; iommus = <&smmu 0x14ed>; power-domains = <&zynqmp_firmware PD_GDMA>; @@ -333,6 +339,7 @@ interrupt-parent = <&gic>; interrupts = <0 130 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <128>; iommus = <&smmu 0x14ee>; power-domains = <&zynqmp_firmware PD_GDMA>; @@ -345,6 +352,7 @@ interrupt-parent = <&gic>; interrupts = <0 131 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <128>; iommus = <&smmu 0x14ef>; power-domains = <&zynqmp_firmware PD_GDMA>; @@ -374,6 +382,7 @@ interrupt-parent = <&gic>; interrupts = <0 77 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <64>; iommus = <&smmu 0x868>; power-domains = <&zynqmp_firmware PD_ADMA>; @@ -386,6 +395,7 @@ interrupt-parent = <&gic>; interrupts = <0 78 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <64>; iommus = <&smmu 0x869>; power-domains = <&zynqmp_firmware PD_ADMA>; @@ -398,6 +408,7 @@ interrupt-parent = <&gic>; interrupts = <0 79 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <64>; iommus = <&smmu 0x86a>; power-domains = <&zynqmp_firmware PD_ADMA>; @@ -410,6 +421,7 @@ interrupt-parent = <&gic>; interrupts = <0 80 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <64>; iommus = <&smmu 0x86b>; power-domains = <&zynqmp_firmware PD_ADMA>; @@ -422,6 +434,7 @@ interrupt-parent = <&gic>; interrupts = <0 81 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <64>; iommus = <&smmu 0x86c>; power-domains = <&zynqmp_firmware PD_ADMA>; @@ -434,6 +447,7 @@ interrupt-parent = <&gic>; interrupts = <0 82 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <64>; iommus = <&smmu 0x86d>; power-domains = <&zynqmp_firmware PD_ADMA>; @@ -446,6 +460,7 @@ interrupt-parent = <&gic>; interrupts = <0 83 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <64>; iommus = <&smmu 0x86e>; power-domains = <&zynqmp_firmware PD_ADMA>; @@ -458,6 +473,7 @@ interrupt-parent = <&gic>; interrupts = <0 84 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <64>; iommus = <&smmu 0x86f>; power-domains = <&zynqmp_firmware PD_ADMA>; -- 2.7.4