From 1fa7aaf5a7c1a860083c60c103718a7bcc5dcb0a Mon Sep 17 00:00:00 2001 From: Dmitry Preobrazhensky Date: Mon, 17 Dec 2018 18:53:10 +0000 Subject: [PATCH] [AMDGPU][MC][DOC] A fix for build failure in r349370 llvm-svn: 349375 --- llvm/docs/AMDGPU/gfx7_attr.rst | 2 +- llvm/docs/AMDGPU/gfx7_hwreg.rst | 2 +- llvm/docs/AMDGPU/gfx7_label.rst | 2 +- llvm/docs/AMDGPU/gfx7_msg.rst | 2 +- llvm/docs/AMDGPU/gfx7_src_exp.rst | 2 +- llvm/docs/AMDGPU/gfx7_waitcnt.rst | 2 +- llvm/docs/AMDGPU/gfx8_attr.rst | 2 +- llvm/docs/AMDGPU/gfx8_hwreg.rst | 2 +- llvm/docs/AMDGPU/gfx8_label.rst | 2 +- llvm/docs/AMDGPU/gfx8_msg.rst | 2 +- llvm/docs/AMDGPU/gfx8_src_exp.rst | 2 +- llvm/docs/AMDGPU/gfx8_waitcnt.rst | 2 +- llvm/docs/AMDGPU/gfx9_attr.rst | 2 +- llvm/docs/AMDGPU/gfx9_hwreg.rst | 2 +- llvm/docs/AMDGPU/gfx9_label.rst | 2 +- llvm/docs/AMDGPU/gfx9_msg.rst | 2 +- llvm/docs/AMDGPU/gfx9_src_exp.rst | 2 +- llvm/docs/AMDGPU/gfx9_waitcnt.rst | 2 +- llvm/docs/AMDGPUInstructionNotation.rst | 2 +- llvm/docs/AMDGPUInstructionSyntax.rst | 8 +++---- llvm/docs/AMDGPUModifierSyntax.rst | 42 ++++++++++++++++----------------- llvm/docs/AMDGPUOperandSyntax.rst | 34 +++++++++++++------------- 22 files changed, 61 insertions(+), 61 deletions(-) diff --git a/llvm/docs/AMDGPU/gfx7_attr.rst b/llvm/docs/AMDGPU/gfx7_attr.rst index 13096f2..219b774 100644 --- a/llvm/docs/AMDGPU/gfx7_attr.rst +++ b/llvm/docs/AMDGPU/gfx7_attr.rst @@ -23,7 +23,7 @@ Interpolation attribute and channel: Examples: -.. code-block:: nasm +.. parsed-literal:: v_interp_p1_f32 v1, v0, attr0.x v_interp_p1_f32 v1, v0, attr32.w diff --git a/llvm/docs/AMDGPU/gfx7_hwreg.rst b/llvm/docs/AMDGPU/gfx7_hwreg.rst index 1b0c542..1e2d964 100644 --- a/llvm/docs/AMDGPU/gfx7_hwreg.rst +++ b/llvm/docs/AMDGPU/gfx7_hwreg.rst @@ -51,7 +51,7 @@ Defined register *names* include: Examples: -.. code-block:: nasm +.. parsed-literal:: s_getreg_b32 s2, 0x6 s_getreg_b32 s2, hwreg(15) diff --git a/llvm/docs/AMDGPU/gfx7_label.rst b/llvm/docs/AMDGPU/gfx7_label.rst index e0153e7..ed2f3a41 100644 --- a/llvm/docs/AMDGPU/gfx7_label.rst +++ b/llvm/docs/AMDGPU/gfx7_label.rst @@ -20,7 +20,7 @@ This operand may be specified as: Examples: -.. code-block:: nasm +.. parsed-literal:: offset = 30 s_branch loop_end diff --git a/llvm/docs/AMDGPU/gfx7_msg.rst b/llvm/docs/AMDGPU/gfx7_msg.rst index ad5fd7f..5476053 100644 --- a/llvm/docs/AMDGPU/gfx7_msg.rst +++ b/llvm/docs/AMDGPU/gfx7_msg.rst @@ -60,7 +60,7 @@ Each message type supports specific operations: Examples: -.. code-block:: nasm +.. parsed-literal:: s_sendmsg 0x12 s_sendmsg sendmsg(MSG_INTERRUPT) diff --git a/llvm/docs/AMDGPU/gfx7_src_exp.rst b/llvm/docs/AMDGPU/gfx7_src_exp.rst index 6d155a5..32f71a8 100644 --- a/llvm/docs/AMDGPU/gfx7_src_exp.rst +++ b/llvm/docs/AMDGPU/gfx7_src_exp.rst @@ -19,7 +19,7 @@ Data to copy to export buffers. This is an optional operand. Must be specified a An example: -.. code-block:: nasm +.. parsed-literal:: exp mrtz v3, v3, off, off compr diff --git a/llvm/docs/AMDGPU/gfx7_waitcnt.rst b/llvm/docs/AMDGPU/gfx7_waitcnt.rst index c89a320..3f5e07d 100644 --- a/llvm/docs/AMDGPU/gfx7_waitcnt.rst +++ b/llvm/docs/AMDGPU/gfx7_waitcnt.rst @@ -44,7 +44,7 @@ These helpers may be specified in any order. Ampersands and commas may be used a Examples: -.. code-block:: nasm +.. parsed-literal:: s_waitcnt 0 s_waitcnt vmcnt(1) diff --git a/llvm/docs/AMDGPU/gfx8_attr.rst b/llvm/docs/AMDGPU/gfx8_attr.rst index 3f28033..12fa2cd 100644 --- a/llvm/docs/AMDGPU/gfx8_attr.rst +++ b/llvm/docs/AMDGPU/gfx8_attr.rst @@ -23,7 +23,7 @@ Interpolation attribute and channel: Examples: -.. code-block:: nasm +.. parsed-literal:: v_interp_p1_f32 v1, v0, attr0.x v_interp_p1_f32 v1, v0, attr32.w diff --git a/llvm/docs/AMDGPU/gfx8_hwreg.rst b/llvm/docs/AMDGPU/gfx8_hwreg.rst index d9b4299..ffa1ea5 100644 --- a/llvm/docs/AMDGPU/gfx8_hwreg.rst +++ b/llvm/docs/AMDGPU/gfx8_hwreg.rst @@ -51,7 +51,7 @@ Defined register *names* include: Examples: -.. code-block:: nasm +.. parsed-literal:: s_getreg_b32 s2, 0x6 s_getreg_b32 s2, hwreg(15) diff --git a/llvm/docs/AMDGPU/gfx8_label.rst b/llvm/docs/AMDGPU/gfx8_label.rst index af63ad9..99e384e 100644 --- a/llvm/docs/AMDGPU/gfx8_label.rst +++ b/llvm/docs/AMDGPU/gfx8_label.rst @@ -20,7 +20,7 @@ This operand may be specified as: Examples: -.. code-block:: nasm +.. parsed-literal:: offset = 30 s_branch loop_end diff --git a/llvm/docs/AMDGPU/gfx8_msg.rst b/llvm/docs/AMDGPU/gfx8_msg.rst index 8140bc2..313d8e68 100644 --- a/llvm/docs/AMDGPU/gfx8_msg.rst +++ b/llvm/docs/AMDGPU/gfx8_msg.rst @@ -60,7 +60,7 @@ Each message type supports specific operations: Examples: -.. code-block:: nasm +.. parsed-literal:: s_sendmsg 0x12 s_sendmsg sendmsg(MSG_INTERRUPT) diff --git a/llvm/docs/AMDGPU/gfx8_src_exp.rst b/llvm/docs/AMDGPU/gfx8_src_exp.rst index 92340c5..10449b4 100644 --- a/llvm/docs/AMDGPU/gfx8_src_exp.rst +++ b/llvm/docs/AMDGPU/gfx8_src_exp.rst @@ -19,7 +19,7 @@ Data to copy to export buffers. This is an optional operand. Must be specified a An example: -.. code-block:: nasm +.. parsed-literal:: exp mrtz v3, v3, off, off compr diff --git a/llvm/docs/AMDGPU/gfx8_waitcnt.rst b/llvm/docs/AMDGPU/gfx8_waitcnt.rst index d164788..4bad594 100644 --- a/llvm/docs/AMDGPU/gfx8_waitcnt.rst +++ b/llvm/docs/AMDGPU/gfx8_waitcnt.rst @@ -44,7 +44,7 @@ These helpers may be specified in any order. Ampersands and commas may be used a Examples: -.. code-block:: nasm +.. parsed-literal:: s_waitcnt 0 s_waitcnt vmcnt(1) diff --git a/llvm/docs/AMDGPU/gfx9_attr.rst b/llvm/docs/AMDGPU/gfx9_attr.rst index c69589f..faffcc7 100644 --- a/llvm/docs/AMDGPU/gfx9_attr.rst +++ b/llvm/docs/AMDGPU/gfx9_attr.rst @@ -23,7 +23,7 @@ Interpolation attribute and channel: Examples: -.. code-block:: nasm +.. parsed-literal:: v_interp_p1_f32 v1, v0, attr0.x v_interp_p1_f32 v1, v0, attr32.w diff --git a/llvm/docs/AMDGPU/gfx9_hwreg.rst b/llvm/docs/AMDGPU/gfx9_hwreg.rst index cecba1e..7ebb38b 100644 --- a/llvm/docs/AMDGPU/gfx9_hwreg.rst +++ b/llvm/docs/AMDGPU/gfx9_hwreg.rst @@ -52,7 +52,7 @@ Defined register *names* include: Examples: -.. code-block:: nasm +.. parsed-literal:: s_getreg_b32 s2, 0x6 s_getreg_b32 s2, hwreg(15) diff --git a/llvm/docs/AMDGPU/gfx9_label.rst b/llvm/docs/AMDGPU/gfx9_label.rst index 09fde5e..3277172 100644 --- a/llvm/docs/AMDGPU/gfx9_label.rst +++ b/llvm/docs/AMDGPU/gfx9_label.rst @@ -20,7 +20,7 @@ This operand may be specified as: Examples: -.. code-block:: nasm +.. parsed-literal:: offset = 30 s_branch loop_end diff --git a/llvm/docs/AMDGPU/gfx9_msg.rst b/llvm/docs/AMDGPU/gfx9_msg.rst index 41cd7da..f18cff46 100644 --- a/llvm/docs/AMDGPU/gfx9_msg.rst +++ b/llvm/docs/AMDGPU/gfx9_msg.rst @@ -60,7 +60,7 @@ Each message type supports specific operations: Examples: -.. code-block:: nasm +.. parsed-literal:: s_sendmsg 0x12 s_sendmsg sendmsg(MSG_INTERRUPT) diff --git a/llvm/docs/AMDGPU/gfx9_src_exp.rst b/llvm/docs/AMDGPU/gfx9_src_exp.rst index 71eaac0..91a5d53 100644 --- a/llvm/docs/AMDGPU/gfx9_src_exp.rst +++ b/llvm/docs/AMDGPU/gfx9_src_exp.rst @@ -19,7 +19,7 @@ Data to copy to export buffers. This is an optional operand. Must be specified a An example: -.. code-block:: nasm +.. parsed-literal:: exp mrtz v3, v3, off, off compr diff --git a/llvm/docs/AMDGPU/gfx9_waitcnt.rst b/llvm/docs/AMDGPU/gfx9_waitcnt.rst index 5f755fc..015a51a 100644 --- a/llvm/docs/AMDGPU/gfx9_waitcnt.rst +++ b/llvm/docs/AMDGPU/gfx9_waitcnt.rst @@ -45,7 +45,7 @@ These helpers may be specified in any order. Ampersands and commas may be used a Examples: -.. code-block:: nasm +.. parsed-literal:: s_waitcnt 0 s_waitcnt vmcnt(1) diff --git a/llvm/docs/AMDGPUInstructionNotation.rst b/llvm/docs/AMDGPUInstructionNotation.rst index a2b617c2..2b41d5b 100644 --- a/llvm/docs/AMDGPUInstructionNotation.rst +++ b/llvm/docs/AMDGPUInstructionNotation.rst @@ -81,7 +81,7 @@ Where: Examples: -.. code-block:: nasm +.. parsed-literal:: src1:m // src1 operand may be used with operand modifiers vdata:dst // vdata operand may be used as both source and destination diff --git a/llvm/docs/AMDGPUInstructionSyntax.rst b/llvm/docs/AMDGPUInstructionSyntax.rst index 3beb1c3..90ad54a 100644 --- a/llvm/docs/AMDGPUInstructionSyntax.rst +++ b/llvm/docs/AMDGPUInstructionSyntax.rst @@ -90,21 +90,21 @@ The size of data is specified by size suffices: Examples of instructions with different types of source and destination operands: -.. code-block:: nasm +.. parsed-literal:: s_bcnt0_i32_b64 v_cvt_f32_u32 Examples of instructions with one data type: -.. code-block:: nasm +.. parsed-literal:: v_max3_f32 v_max3_i16 Examples of instructions which operate with packed data: -.. code-block:: nasm +.. parsed-literal:: v_pk_add_u16 v_pk_add_i16 @@ -112,7 +112,7 @@ Examples of instructions which operate with packed data: Examples of typeless instructions which operate on b128 data: -.. code-block:: nasm +.. parsed-literal:: buffer_store_dwordx4 flat_load_dwordx4 diff --git a/llvm/docs/AMDGPUModifierSyntax.rst b/llvm/docs/AMDGPUModifierSyntax.rst index bc2ddd0..e2b8bb3 100644 --- a/llvm/docs/AMDGPUModifierSyntax.rst +++ b/llvm/docs/AMDGPUModifierSyntax.rst @@ -43,7 +43,7 @@ Used with DS instructions which have 2 addresses. Examples: -.. code-block:: nasm +.. parsed-literal:: offset:255 offset:0xff @@ -66,7 +66,7 @@ Used with DS instructions which have 1 address. Examples: -.. code-block:: nasm +.. parsed-literal:: offset:65535 offset:0xffff @@ -133,7 +133,7 @@ Numeric parameters may be specified as either :ref:`integer numbers