From 1d7d0e21263c09d41910c7d334b97a97085449a3 Mon Sep 17 00:00:00 2001
From: Simon Atanasyan <simon@atanasyan.com>
Date: Tue, 2 Jul 2019 10:22:14 +0000
Subject: [PATCH] [mips] Mark P5600 scheduling model as complete

llvm-svn: 364902
---
 llvm/lib/Target/Mips/MipsScheduleP5600.td | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/Mips/MipsScheduleP5600.td b/llvm/lib/Target/Mips/MipsScheduleP5600.td
index 3eb0e37..f97b03b 100644
--- a/llvm/lib/Target/Mips/MipsScheduleP5600.td
+++ b/llvm/lib/Target/Mips/MipsScheduleP5600.td
@@ -12,7 +12,7 @@ def MipsP5600Model : SchedMachineModel {
   int LoadLatency = 4;
   int MispredictPenalty = 8; // TODO: Estimated
 
-  let CompleteModel = 0;
+  let CompleteModel = 1;
   let FullInstRWOverlapCheck = 1;
 
   list<Predicate> UnsupportedFeatures = [HasMips3, HasMips32r6, HasMips64,
-- 
2.7.4