From 1cb0b5660777cb563637ff6bb80722f449ee97eb Mon Sep 17 00:00:00 2001 From: Thomas Lively Date: Fri, 30 Oct 2020 15:44:04 -0700 Subject: [PATCH] [WebAssembly] Prototype i64x2.widen_{low,high}_i32x4_{s,u} As proposed in https://github.com/WebAssembly/simd/pull/290. As usual, these instructions are available only via builtin functions and intrinsics while they are in the prototyping stage. Differential Revision: https://reviews.llvm.org/D90504 --- clang/include/clang/Basic/BuiltinsWebAssembly.def | 5 +++ clang/lib/CodeGen/CGBuiltin.cpp | 23 +++++++++++++ clang/test/CodeGen/builtins-wasm.c | 24 +++++++++++++ llvm/include/llvm/IR/IntrinsicsWebAssembly.td | 13 +++++++ .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 9 +++++ llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll | 40 ++++++++++++++++++++++ llvm/test/MC/WebAssembly/simd-encodings.s | 12 +++++++ 7 files changed, 126 insertions(+) diff --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def b/clang/include/clang/Basic/BuiltinsWebAssembly.def index c1e594e..5ab0507 100644 --- a/clang/include/clang/Basic/BuiltinsWebAssembly.def +++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def @@ -194,6 +194,11 @@ TARGET_BUILTIN(__builtin_wasm_narrow_u_i8x16_i16x8, "V16UcV8UsV8Us", "nc", "simd TARGET_BUILTIN(__builtin_wasm_narrow_s_i16x8_i32x4, "V8sV4iV4i", "nc", "simd128") TARGET_BUILTIN(__builtin_wasm_narrow_u_i16x8_i32x4, "V8UsV4UiV4Ui", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_widen_low_s_i32x4_i64x2, "V2LLiV4i", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_widen_high_s_i32x4_i64x2, "V2LLiV4i", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_widen_low_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_widen_high_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", "simd128") + TARGET_BUILTIN(__builtin_wasm_load32_zero, "V4ii*", "n", "simd128") TARGET_BUILTIN(__builtin_wasm_load64_zero, "V2LLiLLi*", "n", "simd128") diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index 7341a44..5979a3d 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -16792,6 +16792,29 @@ Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID, CGM.getIntrinsic(IntNo, {ConvertType(E->getType()), Low->getType()}); return Builder.CreateCall(Callee, {Low, High}); } + case WebAssembly::BI__builtin_wasm_widen_low_s_i32x4_i64x2: + case WebAssembly::BI__builtin_wasm_widen_high_s_i32x4_i64x2: + case WebAssembly::BI__builtin_wasm_widen_low_u_i32x4_i64x2: + case WebAssembly::BI__builtin_wasm_widen_high_u_i32x4_i64x2: { + Value *Vec = EmitScalarExpr(E->getArg(0)); + unsigned IntNo; + switch (BuiltinID) { + case WebAssembly::BI__builtin_wasm_widen_low_s_i32x4_i64x2: + IntNo = Intrinsic::wasm_widen_low_signed; + break; + case WebAssembly::BI__builtin_wasm_widen_high_s_i32x4_i64x2: + IntNo = Intrinsic::wasm_widen_high_signed; + break; + case WebAssembly::BI__builtin_wasm_widen_low_u_i32x4_i64x2: + IntNo = Intrinsic::wasm_widen_low_unsigned; + break; + case WebAssembly::BI__builtin_wasm_widen_high_u_i32x4_i64x2: + IntNo = Intrinsic::wasm_widen_high_unsigned; + break; + } + Function *Callee = CGM.getIntrinsic(IntNo); + return Builder.CreateCall(Callee, Vec); + } case WebAssembly::BI__builtin_wasm_load32_zero: { Value *Ptr = EmitScalarExpr(E->getArg(0)); Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_load32_zero); diff --git a/clang/test/CodeGen/builtins-wasm.c b/clang/test/CodeGen/builtins-wasm.c index e5c7211..450f505 100644 --- a/clang/test/CodeGen/builtins-wasm.c +++ b/clang/test/CodeGen/builtins-wasm.c @@ -918,6 +918,30 @@ u16x8 narrow_u_i16x8_i32x4(u32x4 low, u32x4 high) { // WEBASSEMBLY: ret } +i64x2 widen_low_s_i32x4_i64x2(i32x4 x) { + return __builtin_wasm_widen_low_s_i32x4_i64x2(x); + // WEBASSEMBLY: call <2 x i64> @llvm.wasm.widen.low.signed(<4 x i32> %x) + // WEBASSEMBLY: ret +} + +i64x2 widen_high_s_i32x4_i64x2(i32x4 x) { + return __builtin_wasm_widen_high_s_i32x4_i64x2(x); + // WEBASSEMBLY: call <2 x i64> @llvm.wasm.widen.high.signed(<4 x i32> %x) + // WEBASSEMBLY: ret +} + +u64x2 widen_low_u_i32x4_i64x2(u32x4 x) { + return __builtin_wasm_widen_low_u_i32x4_i64x2(x); + // WEBASSEMBLY: call <2 x i64> @llvm.wasm.widen.low.unsigned(<4 x i32> %x) + // WEBASSEMBLY: ret +} + +u64x2 widen_high_u_i32x4_i64x2(u32x4 x) { + return __builtin_wasm_widen_high_u_i32x4_i64x2(x); + // WEBASSEMBLY: call <2 x i64> @llvm.wasm.widen.high.unsigned(<4 x i32> %x) + // WEBASSEMBLY: ret +} + i32x4 load32_zero(int *p) { return __builtin_wasm_load32_zero(p); // WEBASSEMBLY: call <4 x i32> @llvm.wasm.load32.zero(i32* %p) diff --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td index f65b745..e7a2ce7 100644 --- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td +++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td @@ -151,6 +151,7 @@ def int_wasm_dot : Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem, IntrSpeculatable]>; + def int_wasm_narrow_signed : Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty, LLVMMatchType<1>], @@ -159,6 +160,18 @@ def int_wasm_narrow_unsigned : Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty, LLVMMatchType<1>], [IntrNoMem, IntrSpeculatable]>; + +// TODO: Replace these intrinsics with normal ISel patterns once i32x4 to i64x2 +// widening is merged to the proposal. +def int_wasm_widen_low_signed : + Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty], [IntrNoMem, IntrSpeculatable]>; +def int_wasm_widen_high_signed : + Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty], [IntrNoMem, IntrSpeculatable]>; +def int_wasm_widen_low_unsigned : + Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty], [IntrNoMem, IntrSpeculatable]>; +def int_wasm_widen_high_unsigned : + Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty], [IntrNoMem, IntrSpeculatable]>; + def int_wasm_q15mulr_saturate_signed : Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty], diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td index 2d8c816..7d7e8aa 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td @@ -1116,6 +1116,15 @@ multiclass SIMDWiden; defm "" : SIMDWiden; +defm "" : SIMDConvert; +defm "" : SIMDConvert; +defm "" : SIMDConvert; +defm "" : SIMDConvert; + // Narrowing operations multiclass SIMDNarrow baseInst> { diff --git a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll index aa4ff63..38b624e 100644 --- a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll +++ b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll @@ -528,6 +528,46 @@ define <4 x i32> @trunc_sat_u_v4i32(<4 x float> %x) { ; ============================================================================== ; 2 x i64 ; ============================================================================== +; CHECK-LABEL: widen_low_s_v2i64: +; SIMD128-NEXT: .functype widen_low_s_v2i64 (v128) -> (v128){{$}} +; SIMD128-NEXT: i64x2.widen_low_i32x4_s $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <2 x i64> @llvm.wasm.widen.low.signed(<4 x i32>) +define <2 x i64> @widen_low_s_v2i64(<4 x i32> %x) { + %a = call <2 x i64> @llvm.wasm.widen.low.signed(<4 x i32> %x) + ret <2 x i64> %a +} + +; CHECK-LABEL: widen_high_s_v2i64: +; SIMD128-NEXT: .functype widen_high_s_v2i64 (v128) -> (v128){{$}} +; SIMD128-NEXT: i64x2.widen_high_i32x4_s $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <2 x i64> @llvm.wasm.widen.high.signed(<4 x i32>) +define <2 x i64> @widen_high_s_v2i64(<4 x i32> %x) { + %a = call <2 x i64> @llvm.wasm.widen.high.signed(<4 x i32> %x) + ret <2 x i64> %a +} + +; CHECK-LABEL: widen_low_u_v2i64: +; SIMD128-NEXT: .functype widen_low_u_v2i64 (v128) -> (v128){{$}} +; SIMD128-NEXT: i64x2.widen_low_i32x4_u $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <2 x i64> @llvm.wasm.widen.low.unsigned(<4 x i32>) +define <2 x i64> @widen_low_u_v2i64(<4 x i32> %x) { + %a = call <2 x i64> @llvm.wasm.widen.low.unsigned(<4 x i32> %x) + ret <2 x i64> %a +} + +; CHECK-LABEL: widen_high_u_v2i64: +; SIMD128-NEXT: .functype widen_high_u_v2i64 (v128) -> (v128){{$}} +; SIMD128-NEXT: i64x2.widen_high_i32x4_u $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <2 x i64> @llvm.wasm.widen.high.unsigned(<4 x i32>) +define <2 x i64> @widen_high_u_v2i64(<4 x i32> %x) { + %a = call <2 x i64> @llvm.wasm.widen.high.unsigned(<4 x i32> %x) + ret <2 x i64> %a +} + ; CHECK-LABEL: extmul_low_s_v2i64: ; SIMD128-NEXT: .functype extmul_low_s_v2i64 (v128, v128) -> (v128){{$}} ; SIMD128-NEXT: i64x2.extmul_low_i32x4_s $push[[R:[0-9]+]]=, $0, $1{{$}} diff --git a/llvm/test/MC/WebAssembly/simd-encodings.s b/llvm/test/MC/WebAssembly/simd-encodings.s index 6bd54c9..4e30409 100644 --- a/llvm/test/MC/WebAssembly/simd-encodings.s +++ b/llvm/test/MC/WebAssembly/simd-encodings.s @@ -520,6 +520,18 @@ main: # CHECK: i64x2.all_true # encoding: [0xfd,0xc3,0x01] i64x2.all_true + # CHECK: i64x2.widen_low_i32x4_s # encoding: [0xfd,0xc7,0x01] + i64x2.widen_low_i32x4_s + + # CHECK: i64x2.widen_high_i32x4_s # encoding: [0xfd,0xc8,0x01] + i64x2.widen_high_i32x4_s + + # CHECK: i64x2.widen_low_i32x4_u # encoding: [0xfd,0xc9,0x01] + i64x2.widen_low_i32x4_u + + # CHECK: i64x2.widen_high_i32x4_u # encoding: [0xfd,0xca,0x01] + i64x2.widen_high_i32x4_u + # CHECK: i64x2.shl # encoding: [0xfd,0xcb,0x01] i64x2.shl -- 2.7.4