From 1c3b74f0ab6d12c8f4052e69301c433b5b647102 Mon Sep 17 00:00:00 2001 From: Sebastian Neubauer Date: Tue, 30 Mar 2021 09:50:13 +0200 Subject: [PATCH] [AMDGPU] Remove outdated TODOs. NFC spillSGPRToVGPR is already respected in these places since D95768. Differential Revision: https://reviews.llvm.org/D99570 --- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 2 -- 1 file changed, 2 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp index e7588b71..6ae0691 100644 --- a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp @@ -951,7 +951,6 @@ void SIFrameLowering::emitPrologue(MachineFunction &MF, assert(Spill.size() == 1); // Save FP before setting it up. - // FIXME: This should respect spillSGPRToVGPR; BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::V_WRITELANE_B32), Spill[0].VGPR) .addReg(FramePtrReg) .addImm(Spill[0].Lane) @@ -969,7 +968,6 @@ void SIFrameLowering::emitPrologue(MachineFunction &MF, assert(Spill.size() == 1); // Save BP before setting it up. - // FIXME: This should respect spillSGPRToVGPR; BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::V_WRITELANE_B32), Spill[0].VGPR) .addReg(BasePtrReg) .addImm(Spill[0].Lane) -- 2.7.4