From 1c2479a5fa17ae68dcf23fffebd4f467629e60c8 Mon Sep 17 00:00:00 2001
From: =?utf8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
Date: Tue, 23 Jan 2018 17:15:02 +0100
Subject: [PATCH] mips: bmips: add bcm63xx-spi driver support for BCM3380
MIME-Version: 1.0
Content-Type: text/plain; charset=utf8
Content-Transfer-Encoding: 8bit

This driver manages the SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
 arch/mips/dts/brcm,bcm3380.dtsi | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/mips/dts/brcm,bcm3380.dtsi b/arch/mips/dts/brcm,bcm3380.dtsi
index 64245eb..f83a6ea 100644
--- a/arch/mips/dts/brcm,bcm3380.dtsi
+++ b/arch/mips/dts/brcm,bcm3380.dtsi
@@ -12,6 +12,10 @@
 / {
 	compatible = "brcm,bcm3380";
 
+	aliases {
+		spi0 = &spi;
+	};
+
 	cpus {
 		reg = <0x14e00000 0x4>;
 		#address-cells = <1>;
@@ -142,6 +146,19 @@
 			status = "disabled";
 		};
 
+		spi: spi@14e02000 {
+			compatible = "brcm,bcm6358-spi";
+			reg = <0x14e02000 0x70c>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&periph_clk0 BCM3380_CLK0_SPI>;
+			resets = <&periph_rst0 BCM3380_RST0_SPI>;
+			spi-max-frequency = <25000000>;
+			num-cs = <6>;
+
+			status = "disabled";
+		};
+
 		leds: led-controller@14e00f00 {
 			compatible = "brcm,bcm6328-leds";
 			reg = <0x14e00f00 0x1c>;
-- 
2.7.4