From 1bf00219fc803d385e91e0a016f5235f1d6d89b7 Mon Sep 17 00:00:00 2001 From: Jay Foad Date: Thu, 19 Dec 2019 10:54:34 +0000 Subject: [PATCH] [AMDGPU] Handle multiple base operands in areMemAccessesTriviallyDisjoint Summary: This is in preparation for getMemOperandsWithOffset returning more base operands. Depends on D73455. Reviewers: arsenm, rampitec Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D73456 --- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 28 ++++++++++++---------------- 1 file changed, 12 insertions(+), 16 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index 6d01b676..bd3f44b 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -2633,26 +2633,22 @@ static bool offsetsDoNotOverlap(int WidthA, int OffsetA, bool SIInstrInfo::checkInstOffsetsDoNotOverlap(const MachineInstr &MIa, const MachineInstr &MIb) const { - const MachineOperand *BaseOp0, *BaseOp1; + SmallVector BaseOps0, BaseOps1; int64_t Offset0, Offset1; + if (!getMemOperandsWithOffset(MIa, BaseOps0, Offset0, &RI) || + !getMemOperandsWithOffset(MIb, BaseOps1, Offset1, &RI)) + return false; - if (getMemOperandWithOffset(MIa, BaseOp0, Offset0, &RI) && - getMemOperandWithOffset(MIb, BaseOp1, Offset1, &RI)) { - if (!BaseOp0->isIdenticalTo(*BaseOp1)) - return false; + if (!memOpsHaveSameBaseOperands(BaseOps0, BaseOps1)) + return false; - if (!MIa.hasOneMemOperand() || !MIb.hasOneMemOperand()) { - // FIXME: Handle ds_read2 / ds_write2. - return false; - } - unsigned Width0 = (*MIa.memoperands_begin())->getSize(); - unsigned Width1 = (*MIb.memoperands_begin())->getSize(); - if (offsetsDoNotOverlap(Width0, Offset0, Width1, Offset1)) { - return true; - } + if (!MIa.hasOneMemOperand() || !MIb.hasOneMemOperand()) { + // FIXME: Handle ds_read2 / ds_write2. + return false; } - - return false; + unsigned Width0 = MIa.memoperands().front()->getSize(); + unsigned Width1 = MIb.memoperands().front()->getSize(); + return offsetsDoNotOverlap(Width0, Offset0, Width1, Offset1); } bool SIInstrInfo::areMemAccessesTriviallyDisjoint(const MachineInstr &MIa, -- 2.7.4