From 1be3a558f2ead2023baebd71f5a021c0161dfe15 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Daniel=20Sch=C3=BCrmann?= Date: Wed, 8 Mar 2023 16:02:42 +0100 Subject: [PATCH] radv: add remaining RT shader args for separate compilation Also wrap RT args into struct {} rt for improved consistency and remove some 'ray_' prefixes. Part-of: --- src/amd/common/ac_shader_args.h | 32 ++++++++++++++++++++------ src/amd/compiler/aco_instruction_selection.cpp | 28 +++++++++++----------- src/amd/vulkan/radv_shader_args.c | 18 +++++++-------- 3 files changed, 48 insertions(+), 30 deletions(-) diff --git a/src/amd/common/ac_shader_args.h b/src/amd/common/ac_shader_args.h index 77a0251..6f46fec 100644 --- a/src/amd/common/ac_shader_args.h +++ b/src/amd/common/ac_shader_args.h @@ -143,13 +143,31 @@ struct ac_shader_args { struct ac_arg force_vrs_rates; /* RT */ - struct ac_arg rt_shader_pc; - struct ac_arg sbt_descriptors; - struct ac_arg ray_launch_size; - struct ac_arg ray_launch_size_addr; - struct ac_arg ray_launch_id; - struct ac_arg rt_dynamic_callable_stack_base; - struct ac_arg rt_traversal_shader_addr; + struct { + struct ac_arg shader_pc; + struct ac_arg sbt_descriptors; + struct ac_arg launch_size; + struct ac_arg launch_size_addr; + struct ac_arg launch_id; + struct ac_arg dynamic_callable_stack_base; + struct ac_arg traversal_shader; + struct ac_arg next_shader; + struct ac_arg shader_record; + struct ac_arg payload_offset; + struct ac_arg ray_origin; + struct ac_arg ray_tmin; + struct ac_arg ray_direction; + struct ac_arg ray_tmax; + struct ac_arg cull_mask_and_flags; + struct ac_arg sbt_offset; + struct ac_arg sbt_stride; + struct ac_arg miss_index; + struct ac_arg accel_struct; + struct ac_arg primitive_id; + struct ac_arg instance_addr; + struct ac_arg geometry_id_and_flags; + struct ac_arg hit_kind; + } rt; }; void ac_add_arg(struct ac_shader_args *info, enum ac_arg_regfile regfile, unsigned registers, diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index e36abf7..3f01bfe 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -8269,19 +8269,19 @@ visit_intrinsic(isel_context* ctx, nir_intrinsic_instr* instr) } case nir_intrinsic_load_ray_launch_size: { Temp dst = get_ssa_temp(ctx, &instr->dest.ssa); - bld.copy(Definition(dst), Operand(get_arg(ctx, ctx->args->ray_launch_size))); + bld.copy(Definition(dst), Operand(get_arg(ctx, ctx->args->rt.launch_size))); emit_split_vector(ctx, dst, 3); break; } case nir_intrinsic_load_ray_launch_id: { Temp dst = get_ssa_temp(ctx, &instr->dest.ssa); - bld.copy(Definition(dst), Operand(get_arg(ctx, ctx->args->ray_launch_id))); + bld.copy(Definition(dst), Operand(get_arg(ctx, ctx->args->rt.launch_id))); emit_split_vector(ctx, dst, 3); break; } case nir_intrinsic_load_ray_launch_size_addr_amd: { Temp dst = get_ssa_temp(ctx, &instr->dest.ssa); - Temp addr = get_arg(ctx, ctx->args->ray_launch_size_addr); + Temp addr = get_arg(ctx, ctx->args->rt.launch_size_addr); assert(addr.regClass() == s2); bld.copy(Definition(dst), Operand(addr)); break; @@ -8994,7 +8994,7 @@ visit_intrinsic(isel_context* ctx, nir_intrinsic_instr* instr) } case nir_intrinsic_load_sbt_base_amd: { Temp dst = get_ssa_temp(ctx, &instr->dest.ssa); - Temp addr = get_arg(ctx, ctx->args->sbt_descriptors); + Temp addr = get_arg(ctx, ctx->args->rt.sbt_descriptors); assert(addr.regClass() == s2); bld.copy(Definition(dst), Operand(addr)); break; @@ -9002,7 +9002,7 @@ visit_intrinsic(isel_context* ctx, nir_intrinsic_instr* instr) case nir_intrinsic_bvh64_intersect_ray_amd: visit_bvh64_intersect_ray_amd(ctx, instr); break; case nir_intrinsic_load_rt_dynamic_callable_stack_base_amd: bld.copy(Definition(get_ssa_temp(ctx, &instr->dest.ssa)), - get_arg(ctx, ctx->args->rt_dynamic_callable_stack_base)); + get_arg(ctx, ctx->args->rt.dynamic_callable_stack_base)); break; case nir_intrinsic_overwrite_vs_arguments_amd: { ctx->arg_temps[ctx->args->vertex_id.arg_index] = get_ssa_temp(ctx, instr->src[0].ssa); @@ -11516,9 +11516,9 @@ select_rt_prolog(Program* program, ac_shader_config* config, * Local invocation IDs: v[0-2] */ PhysReg in_ring_offsets = get_arg_reg(in_args, in_args->ring_offsets); - PhysReg in_launch_size_addr = get_arg_reg(in_args, in_args->ray_launch_size_addr); - PhysReg in_shader_addr = get_arg_reg(in_args, in_args->rt_traversal_shader_addr); - PhysReg in_stack_base = get_arg_reg(in_args, in_args->rt_dynamic_callable_stack_base); + PhysReg in_launch_size_addr = get_arg_reg(in_args, in_args->rt.launch_size_addr); + PhysReg in_shader_addr = get_arg_reg(in_args, in_args->rt.traversal_shader); + PhysReg in_stack_base = get_arg_reg(in_args, in_args->rt.dynamic_callable_stack_base); PhysReg in_wg_id_x = get_arg_reg(in_args, in_args->workgroup_ids[0]); PhysReg in_wg_id_y = get_arg_reg(in_args, in_args->workgroup_ids[1]); PhysReg in_wg_id_z = get_arg_reg(in_args, in_args->workgroup_ids[2]); @@ -11541,13 +11541,13 @@ select_rt_prolog(Program* program, ac_shader_config* config, * Ray launch IDs: v[0-2] * Stack pointer: v[3] */ - PhysReg out_shader_pc = get_arg_reg(out_args, out_args->rt_shader_pc); - PhysReg out_launch_size_x = get_arg_reg(out_args, out_args->ray_launch_size); + PhysReg out_shader_pc = get_arg_reg(out_args, out_args->rt.shader_pc); + PhysReg out_launch_size_x = get_arg_reg(out_args, out_args->rt.launch_size); PhysReg out_launch_size_z = out_launch_size_x.advance(8); PhysReg out_launch_ids[3]; for (unsigned i = 0; i < 3; i++) - out_launch_ids[i] = get_arg_reg(out_args, out_args->ray_launch_id).advance(i * 4); - PhysReg out_stack_ptr = get_arg_reg(out_args, out_args->rt_dynamic_callable_stack_base); + out_launch_ids[i] = get_arg_reg(out_args, out_args->rt.launch_id).advance(i * 4); + PhysReg out_stack_ptr = get_arg_reg(out_args, out_args->rt.dynamic_callable_stack_base); /* Temporaries: */ num_sgprs = align(num_sgprs, 2) + 2; @@ -11557,8 +11557,8 @@ select_rt_prolog(Program* program, ac_shader_config* config, assert(in_ring_offsets == out_shader_pc); assert(get_arg_reg(in_args, in_args->push_constants) == get_arg_reg(out_args, out_args->push_constants)); - assert(get_arg_reg(in_args, in_args->sbt_descriptors) == - get_arg_reg(out_args, out_args->sbt_descriptors)); + assert(get_arg_reg(in_args, in_args->rt.sbt_descriptors) == + get_arg_reg(out_args, out_args->rt.sbt_descriptors)); assert(in_launch_size_addr == out_launch_size_x); assert(in_shader_addr == out_launch_size_z); assert(in_local_ids[0] == out_launch_ids[0]); diff --git a/src/amd/vulkan/radv_shader_args.c b/src/amd/vulkan/radv_shader_args.c index a65ddd3..1389177 100644 --- a/src/amd/vulkan/radv_shader_args.c +++ b/src/amd/vulkan/radv_shader_args.c @@ -332,19 +332,19 @@ radv_init_shader_args(const struct radv_device *device, gl_shader_stage stage, void radv_declare_rt_shader_args(enum amd_gfx_level gfx_level, struct radv_shader_args *args) { - add_ud_arg(args, 2, AC_ARG_CONST_PTR, &args->ac.rt_shader_pc, AC_UD_SCRATCH_RING_OFFSETS); + add_ud_arg(args, 2, AC_ARG_CONST_PTR, &args->ac.rt.shader_pc, AC_UD_SCRATCH_RING_OFFSETS); add_ud_arg(args, 1, AC_ARG_CONST_PTR_PTR, &args->descriptor_sets[0], AC_UD_INDIRECT_DESCRIPTOR_SETS); ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_CONST_PTR, &args->ac.push_constants); - ac_add_arg(&args->ac, AC_ARG_SGPR, 2, AC_ARG_CONST_DESC_PTR, &args->ac.sbt_descriptors); - ac_add_arg(&args->ac, AC_ARG_SGPR, 3, AC_ARG_INT, &args->ac.ray_launch_size); + ac_add_arg(&args->ac, AC_ARG_SGPR, 2, AC_ARG_CONST_DESC_PTR, &args->ac.rt.sbt_descriptors); + ac_add_arg(&args->ac, AC_ARG_SGPR, 3, AC_ARG_INT, &args->ac.rt.launch_size); if (gfx_level < GFX9) { ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.scratch_offset); ac_add_arg(&args->ac, AC_ARG_SGPR, 2, AC_ARG_CONST_DESC_PTR, &args->ac.ring_offsets); } - ac_add_arg(&args->ac, AC_ARG_VGPR, 3, AC_ARG_INT, &args->ac.ray_launch_id); - ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.rt_dynamic_callable_stack_base); + ac_add_arg(&args->ac, AC_ARG_VGPR, 3, AC_ARG_INT, &args->ac.rt.launch_id); + ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.rt.dynamic_callable_stack_base); } static bool @@ -422,13 +422,13 @@ declare_shader_args(const struct radv_device *device, const struct radv_pipeline } if (info->cs.is_rt_shader) { - add_ud_arg(args, 2, AC_ARG_CONST_DESC_PTR, &args->ac.sbt_descriptors, + add_ud_arg(args, 2, AC_ARG_CONST_DESC_PTR, &args->ac.rt.sbt_descriptors, AC_UD_CS_SBT_DESCRIPTORS); - add_ud_arg(args, 2, AC_ARG_CONST_PTR, &args->ac.ray_launch_size_addr, + add_ud_arg(args, 2, AC_ARG_CONST_PTR, &args->ac.rt.launch_size_addr, AC_UD_CS_RAY_LAUNCH_SIZE_ADDR); - add_ud_arg(args, 2, AC_ARG_CONST_PTR, &args->ac.rt_traversal_shader_addr, + add_ud_arg(args, 2, AC_ARG_CONST_PTR, &args->ac.rt.traversal_shader, AC_UD_CS_TRAVERSAL_SHADER_ADDR); - add_ud_arg(args, 1, AC_ARG_INT, &args->ac.rt_dynamic_callable_stack_base, + add_ud_arg(args, 1, AC_ARG_INT, &args->ac.rt.dynamic_callable_stack_base, AC_UD_CS_RAY_DYNAMIC_CALLABLE_STACK_BASE); } -- 2.7.4