From 1b8f143a2302739de90cb643d732e12b55d4e4eb Mon Sep 17 00:00:00 2001 From: Matt Turner Date: Wed, 12 Mar 2014 14:23:40 -0700 Subject: [PATCH] i965/vec4: Factor code out of DCE into a separate function. Will be reused in the next commit. Reviewed-by: Eric Anholt --- src/mesa/drivers/dri/i965/brw_vec4.cpp | 73 ++++++++++++++++++---------------- 1 file changed, 39 insertions(+), 34 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index 673086d..4ad398a 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -321,6 +321,44 @@ src_reg::equals(src_reg *r) imm.u == r->imm.u); } +static bool +try_eliminate_instruction(vec4_instruction *inst, int new_writemask) +{ + if (new_writemask == 0) { + /* Don't dead code eliminate instructions that write to the + * accumulator as a side-effect. Instead just set the destination + * to the null register to free it. + */ + switch (inst->opcode) { + case BRW_OPCODE_ADDC: + case BRW_OPCODE_SUBB: + case BRW_OPCODE_MACH: + inst->dst = dst_reg(retype(brw_null_reg(), inst->dst.type)); + break; + default: + if (inst->writes_flag()) { + inst->dst = dst_reg(retype(brw_null_reg(), inst->dst.type)); + } else { + inst->remove(); + } + } + return true; + } else if (inst->dst.writemask != new_writemask) { + switch (inst->opcode) { + case SHADER_OPCODE_TXF_CMS: + case SHADER_OPCODE_GEN4_SCRATCH_READ: + case VS_OPCODE_PULL_CONSTANT_LOAD: + case VS_OPCODE_PULL_CONSTANT_LOAD_GEN7: + break; + default: + inst->dst.writemask = new_writemask; + return true; + } + } + + return false; +} + /** * Must be called after calculate_live_intervals() to remove unused * writes to registers -- register allocation will fail otherwise @@ -354,40 +392,7 @@ vec4_visitor::dead_code_eliminate() } } - if (write_mask == 0) { - progress = true; - - /* Don't dead code eliminate instructions that write to the - * accumulator as a side-effect. Instead just set the destination - * to the null register to free it. - */ - switch (inst->opcode) { - case BRW_OPCODE_ADDC: - case BRW_OPCODE_SUBB: - case BRW_OPCODE_MACH: - inst->dst = dst_reg(retype(brw_null_reg(), inst->dst.type)); - break; - default: - if (inst->writes_flag()) { - inst->dst = dst_reg(retype(brw_null_reg(), inst->dst.type)); - } else { - inst->remove(); - } - break; - } - } else if (inst->dst.writemask != write_mask) { - switch (inst->opcode) { - case SHADER_OPCODE_TXF_CMS: - case SHADER_OPCODE_GEN4_SCRATCH_READ: - case VS_OPCODE_PULL_CONSTANT_LOAD: - case VS_OPCODE_PULL_CONSTANT_LOAD_GEN7: - break; - default: - progress = true; - inst->dst.writemask = write_mask; - break; - } - } + progress = try_eliminate_instruction(inst, write_mask) || progress; } if (progress) -- 2.7.4