From 1b57749a5334ae3d854c6f8732e741ef9f977219 Mon Sep 17 00:00:00 2001 From: czhengsz Date: Wed, 25 Dec 2019 21:52:56 -0500 Subject: [PATCH] [PowerPC] stop folding if result rlwinm mask is wrap while original rlwinm is not. %1:g8rc = RLWINM8 %0:g8rc, 0, 16, 9 %2:g8rc = RLWINM8 killed %1:g8rc, 0, 0, 31 -> %2:g8rc = RLWINM8 %0:g8rc, 0, 16, 9 The above folding is wrong. Before transformation, %2:g8rc is 32 bit value. After transformation, %2:g8rc becomes a 64 bit value. This patch fixes above issue. Reviewed by: steven.zhang Differential Revision: https://reviews.llvm.org/D71833 --- llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 8 ++++++-- llvm/test/CodeGen/PowerPC/fold-rlwinm.mir | 15 +++++++++++++++ 2 files changed, 21 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp index 0d45b0a..02a5cdc 100644 --- a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp +++ b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp @@ -919,8 +919,12 @@ bool PPCMIPeephole::simplifyCode(void) { LLVM_DEBUG(dbgs() << "With: "); LLVM_DEBUG(MI.dump()); - } else if (isRunOfOnes((unsigned)(FinalMask.getZExtValue()), NewMB, - NewME) || SrcMaskFull) { + } else if ((isRunOfOnes((unsigned)(FinalMask.getZExtValue()), NewMB, + NewME) && NewMB <= NewME)|| SrcMaskFull) { + // Here we only handle MBMI <= MEMI case, so NewMB must be no bigger + // than NewME. Otherwise we get a 64 bit value after folding, but MI + // return a 32 bit value. + // If FoldingReg has only one use and it it not RLWINMo and // RLWINM8o, safe to delete its def SrcMI. Otherwise keep it. if (MRI->hasOneNonDBGUse(FoldingReg) && diff --git a/llvm/test/CodeGen/PowerPC/fold-rlwinm.mir b/llvm/test/CodeGen/PowerPC/fold-rlwinm.mir index cf96bc11..bc7c461 100644 --- a/llvm/test/CodeGen/PowerPC/fold-rlwinm.mir +++ b/llvm/test/CodeGen/PowerPC/fold-rlwinm.mir @@ -77,6 +77,21 @@ body: | BLR8 implicit $lr8, implicit $rm ... --- +name: testFoldRLWINMResultWrapped +#CHECK : name : testFoldRLWINMResultWrapped +tracksRegLiveness: true +body: | + bb.0.entry: + liveins: $x3 + %0:g8rc = COPY $x3 + %1:gprc = COPY %0.sub_32:g8rc + %2:gprc = RLWINM %1:gprc, 10, 20, 10 + ; CHECK: %2:gprc = RLWINM %1, 10, 20, 10 + %3:gprc = RLWINM %2:gprc, 10, 0, 31 + ; CHECK: %3:gprc = RLWINM %2, 10, 0, 31 + BLR8 implicit $lr8, implicit $rm +... +--- name: testFoldRLWINMMultipleUses #CHECK : name : testFoldRLWINMMultipleUses tracksRegLiveness: true -- 2.7.4