From 1b55b2be7ee4c5f992447ef6ca9856b8224692ec Mon Sep 17 00:00:00 2001
From: Thomas Lively <tlively@google.com>
Date: Tue, 4 Sep 2018 21:26:17 +0000
Subject: [PATCH] [WebAssembly][NFC] Fix formatting and tests

Summary: Small fixes

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D51656

llvm-svn: 341411
---
 llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td |  2 +-
 llvm/test/CodeGen/WebAssembly/simd.ll               | 14 ++++++++------
 2 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
index e4dbda3..4acc650 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -71,7 +71,7 @@ multiclass ExtractPat<ValueType lane_t, int mask> {
 defm extract_i8x16 : ExtractPat<i8, 0xff>;
 defm extract_i16x8 : ExtractPat<i16, 0xffff>;
 multiclass ExtractLaneExtended<string sign, bits<32> baseInst> {
-  defm "" : ExtractLane<v16i8, "i8x16", LaneIdx16, I32,  baseInst, sign,
+  defm "" : ExtractLane<v16i8, "i8x16", LaneIdx16, I32, baseInst, sign,
                         !cast<PatFrag>("extract_i8x16"#sign)>;
   defm "" : ExtractLane<v8i16, "i16x8", LaneIdx8, I32, !add(baseInst, 2), sign,
                         !cast<PatFrag>("extract_i16x8"#sign)>;
diff --git a/llvm/test/CodeGen/WebAssembly/simd.ll b/llvm/test/CodeGen/WebAssembly/simd.ll
index 5cd1fd3..0971d37 100644
--- a/llvm/test/CodeGen/WebAssembly/simd.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd.ll
@@ -37,7 +37,7 @@ define <16 x i8> @splat_v16i8(i8 %x) {
   ret <16 x i8> %res
 }
 
-; CHECK-LABEL: const_splat_v16i8
+; CHECK-LABEL: const_splat_v16i8:
 ; SIMD128; i8x16.splat
 define <16 x i8> @const_splat_v16i8() {
   ret <16 x i8> <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42,
@@ -267,7 +267,7 @@ define <4 x i32> @splat_v4i32(i32 %x) {
   ret <4 x i32> %res
 }
 
-; CHECK-LABEL: const_splat_v4i32
+; CHECK-LABEL: const_splat_v4i32:
 ; SIMD128; i32x4.splat
 define <4 x i32> @const_splat_v4i32() {
   ret <4 x i32> <i32 42, i32 42, i32 42, i32 42>
@@ -340,6 +340,12 @@ define <2 x i64> @splat_v2i64(i64 %x) {
   ret <2 x i64> %res
 }
 
+; CHECK-LABEL: const_splat_v2i64:
+; SIMD128; i64x2.splat
+define <2 x i64> @const_splat_v2i64() {
+  ret <2 x i64> <i64 42, i64 42>
+}
+
 ; CHECK-LABEL: extract_v2i64:
 ; NO-SIMD128-NOT: i64x2
 ; SIMD128-VM-NOT: i64x2
@@ -364,10 +370,6 @@ define <2 x i64> @replace_v2i64(<2 x i64> %v, i64 %x) {
   ret <2 x i64> %res
 }
 
-define <2 x i64> @const_splat_v2i64() {
-  ret <2 x i64> <i64 42, i64 42>
-}
-
 ; CHECK-LABEL: build_v2i64:
 ; NO-SIMD128-NOT: i64x2
 ; SIMD128-VM-NOT: i64x2
-- 
2.7.4