From 1b38002c7dae02ab8b97f3d3b076e3e5f58c136f Mon Sep 17 00:00:00 2001
From: Benjamin Kramer <benny.kra@googlemail.com>
Date: Sun, 22 Sep 2019 09:28:47 +0000
Subject: [PATCH] Move classes into anonymous namespaces. NFC.

llvm-svn: 372495
---
 clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp | 4 ++--
 llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp        | 2 ++
 llvm/lib/Target/PowerPC/PPCISelLowering.cpp         | 2 +-
 llvm/lib/Target/PowerPC/PPCInstrInfo.cpp            | 2 ++
 4 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp b/clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
index 52d21a5..a824499 100644
--- a/clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
+++ b/clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
@@ -662,8 +662,6 @@ private:
   void reportLeak(SymbolRef Sym, ExplodedNode *N, CheckerContext &C) const;
 };
 
-} // end anonymous namespace
-
 //===----------------------------------------------------------------------===//
 // Definition of MallocBugVisitor.
 //===----------------------------------------------------------------------===//
@@ -793,6 +791,8 @@ private:
   };
 };
 
+} // end anonymous namespace
+
 // A map from the freed symbol to the symbol representing the return value of
 // the free function.
 REGISTER_MAP_WITH_PROGRAMSTATE(FreeReturnValue, SymbolRef, SymbolRef)
diff --git a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
index ea43db0..32cb97f 100644
--- a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
@@ -674,6 +674,7 @@ unsigned HexagonInstrInfo::insertBranch(MachineBasicBlock &MBB,
   return 2;
 }
 
+namespace {
 class HexagonPipelinerLoopInfo : public TargetInstrInfo::PipelinerLoopInfo {
   MachineInstr *Loop, *EndLoop;
   MachineFunction *MF;
@@ -748,6 +749,7 @@ public:
 
   void disposed() override { Loop->eraseFromParent(); }
 };
+} // namespace
 
 std::unique_ptr<TargetInstrInfo::PipelinerLoopInfo>
 HexagonInstrInfo::analyzeLoopForPipelining(MachineBasicBlock *LoopBB) const {
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index ed9aae8..432d772 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -8187,7 +8187,7 @@ SDValue PPCTargetLowering::LowerBITCAST(SDValue Op, SelectionDAG &DAG) const {
                      Op0.getOperand(1));
 }
 
-const SDValue *getNormalLoadInput(const SDValue &Op) {
+static const SDValue *getNormalLoadInput(const SDValue &Op) {
   const SDValue *InputLoad = &Op;
   if (InputLoad->getOpcode() == ISD::BITCAST)
     InputLoad = &InputLoad->getOperand(0);
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index c33f0b3..f217bfb 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -3930,6 +3930,7 @@ bool PPCInstrInfo::isBDNZ(unsigned Opcode) const {
   return (Opcode == (Subtarget.isPPC64() ? PPC::BDNZ8 : PPC::BDNZ));
 }
 
+namespace {
 class PPCPipelinerLoopInfo : public TargetInstrInfo::PipelinerLoopInfo {
   MachineInstr *Loop, *EndLoop, *LoopCount;
   MachineFunction *MF;
@@ -3996,6 +3997,7 @@ public:
     LoopCount->eraseFromParent();
   }
 };
+} // namespace
 
 std::unique_ptr<TargetInstrInfo::PipelinerLoopInfo>
 PPCInstrInfo::analyzeLoopForPipelining(MachineBasicBlock *LoopBB) const {
-- 
2.7.4