From 1b2a0f431b2476a532847c71475a680e86c1cbc4 Mon Sep 17 00:00:00 2001 From: Alex Bradbury Date: Wed, 28 Feb 2018 08:20:47 +0000 Subject: [PATCH] [RISCV] Update two tests after r326208 llvm-svn: 326309 --- llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll | 4 ++-- llvm/test/CodeGen/RISCV/calls.ll | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll b/llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll index 6ef034c..1fbc429 100644 --- a/llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll +++ b/llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll @@ -278,7 +278,7 @@ define i64 @test_cttz_i64(i64 %a) nounwind { ; RV32I-NEXT: sw s8, 12(sp) ; RV32I-NEXT: mv s2, a1 ; RV32I-NEXT: mv s3, a0 -; RV32I-NEXT: addi a0, s3, -1 +; RV32I-NEXT: addi a0, a0, -1 ; RV32I-NEXT: not a1, s3 ; RV32I-NEXT: and a0, a1, a0 ; RV32I-NEXT: lui a1, 349525 @@ -469,7 +469,7 @@ define i64 @test_cttz_i64_zero_undef(i64 %a) nounwind { ; RV32I-NEXT: sw s8, 12(sp) ; RV32I-NEXT: mv s2, a1 ; RV32I-NEXT: mv s3, a0 -; RV32I-NEXT: addi a0, s3, -1 +; RV32I-NEXT: addi a0, a0, -1 ; RV32I-NEXT: not a1, s3 ; RV32I-NEXT: and a0, a1, a0 ; RV32I-NEXT: lui a1, 349525 diff --git a/llvm/test/CodeGen/RISCV/calls.ll b/llvm/test/CodeGen/RISCV/calls.ll index 5f71bda..8875015 100644 --- a/llvm/test/CodeGen/RISCV/calls.ll +++ b/llvm/test/CodeGen/RISCV/calls.ll @@ -99,8 +99,8 @@ define i32 @test_call_external_many_args(i32 %a) nounwind { ; RV32I-NEXT: sw ra, 12(sp) ; RV32I-NEXT: sw s1, 8(sp) ; RV32I-NEXT: mv s1, a0 -; RV32I-NEXT: sw s1, 4(sp) -; RV32I-NEXT: sw s1, 0(sp) +; RV32I-NEXT: sw a0, 4(sp) +; RV32I-NEXT: sw a0, 0(sp) ; RV32I-NEXT: lui a0, %hi(external_many_args) ; RV32I-NEXT: addi t0, a0, %lo(external_many_args) ; RV32I-NEXT: mv a0, s1 -- 2.7.4