From 1ae585b0a289c8215fa3b2b75e691eead631edb6 Mon Sep 17 00:00:00 2001 From: "sgjesse@chromium.org" Date: Mon, 10 May 2010 13:23:42 +0000 Subject: [PATCH] Support both TOS register combinations in inlined keyed load When popping key and receiver for an inlined keyed load support either order of r0/r1. The possible swap to have key in r0 and receiver in r1 is postponed to the deferred code calling the keyed load IC. Review URL: http://codereview.chromium.org/1992012 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4634 ce2b1a6d-e550-0410-aec6-3dcde31c8c00 --- src/arm/codegen-arm.cc | 27 ++++++++++++++++++++------- src/arm/codegen-arm.h | 2 +- src/arm/virtual-frame-arm.cc | 1 - 3 files changed, 21 insertions(+), 9 deletions(-) diff --git a/src/arm/codegen-arm.cc b/src/arm/codegen-arm.cc index dea2a37d6..de4856613 100644 --- a/src/arm/codegen-arm.cc +++ b/src/arm/codegen-arm.cc @@ -5471,20 +5471,34 @@ void DeferredReferenceGetNamedValue::Generate() { class DeferredReferenceGetKeyedValue: public DeferredCode { public: - DeferredReferenceGetKeyedValue() { + DeferredReferenceGetKeyedValue(Register key, Register receiver) + : key_(key), receiver_(receiver) { set_comment("[ DeferredReferenceGetKeyedValue"); } virtual void Generate(); + + private: + Register key_; + Register receiver_; }; void DeferredReferenceGetKeyedValue::Generate() { + ASSERT((key_.is(r0) && receiver_.is(r1)) || + (key_.is(r1) && receiver_.is(r0))); + Register scratch1 = VirtualFrame::scratch0(); Register scratch2 = VirtualFrame::scratch1(); __ DecrementCounter(&Counters::keyed_load_inline, 1, scratch1, scratch2); __ IncrementCounter(&Counters::keyed_load_inline_miss, 1, scratch1, scratch2); + // Ensure key in r0 and receiver in r1 to match keyed load ic calling + // convention. + if (key_.is(r1)) { + __ Swap(r0, r1, ip); + } + // The rest of the instructions in the deferred code must be together. { Assembler::BlockConstPoolScope block_const_pool(masm_); // Call keyed load IC. It has the arguments key and receiver in r0 and r1. @@ -5620,15 +5634,14 @@ void CodeGenerator::EmitKeyedLoad() { __ IncrementCounter(&Counters::keyed_load_inline, 1, frame_->scratch0(), frame_->scratch1()); - // Load the key and receiver from the stack to r0 and r1. - frame_->PopToR1R0(); - Register key = r0; - Register receiver = r1; + // Load the key and receiver from the stack. + Register key = frame_->PopToRegister(); + Register receiver = frame_->PopToRegister(key); VirtualFrame::SpilledScope spilled(frame_); - // The deferred code expects key and receiver in r0 and r1. + // The deferred code expects key and receiver in registers. DeferredReferenceGetKeyedValue* deferred = - new DeferredReferenceGetKeyedValue(); + new DeferredReferenceGetKeyedValue(key, receiver); // Check that the receiver is a heap object. __ tst(receiver, Operand(kSmiTagMask)); diff --git a/src/arm/codegen-arm.h b/src/arm/codegen-arm.h index ab1b844b3..af97a97b9 100644 --- a/src/arm/codegen-arm.h +++ b/src/arm/codegen-arm.h @@ -219,7 +219,7 @@ class CodeGenerator: public AstVisitor { // expected arguments. Otherwise return -1. static int InlineRuntimeCallArgumentsCount(Handle name); - // Constants related to patching of inlined lokad/store. + // Constants related to patching of inlined load/store. static const int kInlinedKeyedLoadInstructionsAfterPatchSize = 19; private: diff --git a/src/arm/virtual-frame-arm.cc b/src/arm/virtual-frame-arm.cc index d1559b302..475f933bb 100644 --- a/src/arm/virtual-frame-arm.cc +++ b/src/arm/virtual-frame-arm.cc @@ -576,7 +576,6 @@ Register VirtualFrame::PopToRegister(Register but_not_to_this_one) { ASSERT(but_not_to_this_one.is(r0) || but_not_to_this_one.is(r1) || but_not_to_this_one.is(no_reg)); - AssertIsNotSpilled(); element_count_--; if (top_of_stack_state_ == NO_TOS_REGISTERS) { if (but_not_to_this_one.is(r0)) { -- 2.34.1