From 1a6a6dab8995efa3c744598000bd718fa0b81017 Mon Sep 17 00:00:00 2001 From: aoliva Date: Fri, 22 Mar 2002 22:02:12 +0000 Subject: [PATCH] * config/mips/mips.h (MASK_RETURN_ADDR): Define. (TARGET_PTRMEMFUNC_VBIT_LOCATION): Define. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@51191 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 5 +++++ gcc/config/mips/mips.h | 11 +++++++++++ 2 files changed, 16 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 09ea764..6b1f0b5 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2002-03-22 Alexandre Oliva + + * config/mips/mips.h (MASK_RETURN_ADDR): Define. + (TARGET_PTRMEMFUNC_VBIT_LOCATION): Define. + 2002-03-22 Phil Edwards * cpplib.h (struct cpp_options): New member, warn_endif_labels. diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 7b01130..62bb948 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -2423,6 +2423,17 @@ extern enum reg_class mips_char_to_class[256]; RETURN_ADDRESS_POINTER_REGNUM))) \ : (rtx) 0) +/* Since the mips16 ISA mode is encoded in the least-significant bit + of the address, mask it off return addresses for purposes of + finding exception handling regions. */ + +#define MASK_RETURN_ADDR GEN_INT (-2) + +/* Similarly, don't use the least-significant bit to tell pointers to + code from vtable index. */ + +#define TARGET_PTRMEMFUNC_VBIT_LOCATION ptrmemfunc_vbit_in_delta + /* Structure to be filled in by compute_frame_size with register save masks, and offsets for the current function. */ -- 2.7.4