From 1a1c59f9958609438c13af73444061d85caa749c Mon Sep 17 00:00:00 2001 From: jacquesguan Date: Fri, 26 Aug 2022 16:18:16 +0800 Subject: [PATCH] [RISCV][NFC] Refactor fadd test to match the code. Change fadd test case in D122563 to match the fold base case. Differential Revision: https://reviews.llvm.org/D132722 --- llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll b/llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll index a4d98e7..698ad14 100644 --- a/llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll +++ b/llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll @@ -256,6 +256,21 @@ entry: ret float %rdx } +define float @reduce_fadd2(float %x, <4 x float> %v) { +; CHECK-LABEL: reduce_fadd2: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, mu +; CHECK-NEXT: vfmv.s.f v9, fa0 +; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, mu +; CHECK-NEXT: vfredusum.vs v8, v8, v9 +; CHECK-NEXT: vfmv.f.s fa0, v8 +; CHECK-NEXT: ret +entry: + %rdx = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.0, <4 x float> %v) + %res = fadd fast float %rdx, %x + ret float %res +} + define float @reduce_fmax(float %x, <4 x float> %v) { ; CHECK-LABEL: reduce_fmax: ; CHECK: # %bb.0: # %entry -- 2.7.4