From 19d318d88ac31bd9bd381bf0db494db6e6f84539 Mon Sep 17 00:00:00 2001 From: antonino Date: Mon, 31 Jul 2023 17:54:52 +0200 Subject: [PATCH] zink/nir: add a zink specific intrinsic for push constants Push costants in Zink are not flat indexed like in vulkan drivers which makes the `nir_intrinsic_load_push_constant` intrinsic inappropiate. Reviewed-by: Alyssa Rosenzweig Reviewed-by: Mike Blumenkrantz Part-of: --- src/compiler/nir/nir_intrinsics.py | 5 +++ .../drivers/zink/nir_to_spirv/nir_to_spirv.c | 4 +-- src/gallium/drivers/zink/zink_compiler.c | 38 +++++++++++----------- 3 files changed, 26 insertions(+), 21 deletions(-) diff --git a/src/compiler/nir/nir_intrinsics.py b/src/compiler/nir/nir_intrinsics.py index 47c9662..eccade1 100644 --- a/src/compiler/nir/nir_intrinsics.py +++ b/src/compiler/nir/nir_intrinsics.py @@ -1922,3 +1922,8 @@ intrinsic("load_point_coord_maybe_flipped", dest_comp=2, bit_sizes=[32]) # texture it returns width, height and array size. Used for txs lowering. intrinsic("load_texture_size_etna", src_comp=[1], dest_comp=3, flags=[CAN_ELIMINATE, CAN_REORDER]) + +# Zink specific intrinsics + +# src[] = { field }. +load("push_constant_zink", [1], [COMPONENT], [CAN_ELIMINATE, CAN_REORDER]) diff --git a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c index 61fe0dd..e295959 100644 --- a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c +++ b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c @@ -2859,7 +2859,7 @@ emit_load_push_const(struct ntv_context *ctx, nir_intrinsic_instr *intr) if (atype == nir_type_float) member = bitcast_to_uvec(ctx, member, nir_src_bit_size(intr->src[0]), 1); /* reuse the offset from ZINK_PUSH_CONST_OFFSET */ - SpvId offset = emit_uint_const(ctx, 32, 0); + SpvId offset = emit_uint_const(ctx, 32, nir_intrinsic_component(intr)); /* OpAccessChain takes an array of indices that drill into a hierarchy based on the type: * index 0 is accessing 'base' * index 1 is accessing 'base[index 1]' @@ -3569,7 +3569,7 @@ emit_intrinsic(struct ntv_context *ctx, nir_intrinsic_instr *intr) emit_store_deref(ctx, intr); break; - case nir_intrinsic_load_push_constant: + case nir_intrinsic_load_push_constant_zink: emit_load_push_const(ctx, intr); break; diff --git a/src/gallium/drivers/zink/zink_compiler.c b/src/gallium/drivers/zink/zink_compiler.c index 97c5a26..acba298 100644 --- a/src/gallium/drivers/zink/zink_compiler.c +++ b/src/gallium/drivers/zink/zink_compiler.c @@ -232,7 +232,7 @@ lower_basevertex_instr(nir_builder *b, nir_instr *in, void *data) return false; b->cursor = nir_after_instr(&instr->instr); - nir_intrinsic_instr *load = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_push_constant); + nir_intrinsic_instr *load = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_push_constant_zink); load->src[0] = nir_src_for_ssa(nir_imm_int(b, ZINK_GFX_PUSHCONST_DRAW_MODE_IS_INDEXED)); load->num_components = 1; nir_ssa_dest_init(&load->instr, &load->dest, 1, 32); @@ -272,7 +272,7 @@ lower_drawid_instr(nir_builder *b, nir_instr *in, void *data) return false; b->cursor = nir_before_instr(&instr->instr); - nir_intrinsic_instr *load = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_push_constant); + nir_intrinsic_instr *load = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_push_constant_zink); load->src[0] = nir_src_for_ssa(nir_imm_int(b, ZINK_GFX_PUSHCONST_DRAW_ID)); load->num_components = 1; nir_ssa_dest_init(&load->instr, &load->dest, 1, 32); @@ -327,7 +327,7 @@ lower_gl_point_gs_instr(nir_builder *b, nir_instr *instr, void *data) // viewport-map endpoints nir_ssa_def *vp_const_pos = nir_imm_int(b, ZINK_GFX_PUSHCONST_VIEWPORT_SCALE); - vp_scale = nir_load_push_constant(b, 2, 32, vp_const_pos); + vp_scale = nir_load_push_constant_zink(b, 2, 32, vp_const_pos); // Load point info values nir_ssa_def *point_size = nir_load_var(b, state->gl_point_size); @@ -712,8 +712,8 @@ lower_line_stipple_gs_instr(nir_builder *b, nir_instr *instr, void *data) nir_push_if(b, nir_ine_imm(b, nir_load_var(b, state->pos_counter), 0)); // viewport-map endpoints - nir_ssa_def *vp_scale = nir_load_push_constant(b, 2, 32, - nir_imm_int(b, ZINK_GFX_PUSHCONST_VIEWPORT_SCALE)); + nir_ssa_def *vp_scale = nir_load_push_constant_zink(b, 2, 32, + nir_imm_int(b, ZINK_GFX_PUSHCONST_VIEWPORT_SCALE)); nir_ssa_def *prev = nir_load_var(b, state->prev_pos); nir_ssa_def *curr = nir_load_var(b, state->pos_out); prev = viewport_map(b, prev, vp_scale); @@ -815,8 +815,8 @@ lower_line_stipple_fs(nir_shader *shader) sample_mask_out->data.location = FRAG_RESULT_SAMPLE_MASK; } - nir_ssa_def *pattern = nir_load_push_constant(&b, 1, 32, - nir_imm_int(&b, ZINK_GFX_PUSHCONST_LINE_STIPPLE_PATTERN)); + nir_ssa_def *pattern = nir_load_push_constant_zink(&b, 1, 32, + nir_imm_int(&b, ZINK_GFX_PUSHCONST_LINE_STIPPLE_PATTERN)); nir_ssa_def *factor = nir_i2f32(&b, nir_ishr_imm(&b, pattern, 16)); pattern = nir_iand_imm(&b, pattern, 0xffff); @@ -901,15 +901,15 @@ lower_line_smooth_gs_emit_vertex(nir_builder *b, b->cursor = nir_before_instr(&intrin->instr); nir_push_if(b, nir_ine_imm(b, nir_load_var(b, state->pos_counter), 0)); - nir_ssa_def *vp_scale = nir_load_push_constant(b, 2, 32, - nir_imm_int(b, ZINK_GFX_PUSHCONST_VIEWPORT_SCALE)); + nir_ssa_def *vp_scale = nir_load_push_constant_zink(b, 2, 32, + nir_imm_int(b, ZINK_GFX_PUSHCONST_VIEWPORT_SCALE)); nir_ssa_def *prev = nir_load_var(b, state->prev_pos); nir_ssa_def *curr = nir_load_var(b, state->pos_out); nir_ssa_def *prev_vp = viewport_map(b, prev, vp_scale); nir_ssa_def *curr_vp = viewport_map(b, curr, vp_scale); - nir_ssa_def *width = nir_load_push_constant(b, 1, 32, - nir_imm_int(b, ZINK_GFX_PUSHCONST_LINE_WIDTH)); + nir_ssa_def *width = nir_load_push_constant_zink(b, 1, 32, + nir_imm_int(b, ZINK_GFX_PUSHCONST_LINE_WIDTH)); nir_ssa_def *half_width = nir_fadd_imm(b, nir_fmul_imm(b, width, 0.5), 0.5); const unsigned yx[2] = { 1, 0 }; @@ -1136,8 +1136,8 @@ lower_line_smooth_fs(nir_shader *shader, bool lower_stipple) // initialize stipple_pattern nir_function_impl *entry = nir_shader_get_entrypoint(shader); b = nir_builder_at(nir_before_cf_list(&entry->body)); - nir_ssa_def *pattern = nir_load_push_constant(&b, 1, 32, - nir_imm_int(&b, ZINK_GFX_PUSHCONST_LINE_STIPPLE_PATTERN)); + nir_ssa_def *pattern = nir_load_push_constant_zink(&b, 1, 32, + nir_imm_int(&b, ZINK_GFX_PUSHCONST_LINE_STIPPLE_PATTERN)); nir_store_var(&b, stipple_pattern, pattern, 1); } @@ -2441,8 +2441,8 @@ struct clamp_layer_output_state { static void clamp_layer_output_emit(nir_builder *b, struct clamp_layer_output_state *state) { - nir_ssa_def *is_layered = nir_load_push_constant(b, 1, 32, - nir_imm_int(b, ZINK_GFX_PUSHCONST_FRAMEBUFFER_IS_LAYERED)); + nir_ssa_def *is_layered = nir_load_push_constant_zink(b, 1, 32, + nir_imm_int(b, ZINK_GFX_PUSHCONST_FRAMEBUFFER_IS_LAYERED)); nir_deref_instr *original_deref = nir_build_deref_var(b, state->original); nir_deref_instr *clamped_deref = nir_build_deref_var(b, state->clamped); nir_ssa_def *layer = nir_bcsel(b, nir_ieq_imm(b, is_layered, 1), @@ -5283,10 +5283,10 @@ zink_shader_tcs_create(struct zink_screen *screen, nir_shader *tes, unsigned ver create_gfx_pushconst(nir); - nir_ssa_def *load_inner = nir_load_push_constant(&b, 2, 32, - nir_imm_int(&b, ZINK_GFX_PUSHCONST_DEFAULT_INNER_LEVEL)); - nir_ssa_def *load_outer = nir_load_push_constant(&b, 4, 32, - nir_imm_int(&b, ZINK_GFX_PUSHCONST_DEFAULT_OUTER_LEVEL)); + nir_ssa_def *load_inner = nir_load_push_constant_zink(&b, 2, 32, + nir_imm_int(&b, ZINK_GFX_PUSHCONST_DEFAULT_INNER_LEVEL)); + nir_ssa_def *load_outer = nir_load_push_constant_zink(&b, 4, 32, + nir_imm_int(&b, ZINK_GFX_PUSHCONST_DEFAULT_OUTER_LEVEL)); for (unsigned i = 0; i < 2; i++) { nir_deref_instr *store_idx = nir_build_deref_array_imm(&b, nir_build_deref_var(&b, gl_TessLevelInner), i); -- 2.7.4