From 19ce828cbc08003ec35076f704f258bbecb1f721 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Thu, 13 Nov 2014 15:22:36 +0800 Subject: [PATCH] clk: rockchip: add clock ID for usbphy480m_src There are 3 different parent clock from different usbphy, all of them are fixed 480MHz, it is not able to auto select by clock core to the 2nd and the 3rd parent. For different use case for different board, we may need to select different usbphy clock out as parent manually. Add the clock ID for it so that we can use in dts. Signed-off-by: Kever Yang Signed-off-by: Heiko Stuebner --- include/dt-bindings/clock/rk3288-cru.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h index f60ce72..d6b59ae 100644 --- a/include/dt-bindings/clock/rk3288-cru.h +++ b/include/dt-bindings/clock/rk3288-cru.h @@ -80,6 +80,7 @@ #define SCLK_SDIO0_SAMPLE 119 #define SCLK_SDIO1_SAMPLE 120 #define SCLK_EMMC_SAMPLE 121 +#define SCLK_USBPHY480M_SRC 122 #define DCLK_VOP0 190 #define DCLK_VOP1 191 -- 2.7.4