From 19b5eb580b550e1c07235927d86deb1c542f7e83 Mon Sep 17 00:00:00 2001 From: Sanjay Patel Date: Fri, 21 Sep 2018 18:24:53 +0000 Subject: [PATCH] [x86] add (negative) andnp test for D52318; NFC llvm-svn: 342756 --- llvm/test/CodeGen/X86/avx-logic.ll | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/llvm/test/CodeGen/X86/avx-logic.ll b/llvm/test/CodeGen/X86/avx-logic.ll index 24fff08..a743048 100644 --- a/llvm/test/CodeGen/X86/avx-logic.ll +++ b/llvm/test/CodeGen/X86/avx-logic.ll @@ -364,6 +364,28 @@ define <8 x i32> @andn_disguised_i8_elts(<8 x i32> %x, <8 x i32> %y, <8 x i32> % ret <8 x i32> %add1 } +define <8 x i32> @andn_variable_mask_operand(<8 x i32> %x, <8 x i32> %y, <8 x i32> %z) { +; AVX1-LABEL: andn_variable_mask_operand: +; AVX1: # %bb.0: +; AVX1-NEXT: vandnps %ymm2, %ymm0, %ymm0 +; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 +; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 +; AVX1-NEXT: vpaddd %xmm3, %xmm2, %xmm2 +; AVX1-NEXT: vpaddd %xmm1, %xmm0, %xmm0 +; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; AVX1-NEXT: retq +; +; INT256-LABEL: andn_variable_mask_operand: +; INT256: # %bb.0: +; INT256-NEXT: vpandn %ymm2, %ymm0, %ymm0 +; INT256-NEXT: vpaddd %ymm1, %ymm0, %ymm0 +; INT256-NEXT: retq + %and = and <8 x i32> %x, %z + %xor = xor <8 x i32> %and, %z ; demanded bits will make this a 'not' + %add = add <8 x i32> %xor, %y + ret <8 x i32> %add +} + define <8 x i32> @or_disguised_i8_elts(<8 x i32> %x, <8 x i32> %y, <8 x i32> %z) { ; AVX1-LABEL: or_disguised_i8_elts: ; AVX1: # %bb.0: -- 2.7.4