From 1991da9a837dcb083a2a960fbd6a3389da8cc6c1 Mon Sep 17 00:00:00 2001 From: Koakuma Date: Sat, 12 Aug 2023 18:28:26 -0400 Subject: [PATCH] [SPARC][IAS] Add support for v9 DONE, RETRY, SAVED, & RESTORED Add support for DONE, RETRY, SAVED, and RESTORED (v9 Section A.11 & Section A.47). Those instructions are used for low-level interrupt handling and register window management by OS kernels. Reviewed By: barannikov88 Differential Revision: https://reviews.llvm.org/D144936 (cherry picked from commit bf499ec2b96c98633a8b2bc2113b19ffd437f647) --- llvm/lib/Target/Sparc/SparcInstrInfo.td | 16 ++++++++++++++++ llvm/test/MC/Disassembler/Sparc/sparc-v9.txt | 12 ++++++++++++ llvm/test/MC/Sparc/sparcv9-instructions.s | 17 +++++++++++++++++ 3 files changed, 45 insertions(+) diff --git a/llvm/lib/Target/Sparc/SparcInstrInfo.td b/llvm/lib/Target/Sparc/SparcInstrInfo.td index 3d602e7..9af8b17 100644 --- a/llvm/lib/Target/Sparc/SparcInstrInfo.td +++ b/llvm/lib/Target/Sparc/SparcInstrInfo.td @@ -1743,6 +1743,22 @@ let hasSideEffects = 1 in { } } +// Section A.11 - DONE and RETRY +// Section A.47 - SAVED and RESTORED +let Predicates = [HasV9], rs1 = 0, rs2 = 0 in { + let rd = 0 in + def DONE : F3_1<2, 0b111110, (outs), (ins), "done", []>; + + let rd = 1 in + def RETRY : F3_1<2, 0b111110, (outs), (ins), "retry", []>; + + let rd = 0 in + def SAVED : F3_1<2, 0b110001, (outs), (ins), "saved", []>; + + let rd = 1 in + def RESTORED : F3_1<2, 0b110001, (outs), (ins), "restored", []>; +} + // Section A.42 - Prefetch Data let Predicates = [HasV9] in { def PREFETCHr : F3_1<3, 0b101101, diff --git a/llvm/test/MC/Disassembler/Sparc/sparc-v9.txt b/llvm/test/MC/Disassembler/Sparc/sparc-v9.txt index 6545ce9..612003a 100644 --- a/llvm/test/MC/Disassembler/Sparc/sparc-v9.txt +++ b/llvm/test/MC/Disassembler/Sparc/sparc-v9.txt @@ -137,3 +137,15 @@ # CHECK: prefetch [%i1+%i2], 1 0xc3,0x6e,0x40,0x1a + +# CHECK: done +0x81,0xf0,0x00,0x00 + +# CHECK: retry +0x83,0xf0,0x00,0x00 + +# CHECK: saved +0x81,0x88,0x00,0x00 + +# CHECK: restored +0x83,0x88,0x00,0x00 diff --git a/llvm/test/MC/Sparc/sparcv9-instructions.s b/llvm/test/MC/Sparc/sparcv9-instructions.s index a60d628..a029219 100644 --- a/llvm/test/MC/Sparc/sparcv9-instructions.s +++ b/llvm/test/MC/Sparc/sparcv9-instructions.s @@ -433,3 +433,20 @@ ! V8-NEXT: prefetch [ %i1 + %i2 ], 1 ! V9: prefetch [%i1+%i2], 1 ! encoding: [0xc3,0x6e,0x40,0x1a] prefetch [ %i1 + %i2 ], 1 + + ! V8: error: instruction requires a CPU feature not currently enabled + ! V8-NEXT: done + ! V9: done ! encoding: [0x81,0xf0,0x00,0x00] + done + ! V8: error: instruction requires a CPU feature not currently enabled + ! V8-NEXT: retry + ! V9: retry ! encoding: [0x83,0xf0,0x00,0x00] + retry + ! V8: error: instruction requires a CPU feature not currently enabled + ! V8-NEXT: saved + ! V9: saved ! encoding: [0x81,0x88,0x00,0x00] + saved + ! V8: error: instruction requires a CPU feature not currently enabled + ! V8-NEXT: restored + ! V9: restored ! encoding: [0x83,0x88,0x00,0x00] + restored -- 2.7.4