From 17bc995388f4c01d6bd5ac7aa24848c2d269c476 Mon Sep 17 00:00:00 2001 From: Jonathan Roelofs Date: Thu, 2 Apr 2020 16:28:32 -0600 Subject: [PATCH] [llvm] Fix more missing FileCheck directive colons --- llvm/test/CodeGen/AMDGPU/branch-relaxation.ll | 2 +- llvm/test/CodeGen/AMDGPU/salu-to-valu.ll | 2 +- llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/llvm/test/CodeGen/AMDGPU/branch-relaxation.ll b/llvm/test/CodeGen/AMDGPU/branch-relaxation.ll index 3c7ad44..8c6b94d 100644 --- a/llvm/test/CodeGen/AMDGPU/branch-relaxation.ll +++ b/llvm/test/CodeGen/AMDGPU/branch-relaxation.ll @@ -289,7 +289,7 @@ bb4: ; GCN-NEXT: s_sub_u32 s[[PC_LO]], s[[PC_LO]], ([[LONGBB]]+4)-[[LOOP]] ; GCN-NEXT: s_subb_u32 s[[PC_HI]], s[[PC_HI]], 0{{$}} ; GCN-NEXT: s_setpc_b64 s{{\[}}[[PC_LO]]:[[PC_HI]]{{\]}} -; GCN-NEXT .Lfunc_end{{[0-9]+}}: +; GCN-NEXT: .Lfunc_end{{[0-9]+}}: define amdgpu_kernel void @uniform_unconditional_min_long_backward_branch(i32 addrspace(1)* %arg, i32 %arg1) { entry: br label %loop diff --git a/llvm/test/CodeGen/AMDGPU/salu-to-valu.ll b/llvm/test/CodeGen/AMDGPU/salu-to-valu.ll index c8c6060..14635ab 100644 --- a/llvm/test/CodeGen/AMDGPU/salu-to-valu.ll +++ b/llvm/test/CodeGen/AMDGPU/salu-to-valu.ll @@ -265,7 +265,7 @@ entry: ; GCN-LABEL: {{^}}smrd_valu2_max_smrd_offset: ; GCN-NOHSA: buffer_load_dword v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:1020{{$}} -; GCN-HSA flat_load_dword v{{[0-9]}}, v{{[0-9]+:[0-9]+}} +; GCN-HSA: flat_load_dword v{{[0-9]}}, v[{{[0-9]+:[0-9]+}}] define amdgpu_kernel void @smrd_valu2_max_smrd_offset(i32 addrspace(1)* %out, [1024 x i32] addrspace(4)* %in) #1 { entry: %tmp = call i32 @llvm.amdgcn.workitem.id.x() diff --git a/llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll b/llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll index 11d1ebd..cb4b5bd 100644 --- a/llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll +++ b/llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll @@ -243,7 +243,7 @@ define amdgpu_kernel void @max_256_vgprs_spill_9x32(<32 x float> addrspace(1)* % ; GFX900: buffer_store_dword v ; GFX900: buffer_load_dword v ; GFX908-FIXME-NOT: buffer_ -; GFX908-DAG v_accvgpr_read_b32 +; GFX908-DAG: v_accvgpr_read_b32 ; GCN: NumVgprs: 256 ; GFX900: ScratchSize: 708 -- 2.7.4