From 17ba6becaa981d4fad88d5a64277a51dee6382d8 Mon Sep 17 00:00:00 2001
From: Thomas Lively <tlively@google.com>
Date: Thu, 13 Sep 2018 02:50:57 +0000
Subject: [PATCH] Remove isAsCheapAsAMove from mem ops

llvm-svn: 342105
---
 llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
index 6bda0cb..dfad7db 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -26,7 +26,7 @@ multiclass ConstVec<ValueType vec_t, dag ops, dag pat, string args> {
                                   "v128.const\t"#args, 0>;
 }
 multiclass SIMDLoad<ValueType vec_t> {
-  let mayLoad = 1, isAsCheapAsAMove = 1 in
+  let mayLoad = 1 in
   defm LOAD_#vec_t :
     SIMD_I<(outs V128:$dst), (ins P2Align:$align, offset32_op:$off, I32:$addr),
            (outs), (ins P2Align:$align, offset32_op:$off), [],
@@ -34,7 +34,7 @@ multiclass SIMDLoad<ValueType vec_t> {
            "v128.load\t$off$align", 1>;
 }
 multiclass SIMDStore<ValueType vec_t> {
-  let mayStore = 1, isAsCheapAsAMove = 1 in
+  let mayStore = 1 in
   defm STORE_#vec_t :
     SIMD_I<(outs), (ins P2Align:$align, offset32_op:$off, I32:$addr, V128:$vec),
            (outs), (ins P2Align:$align, offset32_op:$off), [],
-- 
2.7.4