From 16bdc85b488dd2f9463a71d6aa09bdf5ea9a9978 Mon Sep 17 00:00:00 2001 From: Dario Binacchi Date: Mon, 13 Apr 2020 14:36:27 +0200 Subject: [PATCH] clk: set flags in the ccf registration routines The top-level framework flags are passed as parameter to the common clock framework (ccf) registration routines without being used. Checks of the flags setting added by the patch have been added in the ccf test. Signed-off-by: Dario Binacchi --- drivers/clk/clk-composite.c | 1 + drivers/clk/clk-divider.c | 1 + drivers/clk/clk-fixed-factor.c | 1 + drivers/clk/clk-gate.c | 1 + drivers/clk/clk-mux.c | 1 + drivers/clk/clk_sandbox_ccf.c | 3 ++- test/dm/clk_ccf.c | 7 +++++++ 7 files changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c index 819bfca..7e99c5b 100644 --- a/drivers/clk/clk-composite.c +++ b/drivers/clk/clk-composite.c @@ -145,6 +145,7 @@ struct clk *clk_register_composite(struct device *dev, const char *name, } clk = &composite->clk; + clk->flags = flags; ret = clk_register(clk, UBOOT_DM_CLK_COMPOSITE, name, parent_names[clk_composite_get_parent(clk)]); if (ret) { diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index 3465853..8f59d7f 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -212,6 +212,7 @@ static struct clk *_register_divider(struct device *dev, const char *name, /* register the clock */ clk = &div->clk; + clk->flags = flags; ret = clk_register(clk, UBOOT_DM_CLK_CCF_DIVIDER, name, parent_name); if (ret) { diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c index 0eb24b8..8d9823b 100644 --- a/drivers/clk/clk-fixed-factor.c +++ b/drivers/clk/clk-fixed-factor.c @@ -49,6 +49,7 @@ struct clk *clk_hw_register_fixed_factor(struct device *dev, fix->mult = mult; fix->div = div; clk = &fix->clk; + clk->flags = flags; ret = clk_register(clk, UBOOT_DM_CLK_IMX_FIXED_FACTOR, name, parent_name); diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c index 98e4b80..006d3b6 100644 --- a/drivers/clk/clk-gate.c +++ b/drivers/clk/clk-gate.c @@ -142,6 +142,7 @@ struct clk *clk_register_gate(struct device *dev, const char *name, #endif clk = &gate->clk; + clk->flags = flags; ret = clk_register(clk, UBOOT_DM_CLK_GATE, name, parent_name); if (ret) { diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c index 26991a5..679d66a 100644 --- a/drivers/clk/clk-mux.c +++ b/drivers/clk/clk-mux.c @@ -185,6 +185,7 @@ struct clk *clk_hw_register_mux_table(struct device *dev, const char *name, #endif clk = &mux->clk; + clk->flags = flags; /* * Read the current mux setup - so we assign correct parent. diff --git a/drivers/clk/clk_sandbox_ccf.c b/drivers/clk/clk_sandbox_ccf.c index e90b860..fedcdd4 100644 --- a/drivers/clk/clk_sandbox_ccf.c +++ b/drivers/clk/clk_sandbox_ccf.c @@ -130,6 +130,7 @@ struct clk *sandbox_clk_register_gate2(struct device *dev, const char *name, gate->state = 0; clk = &gate->clk; + clk->flags = flags; ret = clk_register(clk, "sandbox_clk_gate2", name, parent_name); if (ret) { @@ -272,7 +273,7 @@ static int sandbox_clk_ccf_probe(struct udevice *dev) reg = BIT(28) | BIT(24) | BIT(16); clk_dm(SANDBOX_CLK_I2C, sandbox_clk_composite("i2c", i2c_sels, ARRAY_SIZE(i2c_sels), - ®, 0)); + ®, CLK_SET_RATE_UNGATE)); clk_dm(SANDBOX_CLK_I2C_ROOT, sandbox_clk_gate2("i2c_root", "i2c", base + 0x7c, 0)); diff --git a/test/dm/clk_ccf.c b/test/dm/clk_ccf.c index 960cb2d..242d2d7 100644 --- a/test/dm/clk_ccf.c +++ b/test/dm/clk_ccf.c @@ -30,11 +30,13 @@ static int dm_test_clk_ccf(struct unit_test_state *uts) ret = clk_get_by_id(SANDBOX_CLK_ECSPI_ROOT, &clk); ut_assertok(ret); ut_asserteq_str("ecspi_root", clk->dev->name); + ut_asserteq(CLK_SET_RATE_PARENT, clk->flags); /* Test for clk_get_parent_rate() */ ret = clk_get_by_id(SANDBOX_CLK_ECSPI1, &clk); ut_assertok(ret); ut_asserteq_str("ecspi1", clk->dev->name); + ut_asserteq(CLK_SET_RATE_PARENT, clk->flags); rate = clk_get_parent_rate(clk); ut_asserteq(rate, 20000000); @@ -43,6 +45,7 @@ static int dm_test_clk_ccf(struct unit_test_state *uts) ret = clk_get_by_id(SANDBOX_CLK_ECSPI0, &clk); ut_assertok(ret); ut_asserteq_str("ecspi0", clk->dev->name); + ut_asserteq(CLK_SET_RATE_PARENT, clk->flags); rate = clk_get_parent_rate(clk); ut_asserteq(rate, 20000000); @@ -51,6 +54,7 @@ static int dm_test_clk_ccf(struct unit_test_state *uts) ret = clk_get_by_id(SANDBOX_CLK_USDHC1_SEL, &clk); ut_assertok(ret); ut_asserteq_str("usdhc1_sel", clk->dev->name); + ut_asserteq(CLK_SET_RATE_NO_REPARENT, clk->flags); rate = clk_get_parent_rate(clk); ut_asserteq(rate, 60000000); @@ -58,17 +62,20 @@ static int dm_test_clk_ccf(struct unit_test_state *uts) ret = clk_get_by_id(SANDBOX_CLK_USDHC2_SEL, &clk); ut_assertok(ret); ut_asserteq_str("usdhc2_sel", clk->dev->name); + ut_asserteq(CLK_SET_RATE_NO_REPARENT, clk->flags); rate = clk_get_parent_rate(clk); ut_asserteq(rate, 80000000); pclk = clk_get_parent(clk); ut_asserteq_str("pll3_80m", pclk->dev->name); + ut_asserteq(CLK_SET_RATE_PARENT, pclk->flags); /* Test the composite of CCF */ ret = clk_get_by_id(SANDBOX_CLK_I2C, &clk); ut_assertok(ret); ut_asserteq_str("i2c", clk->dev->name); + ut_asserteq(CLK_SET_RATE_UNGATE, clk->flags); rate = clk_get_rate(clk); ut_asserteq(rate, 60000000); -- 2.7.4