From 162d9030abca31a12c14c4b1051da3143f6865ee Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Sat, 5 Nov 2022 12:33:43 -0700 Subject: [PATCH] GlobalISel: Pass through AA metadata for target memory intrinsics The corresponding change for the DAG was done in fa4aac7335ac7ecabbb634d134bd4897783bf62b --- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 3 ++- llvm/test/CodeGen/AMDGPU/target-mem-intrinsic-metadata.ll | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp index 69fb5bc..7faae09 100644 --- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -2481,7 +2481,8 @@ bool IRTranslator::translateCall(const User &U, MachineIRBuilder &MIRBuilder) { ? getLLTForMVT(Info.memVT.getSimpleVT()) : LLT::scalar(Info.memVT.getStoreSizeInBits()); MIB.addMemOperand(MF->getMachineMemOperand(MachinePointerInfo(Info.ptrVal), - Info.flags, MemTy, Alignment)); + Info.flags, MemTy, Alignment, + CI.getAAMetadata())); } return true; diff --git a/llvm/test/CodeGen/AMDGPU/target-mem-intrinsic-metadata.ll b/llvm/test/CodeGen/AMDGPU/target-mem-intrinsic-metadata.ll index a68be9c..9c6c8be 100644 --- a/llvm/test/CodeGen/AMDGPU/target-mem-intrinsic-metadata.ll +++ b/llvm/test/CodeGen/AMDGPU/target-mem-intrinsic-metadata.ll @@ -1,4 +1,5 @@ ; RUN: llc -global-isel=0 -march=amdgcn -mcpu=bonaire -stop-before=machine-scheduler < %s | FileCheck -enable-var-scope -check-prefixes=MIR %s +; RUN: llc -global-isel=1 -march=amdgcn -mcpu=bonaire -stop-before=machine-scheduler < %s | FileCheck -enable-var-scope -check-prefixes=MIR %s ; Make sure !noalias metadata is passed through from target intrinsics -- 2.7.4