From 160848d8ef96cf3a760c02cc576df7dbffc1f669 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 6 Sep 2011 12:26:42 -0700
Subject: [PATCH] i965/vs: Add a function for how many MRFs get written as part
 of a SEND.

This will be used for compute-to-mrf, which needs to know when MRFs
get overwritten.
---
 src/mesa/drivers/dri/i965/brw_vec4.cpp | 37 ++++++++++++++++++++++++++++++++++
 src/mesa/drivers/dri/i965/brw_vec4.h   |  2 ++
 2 files changed, 39 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 1f2cebe..9079ca1 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -43,6 +43,43 @@ vec4_instruction::is_math()
 	   opcode == SHADER_OPCODE_COS ||
 	   opcode == SHADER_OPCODE_POW);
 }
+/**
+ * Returns how many MRFs an opcode will write over.
+ *
+ * Note that this is not the 0 or 1 implied writes in an actual gen
+ * instruction -- the generate_* functions generate additional MOVs
+ * for setup.
+ */
+int
+vec4_visitor::implied_mrf_writes(vec4_instruction *inst)
+{
+   if (inst->mlen == 0)
+      return 0;
+
+   switch (inst->opcode) {
+   case SHADER_OPCODE_RCP:
+   case SHADER_OPCODE_RSQ:
+   case SHADER_OPCODE_SQRT:
+   case SHADER_OPCODE_EXP2:
+   case SHADER_OPCODE_LOG2:
+   case SHADER_OPCODE_SIN:
+   case SHADER_OPCODE_COS:
+      return 1;
+   case SHADER_OPCODE_POW:
+      return 2;
+   case VS_OPCODE_URB_WRITE:
+      return 1;
+   case VS_OPCODE_PULL_CONSTANT_LOAD:
+      return 2;
+   case VS_OPCODE_SCRATCH_READ:
+      return 2;
+   case VS_OPCODE_SCRATCH_WRITE:
+      return 3;
+   default:
+      assert(!"not reached");
+      return inst->mlen;
+   }
+}
 
 bool
 src_reg::equals(src_reg *r)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index 317c981..900c0a9 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -441,6 +441,8 @@ public:
    vec4_instruction *SCRATCH_READ(dst_reg dst, src_reg index);
    vec4_instruction *SCRATCH_WRITE(dst_reg dst, src_reg src, src_reg index);
 
+   int implied_mrf_writes(vec4_instruction *inst);
+
    bool try_rewrite_rhs_to_dst(ir_assignment *ir,
 			       dst_reg dst,
 			       src_reg src,
-- 
2.7.4