From 156d7d2df748fa12f1a2b3de502c12035ff8b3d6 Mon Sep 17 00:00:00 2001 From: Jay Foad Date: Mon, 27 Sep 2021 11:44:18 +0100 Subject: [PATCH] [LiveIntervals] Remove unused subreg ranges in repairIntervalsInRange If the old instructions mentioned a subreg that the new instructions do not, remove the subrange for that subreg. For example, in TwoAddressInstructionPass::eliminateRegSequence, if a use operand in the REG_SEQUENCE has the undef flag then we don't generate a copy for it so after the elimination there should be no live interval at all for the corresponding subreg of the def. This is a small step towards switching TwoAddressInstructionPass over from LiveVariables to LiveIntervals. Currently this path is only tested if you explicitly enable -early-live-intervals. Differential Revision: https://reviews.llvm.org/D110542 --- llvm/lib/CodeGen/LiveIntervals.cpp | 5 +++++ llvm/test/CodeGen/AMDGPU/dead-lane.mir | 1 + llvm/test/CodeGen/Thumb2/mve-sext-masked-load.ll | 1 + 3 files changed, 7 insertions(+) diff --git a/llvm/lib/CodeGen/LiveIntervals.cpp b/llvm/lib/CodeGen/LiveIntervals.cpp index a4dd71c..7bf21ac 100644 --- a/llvm/lib/CodeGen/LiveIntervals.cpp +++ b/llvm/lib/CodeGen/LiveIntervals.cpp @@ -1655,6 +1655,10 @@ void LiveIntervals::repairOldRegInRange(const MachineBasicBlock::iterator Begin, } } } + + bool isStartValid = getInstructionFromIndex(LII->start); + if (!isStartValid && LII->end.isDead()) + LR.removeSegment(*LII, true); } void @@ -1716,6 +1720,7 @@ LiveIntervals::repairIntervalsInRange(MachineBasicBlock *MBB, for (LiveInterval::SubRange &S : LI.subranges()) repairOldRegInRange(Begin, End, EndIdx, S, Reg, S.LaneMask); + LI.removeEmptySubRanges(); repairOldRegInRange(Begin, End, EndIdx, LI, Reg); } diff --git a/llvm/test/CodeGen/AMDGPU/dead-lane.mir b/llvm/test/CodeGen/AMDGPU/dead-lane.mir index 8e12265..a18e647 100644 --- a/llvm/test/CodeGen/AMDGPU/dead-lane.mir +++ b/llvm/test/CodeGen/AMDGPU/dead-lane.mir @@ -1,4 +1,5 @@ # RUN: llc -march=amdgcn -mcpu=tonga %s -start-before detect-dead-lanes -stop-before machine-scheduler -verify-machineinstrs -o - | FileCheck -check-prefix=GCN %s +# RUN: llc -march=amdgcn -mcpu=tonga %s -start-before detect-dead-lanes -stop-before machine-scheduler -verify-machineinstrs -early-live-intervals -o - | FileCheck -check-prefix=GCN %s # GCN-LABEL: name: dead_lane # GCN: bb.0: diff --git a/llvm/test/CodeGen/Thumb2/mve-sext-masked-load.ll b/llvm/test/CodeGen/Thumb2/mve-sext-masked-load.ll index bdf5fb2..7a62d6d 100644 --- a/llvm/test/CodeGen/Thumb2/mve-sext-masked-load.ll +++ b/llvm/test/CodeGen/Thumb2/mve-sext-masked-load.ll @@ -1,5 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp,+fp64 -verify-machineinstrs -o - %s | FileCheck %s +; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp,+fp64 -verify-machineinstrs -early-live-intervals -o - %s | FileCheck %s define arm_aapcs_vfpcc <4 x float> @foo_v4i16(<4 x i16>* nocapture readonly %pSrc, i32 %blockSize, <4 x i16> %a) { ; CHECK-LABEL: foo_v4i16: -- 2.7.4