From 15488ff24b4ae205f979be7248b38655acd82f9c Mon Sep 17 00:00:00 2001 From: Clement Courbet Date: Mon, 10 Feb 2020 11:27:53 +0100 Subject: [PATCH] [CodeGen] Fix the computation of the alignment of split stores. Summary: Right now the alignment of the lower half of a store is computed as align/2, which fails for unaligned stores (align = 1), and is overly pessimitic for, e.g. a 8 byte store aligned to 4 bytes. Fixes PR44851 Fixes PR44877 Reviewers: gchatelet, spatel, lebedev.ri Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D74311 --- llvm/lib/CodeGen/CodeGenPrepare.cpp | 13 +++++-- .../PowerPC/split-store-alignment.ll | 44 ++++++++++++++++++++-- .../CodeGenPrepare/X86/split-store-alignment.ll | 25 +++++++++++- 3 files changed, 74 insertions(+), 8 deletions(-) diff --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp b/llvm/lib/CodeGen/CodeGenPrepare.cpp index efcf7ba..ce758d6 100644 --- a/llvm/lib/CodeGen/CodeGenPrepare.cpp +++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp @@ -6864,12 +6864,19 @@ static bool splitMergedValStore(StoreInst &SI, const DataLayout &DL, Value *Addr = Builder.CreateBitCast( SI.getOperand(1), SplitStoreType->getPointerTo(SI.getPointerAddressSpace())); - if ((IsLE && Upper) || (!IsLE && !Upper)) + const bool IsOffsetStore = (IsLE && Upper) || (!IsLE && !Upper); + if (IsOffsetStore) Addr = Builder.CreateGEP( SplitStoreType, Addr, ConstantInt::get(Type::getInt32Ty(SI.getContext()), 1)); - Builder.CreateAlignedStore(V, Addr, - Upper ? SI.getAlign() / 2 : SI.getAlign()); + MaybeAlign Alignment = SI.getAlign(); + if (IsOffsetStore && Alignment) { + // When splitting the store in half, naturally one half will retain the + // alignment of the original wider store, regardless of whether it was + // over-aligned or not, while the other will require adjustment. + Alignment = commonAlignment(Alignment, HalfValBitSize / 8); + } + Builder.CreateAlignedStore(V, Addr, Alignment); }; CreateSplitStore(LValue, false); diff --git a/llvm/test/Transforms/CodeGenPrepare/PowerPC/split-store-alignment.ll b/llvm/test/Transforms/CodeGenPrepare/PowerPC/split-store-alignment.ll index 53cf743..5bc7d3a 100644 --- a/llvm/test/Transforms/CodeGenPrepare/PowerPC/split-store-alignment.ll +++ b/llvm/test/Transforms/CodeGenPrepare/PowerPC/split-store-alignment.ll @@ -2,6 +2,42 @@ ; RUN: opt -S -codegenprepare -mtriple=powerpc64-unknown-linux-gnu -data-layout="E-m:e-i64:64-n32:64" -force-split-store < %s | FileCheck --check-prefixes=ALL,BE %s ; RUN: opt -S -codegenprepare -mtriple=powerpc64le-unknown-linux-gnu -data-layout="e-m:e-i64:64-n32:64" -force-split-store < %s | FileCheck --check-prefixes=ALL,LE %s +define void @split_store_align1(float %x, i64* %p) { +; BE-LABEL: @split_store_align1( +; BE-NEXT: [[B:%.*]] = bitcast float [[X:%.*]] to i32 +; BE-NEXT: [[Z:%.*]] = zext i32 0 to i64 +; BE-NEXT: [[S:%.*]] = shl nuw nsw i64 [[Z]], 32 +; BE-NEXT: [[Z2:%.*]] = zext i32 [[B]] to i64 +; BE-NEXT: [[O:%.*]] = or i64 [[S]], [[Z2]] +; BE-NEXT: [[TMP1:%.*]] = bitcast i64* [[P:%.*]] to i32* +; BE-NEXT: [[TMP2:%.*]] = getelementptr i32, i32* [[TMP1]], i32 1 +; BE-NEXT: store i32 [[B]], i32* [[TMP2]], align 1 +; BE-NEXT: [[TMP3:%.*]] = bitcast i64* [[P]] to i32* +; BE-NEXT: store i32 0, i32* [[TMP3]], align 1 +; BE-NEXT: ret void +; +; LE-LABEL: @split_store_align1( +; LE-NEXT: [[B:%.*]] = bitcast float [[X:%.*]] to i32 +; LE-NEXT: [[Z:%.*]] = zext i32 0 to i64 +; LE-NEXT: [[S:%.*]] = shl nuw nsw i64 [[Z]], 32 +; LE-NEXT: [[Z2:%.*]] = zext i32 [[B]] to i64 +; LE-NEXT: [[O:%.*]] = or i64 [[S]], [[Z2]] +; LE-NEXT: [[TMP1:%.*]] = bitcast i64* [[P:%.*]] to i32* +; LE-NEXT: store i32 [[B]], i32* [[TMP1]], align 1 +; LE-NEXT: [[TMP2:%.*]] = bitcast i64* [[P]] to i32* +; LE-NEXT: [[TMP3:%.*]] = getelementptr i32, i32* [[TMP2]], i32 1 +; LE-NEXT: store i32 0, i32* [[TMP3]], align 1 +; LE-NEXT: ret void +; + %b = bitcast float %x to i32 + %z = zext i32 0 to i64 + %s = shl nuw nsw i64 %z, 32 + %z2 = zext i32 %b to i64 + %o = or i64 %s, %z2 + store i64 %o, i64* %p, align 1 + ret void +} + define void @split_store_align2(float %x, i64* %p) { ; BE-LABEL: @split_store_align2( ; BE-NEXT: [[B:%.*]] = bitcast float [[X:%.*]] to i32 @@ -13,7 +49,7 @@ define void @split_store_align2(float %x, i64* %p) { ; BE-NEXT: [[TMP2:%.*]] = getelementptr i32, i32* [[TMP1]], i32 1 ; BE-NEXT: store i32 [[B]], i32* [[TMP2]], align 2 ; BE-NEXT: [[TMP3:%.*]] = bitcast i64* [[P]] to i32* -; BE-NEXT: store i32 0, i32* [[TMP3]], align 1 +; BE-NEXT: store i32 0, i32* [[TMP3]], align 2 ; BE-NEXT: ret void ; ; LE-LABEL: @split_store_align2( @@ -26,7 +62,7 @@ define void @split_store_align2(float %x, i64* %p) { ; LE-NEXT: store i32 [[B]], i32* [[TMP1]], align 2 ; LE-NEXT: [[TMP2:%.*]] = bitcast i64* [[P]] to i32* ; LE-NEXT: [[TMP3:%.*]] = getelementptr i32, i32* [[TMP2]], i32 1 -; LE-NEXT: store i32 0, i32* [[TMP3]], align 1 +; LE-NEXT: store i32 0, i32* [[TMP3]], align 2 ; LE-NEXT: ret void ; %b = bitcast float %x to i32 @@ -47,9 +83,9 @@ define void @split_store_align8(float %x, i64* %p) { ; BE-NEXT: [[O:%.*]] = or i64 [[S]], [[Z2]] ; BE-NEXT: [[TMP1:%.*]] = bitcast i64* [[P:%.*]] to i32* ; BE-NEXT: [[TMP2:%.*]] = getelementptr i32, i32* [[TMP1]], i32 1 -; BE-NEXT: store i32 [[B]], i32* [[TMP2]], align 8 +; BE-NEXT: store i32 [[B]], i32* [[TMP2]], align 4 ; BE-NEXT: [[TMP3:%.*]] = bitcast i64* [[P]] to i32* -; BE-NEXT: store i32 0, i32* [[TMP3]], align 4 +; BE-NEXT: store i32 0, i32* [[TMP3]], align 8 ; BE-NEXT: ret void ; ; LE-LABEL: @split_store_align8( diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/split-store-alignment.ll b/llvm/test/Transforms/CodeGenPrepare/X86/split-store-alignment.ll index 7e0f512..7eb8cb8 100644 --- a/llvm/test/Transforms/CodeGenPrepare/X86/split-store-alignment.ll +++ b/llvm/test/Transforms/CodeGenPrepare/X86/split-store-alignment.ll @@ -4,6 +4,29 @@ target datalayout = "e-m:x-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:32-n8:16:32-a:0:32-S32" target triple = "i686-w64-windows-gnu" +define void @split_store_align1(float %x, i64* %p) { +; CHECK-LABEL: @split_store_align1( +; CHECK-NEXT: [[B:%.*]] = bitcast float [[X:%.*]] to i32 +; CHECK-NEXT: [[Z:%.*]] = zext i32 0 to i64 +; CHECK-NEXT: [[S:%.*]] = shl nuw nsw i64 [[Z]], 32 +; CHECK-NEXT: [[Z2:%.*]] = zext i32 [[B]] to i64 +; CHECK-NEXT: [[O:%.*]] = or i64 [[S]], [[Z2]] +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[P:%.*]] to i32* +; CHECK-NEXT: store i32 [[B]], i32* [[TMP1]], align 1 +; CHECK-NEXT: [[TMP2:%.*]] = bitcast i64* [[P]] to i32* +; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i32, i32* [[TMP2]], i32 1 +; CHECK-NEXT: store i32 0, i32* [[TMP3]], align 1 +; CHECK-NEXT: ret void +; + %b = bitcast float %x to i32 + %z = zext i32 0 to i64 + %s = shl nuw nsw i64 %z, 32 + %z2 = zext i32 %b to i64 + %o = or i64 %s, %z2 + store i64 %o, i64* %p, align 1 + ret void +} + define void @split_store_align2(float %x, i64* %p) { ; CHECK-LABEL: @split_store_align2( ; CHECK-NEXT: [[B:%.*]] = bitcast float [[X:%.*]] to i32 @@ -15,7 +38,7 @@ define void @split_store_align2(float %x, i64* %p) { ; CHECK-NEXT: store i32 [[B]], i32* [[TMP1]], align 2 ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i64* [[P]] to i32* ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i32, i32* [[TMP2]], i32 1 -; CHECK-NEXT: store i32 0, i32* [[TMP3]], align 1 +; CHECK-NEXT: store i32 0, i32* [[TMP3]], align 2 ; CHECK-NEXT: ret void ; %b = bitcast float %x to i32 -- 2.7.4