From 150e20db50a7d867e4af0f6147f6d517e5c83da8 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Wed, 29 Aug 2007 15:19:19 +0000 Subject: [PATCH] Suppress IP-relative only for fs: and gs: overrides AMD has (undocumented) segment limits even in 64-bit mode, so people may want to use cs/ds/es/ss overrides. Since there are no bases, however, IP-relative still applies. See: http://www.amd.com.hk/us-en/assets/content_type/DownloadableAssets/dwamd_kernel_summit_08_RB.pdf --- nasm.h | 2 +- parser.c | 5 +++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/nasm.h b/nasm.h index 4a0a6af..9bae66a 100644 --- a/nasm.h +++ b/nasm.h @@ -559,7 +559,7 @@ enum { /* special EA flags */ EAF_TIMESTWO = 4, /* really do EAX*2 not EAX+EAX */ EAF_REL = 8, /* IP-relative addressing */ EAF_ABS = 16, /* non-IP-relative addressing */ - EAF_SEGOVER = 32 /* segment override present */ + EAF_FSGS = 32 /* fs/gs segment override present */ }; enum { /* values for `hinttype' */ diff --git a/parser.c b/parser.c index e668055..f786c2c 100644 --- a/parser.c +++ b/parser.c @@ -515,7 +515,8 @@ insn *parse_line(int pass, char *buffer, insn * result, "instruction has more than %d prefixes", MAXPREFIX); else { result->prefixes[result->nprefix++] = value->type; - result->oprs[operand].eaflags |= EAF_SEGOVER; + if (REG_FSGS & ~reg_flags[value->type]) + result->oprs[operand].eaflags |= EAF_FSGS; } i = stdscan(NULL, &tokval); /* then skip the colon */ @@ -676,7 +677,7 @@ insn *parse_line(int pass, char *buffer, insn * result, int is_rel = globalbits == 64 && !(result->oprs[operand].eaflags & EAF_ABS) && ((globalrel && - !(result->oprs[operand].eaflags & EAF_SEGOVER)) || + !(result->oprs[operand].eaflags & EAF_FSGS)) || (result->oprs[operand].eaflags & EAF_REL)); result->oprs[operand].type |= is_rel ? IP_REL : MEM_OFFS; -- 2.7.4