From 14dc3b295953aa341f7b3b374c45064fbadb2790 Mon Sep 17 00:00:00 2001 From: Diana Picus Date: Fri, 14 Dec 2018 11:58:14 +0000 Subject: [PATCH] [ARM GlobalISel] Allow simple binary ops in Thumb2 Mark G_ADD, G_SUB, G_MUL, G_AND, G_OR and G_XOR as legal for both ARM and Thumb2. Extract the legalizer tests for these opcodes into another file. Add tests for the instruction selector. llvm-svn: 349142 --- llvm/lib/Target/ARM/ARMLegalizerInfo.cpp | 8 +- .../CodeGen/ARM/GlobalISel/arm-legalize-binops.mir | 561 +++++++++++++++++++++ llvm/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir | 558 -------------------- .../CodeGen/ARM/GlobalISel/thumb-select-binops.mir | 135 +++++ 4 files changed, 700 insertions(+), 562 deletions(-) create mode 100644 llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-binops.mir create mode 100644 llvm/test/CodeGen/ARM/GlobalISel/thumb-select-binops.mir diff --git a/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp b/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp index a8bfd03..06d838b 100644 --- a/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp +++ b/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp @@ -85,6 +85,10 @@ ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) { getActionDefinitionsBuilder({G_SEXT, G_ZEXT, G_ANYEXT}) .legalForCartesianProduct({s32}, {s1, s8, s16}); + getActionDefinitionsBuilder({G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR}) + .legalFor({s32}) + .minScalar(0, s32); + // We're keeping these builders around because we'll want to add support for // floating point to them. auto &LoadStoreBuilder = @@ -106,10 +110,6 @@ ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) { getActionDefinitionsBuilder(G_GLOBAL_VALUE).legalFor({p0}); getActionDefinitionsBuilder(G_FRAME_INDEX).legalFor({p0}); - getActionDefinitionsBuilder({G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR}) - .legalFor({s32}) - .minScalar(0, s32); - if (ST.hasDivideInARMMode()) getActionDefinitionsBuilder({G_SDIV, G_UDIV}) .legalFor({s32}) diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-binops.mir b/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-binops.mir new file mode 100644 index 0000000..51783ca --- /dev/null +++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-binops.mir @@ -0,0 +1,561 @@ +# RUN: llc -mtriple arm-- -run-pass=legalizer %s -o - | FileCheck %s +# RUN: llc -mtriple thumb-- -mattr=+v6t2 -run-pass=legalizer %s -o - | FileCheck %s +--- | + define void @test_add_s8() { ret void } + define void @test_add_s16() { ret void } + define void @test_add_s32() { ret void } + + define void @test_sub_s8() { ret void } + define void @test_sub_s16() { ret void } + define void @test_sub_s32() { ret void } + + define void @test_mul_s8() { ret void } + define void @test_mul_s16() { ret void } + define void @test_mul_s32() { ret void } + + define void @test_and_s8() { ret void } + define void @test_and_s16() { ret void } + define void @test_and_s32() { ret void } + + define void @test_or_s8() { ret void } + define void @test_or_s16() { ret void } + define void @test_or_s32() { ret void } + + define void @test_xor_s8() { ret void } + define void @test_xor_s16() { ret void } + define void @test_xor_s32() { ret void } +... +--- +name: test_add_s8 +# CHECK-LABEL: name: test_add_s8 +legalized: false +# CHECK: legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } + - { id: 3, class: _ } + - { id: 4, class: _ } + - { id: 5, class: _ } +body: | + bb.0: + liveins: $r0, $r1 + + %0(p0) = COPY $r0 + %1(s8) = G_LOAD %0 :: (load 1) + %2(p0) = COPY $r0 + %3(s8) = G_LOAD %2 :: (load 1) + %4(s8) = G_ADD %1, %3 + ; G_ADD with s8 should widen + ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_ADD {{%[0-9]+, %[0-9]+}} + ; CHECK: {{%[0-9]+}}:_(s32) = G_ADD {{%[0-9]+, %[0-9]+}} + ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_ADD {{%[0-9]+, %[0-9]+}} + %5(s32) = G_SEXT %4(s8) + $r0 = COPY %5(s32) + BX_RET 14, $noreg, implicit $r0 +... +--- +name: test_add_s16 +# CHECK-LABEL: name: test_add_s16 +legalized: false +# CHECK: legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } + - { id: 3, class: _ } + - { id: 4, class: _ } + - { id: 5, class: _ } +body: | + bb.0: + liveins: $r0, $r1 + + %0(p0) = COPY $r0 + %1(s16) = G_LOAD %0 :: (load 2) + %2(p0) = COPY $r0 + %3(s16) = G_LOAD %2 :: (load 2) + %4(s16) = G_ADD %1, %3 + ; G_ADD with s16 should widen + ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_ADD {{%[0-9]+, %[0-9]+}} + ; CHECK: {{%[0-9]+}}:_(s32) = G_ADD {{%[0-9]+, %[0-9]+}} + ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_ADD {{%[0-9]+, %[0-9]+}} + %5(s32) = G_SEXT %4(s16) + $r0 = COPY %5(s32) + BX_RET 14, $noreg, implicit $r0 +... +--- +name: test_add_s32 +# CHECK-LABEL: name: test_add_s32 +legalized: false +# CHECK: legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } +body: | + bb.0: + liveins: $r0, $r1 + + %0(s32) = COPY $r0 + %1(s32) = COPY $r1 + %2(s32) = G_ADD %0, %1 + ; G_ADD with s32 is legal, so we should find it unchanged in the output + ; CHECK: {{%[0-9]+}}:_(s32) = G_ADD {{%[0-9]+, %[0-9]+}} + $r0 = COPY %2(s32) + BX_RET 14, $noreg, implicit $r0 + +... +--- +name: test_sub_s8 +# CHECK-LABEL: name: test_sub_s8 +legalized: false +# CHECK: legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } + - { id: 3, class: _ } + - { id: 4, class: _ } + - { id: 5, class: _ } +body: | + bb.0: + liveins: $r0, $r1 + + %0(p0) = COPY $r0 + %1(s8) = G_LOAD %0 :: (load 1) + %2(p0) = COPY $r0 + %3(s8) = G_LOAD %2 :: (load 1) + %4(s8) = G_SUB %1, %3 + ; G_SUB with s8 should widen + ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_SUB {{%[0-9]+, %[0-9]+}} + ; CHECK: {{%[0-9]+}}:_(s32) = G_SUB {{%[0-9]+, %[0-9]+}} + ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_SUB {{%[0-9]+, %[0-9]+}} + %5(s32) = G_SEXT %4(s8) + $r0 = COPY %5(s32) + BX_RET 14, $noreg, implicit $r0 +... +--- +name: test_sub_s16 +# CHECK-LABEL: name: test_sub_s16 +legalized: false +# CHECK: legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } + - { id: 3, class: _ } + - { id: 4, class: _ } + - { id: 5, class: _ } +body: | + bb.0: + liveins: $r0, $r1 + + %0(p0) = COPY $r0 + %1(s16) = G_LOAD %0 :: (load 2) + %2(p0) = COPY $r0 + %3(s16) = G_LOAD %2 :: (load 2) + %4(s16) = G_SUB %1, %3 + ; G_SUB with s16 should widen + ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_SUB {{%[0-9]+, %[0-9]+}} + ; CHECK: {{%[0-9]+}}:_(s32) = G_SUB {{%[0-9]+, %[0-9]+}} + ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_SUB {{%[0-9]+, %[0-9]+}} + %5(s32) = G_SEXT %4(s16) + $r0 = COPY %5(s32) + BX_RET 14, $noreg, implicit $r0 +... +--- +name: test_sub_s32 +# CHECK-LABEL: name: test_sub_s32 +legalized: false +# CHECK: legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } +body: | + bb.0: + liveins: $r0, $r1 + + %0(s32) = COPY $r0 + %1(s32) = COPY $r1 + %2(s32) = G_SUB %0, %1 + ; G_SUB with s32 is legal, so we should find it unchanged in the output + ; CHECK: {{%[0-9]+}}:_(s32) = G_SUB {{%[0-9]+, %[0-9]+}} + $r0 = COPY %2(s32) + BX_RET 14, $noreg, implicit $r0 + +... +--- +name: test_mul_s8 +# CHECK-LABEL: name: test_mul_s8 +legalized: false +# CHECK: legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } + - { id: 3, class: _ } + - { id: 4, class: _ } + - { id: 5, class: _ } +body: | + bb.0: + liveins: $r0, $r1 + + %0(p0) = COPY $r0 + %1(s8) = G_LOAD %0 :: (load 1) + %2(p0) = COPY $r0 + %3(s8) = G_LOAD %2 :: (load 1) + %4(s8) = G_MUL %1, %3 + ; G_MUL with s8 should widen + ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_MUL {{%[0-9]+, %[0-9]+}} + ; CHECK: {{%[0-9]+}}:_(s32) = G_MUL {{%[0-9]+, %[0-9]+}} + ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_MUL {{%[0-9]+, %[0-9]+}} + %5(s32) = G_SEXT %4(s8) + $r0 = COPY %5(s32) + BX_RET 14, $noreg, implicit $r0 +... +--- +name: test_mul_s16 +# CHECK-LABEL: name: test_mul_s16 +legalized: false +# CHECK: legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } + - { id: 3, class: _ } + - { id: 4, class: _ } + - { id: 5, class: _ } +body: | + bb.0: + liveins: $r0, $r1 + + %0(p0) = COPY $r0 + %1(s16) = G_LOAD %0 :: (load 2) + %2(p0) = COPY $r0 + %3(s16) = G_LOAD %2 :: (load 2) + %4(s16) = G_MUL %1, %3 + ; G_MUL with s16 should widen + ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_MUL {{%[0-9]+, %[0-9]+}} + ; CHECK: {{%[0-9]+}}:_(s32) = G_MUL {{%[0-9]+, %[0-9]+}} + ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_MUL {{%[0-9]+, %[0-9]+}} + %5(s32) = G_SEXT %4(s16) + $r0 = COPY %5(s32) + BX_RET 14, $noreg, implicit $r0 +... +--- +name: test_mul_s32 +# CHECK-LABEL: name: test_mul_s32 +legalized: false +# CHECK: legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } +body: | + bb.0: + liveins: $r0, $r1 + + %0(s32) = COPY $r0 + %1(s32) = COPY $r1 + %2(s32) = G_MUL %0, %1 + ; G_MUL with s32 is legal, so we should find it unchanged in the output + ; CHECK: {{%[0-9]+}}:_(s32) = G_MUL {{%[0-9]+, %[0-9]+}} + $r0 = COPY %2(s32) + BX_RET 14, $noreg, implicit $r0 + +... +--- +name: test_and_s8 +# CHECK-LABEL: name: test_and_s8 +legalized: false +# CHECK: legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } + - { id: 3, class: _ } + - { id: 4, class: _ } + - { id: 5, class: _ } +body: | + bb.0: + liveins: $r0, $r1 + + %0(p0) = COPY $r0 + %1(s8) = G_LOAD %0 :: (load 1) + %2(p0) = COPY $r0 + %3(s8) = G_LOAD %2 :: (load 1) + %4(s8) = G_AND %1, %3 + ; G_AND with s8 should widen + ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_AND {{%[0-9]+, %[0-9]+}} + ; CHECK: {{%[0-9]+}}:_(s32) = G_AND {{%[0-9]+, %[0-9]+}} + ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_AND {{%[0-9]+, %[0-9]+}} + %5(s32) = G_SEXT %4(s8) + $r0 = COPY %5(s32) + BX_RET 14, $noreg, implicit $r0 +... +--- +name: test_and_s16 +# CHECK-LABEL: name: test_and_s16 +legalized: false +# CHECK: legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } + - { id: 3, class: _ } + - { id: 4, class: _ } + - { id: 5, class: _ } +body: | + bb.0: + liveins: $r0, $r1 + + %0(p0) = COPY $r0 + %1(s16) = G_LOAD %0 :: (load 2) + %2(p0) = COPY $r0 + %3(s16) = G_LOAD %2 :: (load 2) + %4(s16) = G_AND %1, %3 + ; G_AND with s16 should widen + ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_AND {{%[0-9]+, %[0-9]+}} + ; CHECK: {{%[0-9]+}}:_(s32) = G_AND {{%[0-9]+, %[0-9]+}} + ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_AND {{%[0-9]+, %[0-9]+}} + %5(s32) = G_SEXT %4(s16) + $r0 = COPY %5(s32) + BX_RET 14, $noreg, implicit $r0 +... +--- +name: test_and_s32 +# CHECK-LABEL: name: test_and_s32 +legalized: false +# CHECK: legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } +body: | + bb.0: + liveins: $r0, $r1 + + %0(s32) = COPY $r0 + %1(s32) = COPY $r1 + %2(s32) = G_AND %0, %1 + ; G_AND with s32 is legal, so we should find it unchanged in the output + ; CHECK: {{%[0-9]+}}:_(s32) = G_AND {{%[0-9]+, %[0-9]+}} + $r0 = COPY %2(s32) + BX_RET 14, $noreg, implicit $r0 + +... +--- +name: test_or_s8 +# CHECK-LABEL: name: test_or_s8 +legalized: false +# CHECK: legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } + - { id: 3, class: _ } + - { id: 4, class: _ } + - { id: 5, class: _ } +body: | + bb.0: + liveins: $r0, $r1 + + %0(p0) = COPY $r0 + %1(s8) = G_LOAD %0 :: (load 1) + %2(p0) = COPY $r0 + %3(s8) = G_LOAD %2 :: (load 1) + %4(s8) = G_OR %1, %3 + ; G_OR with s8 should widen + ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_OR {{%[0-9]+, %[0-9]+}} + ; CHECK: {{%[0-9]+}}:_(s32) = G_OR {{%[0-9]+, %[0-9]+}} + ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_OR {{%[0-9]+, %[0-9]+}} + %5(s32) = G_SEXT %4(s8) + $r0 = COPY %5(s32) + BX_RET 14, $noreg, implicit $r0 +... +--- +name: test_or_s16 +# CHECK-LABEL: name: test_or_s16 +legalized: false +# CHECK: legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } + - { id: 3, class: _ } + - { id: 4, class: _ } + - { id: 5, class: _ } +body: | + bb.0: + liveins: $r0, $r1 + + %0(p0) = COPY $r0 + %1(s16) = G_LOAD %0 :: (load 2) + %2(p0) = COPY $r0 + %3(s16) = G_LOAD %2 :: (load 2) + %4(s16) = G_OR %1, %3 + ; G_OR with s16 should widen + ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_OR {{%[0-9]+, %[0-9]+}} + ; CHECK: {{%[0-9]+}}:_(s32) = G_OR {{%[0-9]+, %[0-9]+}} + ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_OR {{%[0-9]+, %[0-9]+}} + %5(s32) = G_SEXT %4(s16) + $r0 = COPY %5(s32) + BX_RET 14, $noreg, implicit $r0 +... +--- +name: test_or_s32 +# CHECK-LABEL: name: test_or_s32 +legalized: false +# CHECK: legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } +body: | + bb.0: + liveins: $r0, $r1 + + %0(s32) = COPY $r0 + %1(s32) = COPY $r1 + %2(s32) = G_OR %0, %1 + ; G_OR with s32 is legal, so we should find it unchanged in the output + ; CHECK: {{%[0-9]+}}:_(s32) = G_OR {{%[0-9]+, %[0-9]+}} + $r0 = COPY %2(s32) + BX_RET 14, $noreg, implicit $r0 + +... +--- +name: test_xor_s8 +# CHECK-LABEL: name: test_xor_s8 +legalized: false +# CHECK: legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } + - { id: 3, class: _ } + - { id: 4, class: _ } + - { id: 5, class: _ } +body: | + bb.0: + liveins: $r0, $r1 + + %0(p0) = COPY $r0 + %1(s8) = G_LOAD %0 :: (load 1) + %2(p0) = COPY $r0 + %3(s8) = G_LOAD %2 :: (load 1) + %4(s8) = G_XOR %1, %3 + ; G_XOR with s8 should widen + ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_XOR {{%[0-9]+, %[0-9]+}} + ; CHECK: {{%[0-9]+}}:_(s32) = G_XOR {{%[0-9]+, %[0-9]+}} + ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_XOR {{%[0-9]+, %[0-9]+}} + %5(s32) = G_SEXT %4(s8) + $r0 = COPY %5(s32) + BX_RET 14, $noreg, implicit $r0 +... +--- +name: test_xor_s16 +# CHECK-LABEL: name: test_xor_s16 +legalized: false +# CHECK: legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } + - { id: 3, class: _ } + - { id: 4, class: _ } + - { id: 5, class: _ } +body: | + bb.0: + liveins: $r0, $r1 + + %0(p0) = COPY $r0 + %1(s16) = G_LOAD %0 :: (load 2) + %2(p0) = COPY $r0 + %3(s16) = G_LOAD %2 :: (load 2) + %4(s16) = G_XOR %1, %3 + ; G_XOR with s16 should widen + ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_XOR {{%[0-9]+, %[0-9]+}} + ; CHECK: {{%[0-9]+}}:_(s32) = G_XOR {{%[0-9]+, %[0-9]+}} + ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_XOR {{%[0-9]+, %[0-9]+}} + %5(s32) = G_SEXT %4(s16) + $r0 = COPY %5(s32) + BX_RET 14, $noreg, implicit $r0 +... +--- +name: test_xor_s32 +# CHECK-LABEL: name: test_xor_s32 +legalized: false +# CHECK: legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } +body: | + bb.0: + liveins: $r0, $r1 + + %0(s32) = COPY $r0 + %1(s32) = COPY $r1 + %2(s32) = G_XOR %0, %1 + ; G_XOR with s32 is legal, so we should find it unchanged in the output + ; CHECK: {{%[0-9]+}}:_(s32) = G_XOR {{%[0-9]+, %[0-9]+}} + $r0 = COPY %2(s32) + BX_RET 14, $noreg, implicit $r0 + +... diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir b/llvm/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir index a95e8d4..c4db9a7 100644 --- a/llvm/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir +++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir @@ -6,30 +6,6 @@ define void @test_inttoptr_s32() { ret void } define void @test_ptrtoint_s32() { ret void } - define void @test_add_s8() { ret void } - define void @test_add_s16() { ret void } - define void @test_add_s32() { ret void } - - define void @test_sub_s8() { ret void } - define void @test_sub_s16() { ret void } - define void @test_sub_s32() { ret void } - - define void @test_mul_s8() { ret void } - define void @test_mul_s16() { ret void } - define void @test_mul_s32() { ret void } - - define void @test_and_s8() { ret void } - define void @test_and_s16() { ret void } - define void @test_and_s32() { ret void } - - define void @test_or_s8() { ret void } - define void @test_or_s16() { ret void } - define void @test_or_s32() { ret void } - - define void @test_xor_s8() { ret void } - define void @test_xor_s16() { ret void } - define void @test_xor_s32() { ret void } - define void @test_lshr_s32() { ret void } define void @test_ashr_s32() { ret void } define void @test_shl_s32() { ret void } @@ -153,540 +129,6 @@ body: | BX_RET 14, $noreg, implicit $r0 ... --- -name: test_add_s8 -# CHECK-LABEL: name: test_add_s8 -legalized: false -# CHECK: legalized: true -regBankSelected: false -selected: false -tracksRegLiveness: true -registers: - - { id: 0, class: _ } - - { id: 1, class: _ } - - { id: 2, class: _ } - - { id: 3, class: _ } - - { id: 4, class: _ } - - { id: 5, class: _ } -body: | - bb.0: - liveins: $r0, $r1 - - %0(p0) = COPY $r0 - %1(s8) = G_LOAD %0 :: (load 1) - %2(p0) = COPY $r0 - %3(s8) = G_LOAD %2 :: (load 1) - %4(s8) = G_ADD %1, %3 - ; G_ADD with s8 should widen - ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_ADD {{%[0-9]+, %[0-9]+}} - ; CHECK: {{%[0-9]+}}:_(s32) = G_ADD {{%[0-9]+, %[0-9]+}} - ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_ADD {{%[0-9]+, %[0-9]+}} - %5(s32) = G_SEXT %4(s8) - $r0 = COPY %5(s32) - BX_RET 14, $noreg, implicit $r0 -... ---- -name: test_add_s16 -# CHECK-LABEL: name: test_add_s16 -legalized: false -# CHECK: legalized: true -regBankSelected: false -selected: false -tracksRegLiveness: true -registers: - - { id: 0, class: _ } - - { id: 1, class: _ } - - { id: 2, class: _ } - - { id: 3, class: _ } - - { id: 4, class: _ } - - { id: 5, class: _ } -body: | - bb.0: - liveins: $r0, $r1 - - %0(p0) = COPY $r0 - %1(s16) = G_LOAD %0 :: (load 2) - %2(p0) = COPY $r0 - %3(s16) = G_LOAD %2 :: (load 2) - %4(s16) = G_ADD %1, %3 - ; G_ADD with s16 should widen - ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_ADD {{%[0-9]+, %[0-9]+}} - ; CHECK: {{%[0-9]+}}:_(s32) = G_ADD {{%[0-9]+, %[0-9]+}} - ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_ADD {{%[0-9]+, %[0-9]+}} - %5(s32) = G_SEXT %4(s16) - $r0 = COPY %5(s32) - BX_RET 14, $noreg, implicit $r0 -... ---- -name: test_add_s32 -# CHECK-LABEL: name: test_add_s32 -legalized: false -# CHECK: legalized: true -regBankSelected: false -selected: false -tracksRegLiveness: true -registers: - - { id: 0, class: _ } - - { id: 1, class: _ } - - { id: 2, class: _ } -body: | - bb.0: - liveins: $r0, $r1 - - %0(s32) = COPY $r0 - %1(s32) = COPY $r1 - %2(s32) = G_ADD %0, %1 - ; G_ADD with s32 is legal, so we should find it unchanged in the output - ; CHECK: {{%[0-9]+}}:_(s32) = G_ADD {{%[0-9]+, %[0-9]+}} - $r0 = COPY %2(s32) - BX_RET 14, $noreg, implicit $r0 - -... ---- -name: test_sub_s8 -# CHECK-LABEL: name: test_sub_s8 -legalized: false -# CHECK: legalized: true -regBankSelected: false -selected: false -tracksRegLiveness: true -registers: - - { id: 0, class: _ } - - { id: 1, class: _ } - - { id: 2, class: _ } - - { id: 3, class: _ } - - { id: 4, class: _ } - - { id: 5, class: _ } -body: | - bb.0: - liveins: $r0, $r1 - - %0(p0) = COPY $r0 - %1(s8) = G_LOAD %0 :: (load 1) - %2(p0) = COPY $r0 - %3(s8) = G_LOAD %2 :: (load 1) - %4(s8) = G_SUB %1, %3 - ; G_SUB with s8 should widen - ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_SUB {{%[0-9]+, %[0-9]+}} - ; CHECK: {{%[0-9]+}}:_(s32) = G_SUB {{%[0-9]+, %[0-9]+}} - ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_SUB {{%[0-9]+, %[0-9]+}} - %5(s32) = G_SEXT %4(s8) - $r0 = COPY %5(s32) - BX_RET 14, $noreg, implicit $r0 -... ---- -name: test_sub_s16 -# CHECK-LABEL: name: test_sub_s16 -legalized: false -# CHECK: legalized: true -regBankSelected: false -selected: false -tracksRegLiveness: true -registers: - - { id: 0, class: _ } - - { id: 1, class: _ } - - { id: 2, class: _ } - - { id: 3, class: _ } - - { id: 4, class: _ } - - { id: 5, class: _ } -body: | - bb.0: - liveins: $r0, $r1 - - %0(p0) = COPY $r0 - %1(s16) = G_LOAD %0 :: (load 2) - %2(p0) = COPY $r0 - %3(s16) = G_LOAD %2 :: (load 2) - %4(s16) = G_SUB %1, %3 - ; G_SUB with s16 should widen - ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_SUB {{%[0-9]+, %[0-9]+}} - ; CHECK: {{%[0-9]+}}:_(s32) = G_SUB {{%[0-9]+, %[0-9]+}} - ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_SUB {{%[0-9]+, %[0-9]+}} - %5(s32) = G_SEXT %4(s16) - $r0 = COPY %5(s32) - BX_RET 14, $noreg, implicit $r0 -... ---- -name: test_sub_s32 -# CHECK-LABEL: name: test_sub_s32 -legalized: false -# CHECK: legalized: true -regBankSelected: false -selected: false -tracksRegLiveness: true -registers: - - { id: 0, class: _ } - - { id: 1, class: _ } - - { id: 2, class: _ } -body: | - bb.0: - liveins: $r0, $r1 - - %0(s32) = COPY $r0 - %1(s32) = COPY $r1 - %2(s32) = G_SUB %0, %1 - ; G_SUB with s32 is legal, so we should find it unchanged in the output - ; CHECK: {{%[0-9]+}}:_(s32) = G_SUB {{%[0-9]+, %[0-9]+}} - $r0 = COPY %2(s32) - BX_RET 14, $noreg, implicit $r0 - -... ---- -name: test_mul_s8 -# CHECK-LABEL: name: test_mul_s8 -legalized: false -# CHECK: legalized: true -regBankSelected: false -selected: false -tracksRegLiveness: true -registers: - - { id: 0, class: _ } - - { id: 1, class: _ } - - { id: 2, class: _ } - - { id: 3, class: _ } - - { id: 4, class: _ } - - { id: 5, class: _ } -body: | - bb.0: - liveins: $r0, $r1 - - %0(p0) = COPY $r0 - %1(s8) = G_LOAD %0 :: (load 1) - %2(p0) = COPY $r0 - %3(s8) = G_LOAD %2 :: (load 1) - %4(s8) = G_MUL %1, %3 - ; G_MUL with s8 should widen - ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_MUL {{%[0-9]+, %[0-9]+}} - ; CHECK: {{%[0-9]+}}:_(s32) = G_MUL {{%[0-9]+, %[0-9]+}} - ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_MUL {{%[0-9]+, %[0-9]+}} - %5(s32) = G_SEXT %4(s8) - $r0 = COPY %5(s32) - BX_RET 14, $noreg, implicit $r0 -... ---- -name: test_mul_s16 -# CHECK-LABEL: name: test_mul_s16 -legalized: false -# CHECK: legalized: true -regBankSelected: false -selected: false -tracksRegLiveness: true -registers: - - { id: 0, class: _ } - - { id: 1, class: _ } - - { id: 2, class: _ } - - { id: 3, class: _ } - - { id: 4, class: _ } - - { id: 5, class: _ } -body: | - bb.0: - liveins: $r0, $r1 - - %0(p0) = COPY $r0 - %1(s16) = G_LOAD %0 :: (load 2) - %2(p0) = COPY $r0 - %3(s16) = G_LOAD %2 :: (load 2) - %4(s16) = G_MUL %1, %3 - ; G_MUL with s16 should widen - ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_MUL {{%[0-9]+, %[0-9]+}} - ; CHECK: {{%[0-9]+}}:_(s32) = G_MUL {{%[0-9]+, %[0-9]+}} - ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_MUL {{%[0-9]+, %[0-9]+}} - %5(s32) = G_SEXT %4(s16) - $r0 = COPY %5(s32) - BX_RET 14, $noreg, implicit $r0 -... ---- -name: test_mul_s32 -# CHECK-LABEL: name: test_mul_s32 -legalized: false -# CHECK: legalized: true -regBankSelected: false -selected: false -tracksRegLiveness: true -registers: - - { id: 0, class: _ } - - { id: 1, class: _ } - - { id: 2, class: _ } -body: | - bb.0: - liveins: $r0, $r1 - - %0(s32) = COPY $r0 - %1(s32) = COPY $r1 - %2(s32) = G_MUL %0, %1 - ; G_MUL with s32 is legal, so we should find it unchanged in the output - ; CHECK: {{%[0-9]+}}:_(s32) = G_MUL {{%[0-9]+, %[0-9]+}} - $r0 = COPY %2(s32) - BX_RET 14, $noreg, implicit $r0 - -... ---- -name: test_and_s8 -# CHECK-LABEL: name: test_and_s8 -legalized: false -# CHECK: legalized: true -regBankSelected: false -selected: false -tracksRegLiveness: true -registers: - - { id: 0, class: _ } - - { id: 1, class: _ } - - { id: 2, class: _ } - - { id: 3, class: _ } - - { id: 4, class: _ } - - { id: 5, class: _ } -body: | - bb.0: - liveins: $r0, $r1 - - %0(p0) = COPY $r0 - %1(s8) = G_LOAD %0 :: (load 1) - %2(p0) = COPY $r0 - %3(s8) = G_LOAD %2 :: (load 1) - %4(s8) = G_AND %1, %3 - ; G_AND with s8 should widen - ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_AND {{%[0-9]+, %[0-9]+}} - ; CHECK: {{%[0-9]+}}:_(s32) = G_AND {{%[0-9]+, %[0-9]+}} - ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_AND {{%[0-9]+, %[0-9]+}} - %5(s32) = G_SEXT %4(s8) - $r0 = COPY %5(s32) - BX_RET 14, $noreg, implicit $r0 -... ---- -name: test_and_s16 -# CHECK-LABEL: name: test_and_s16 -legalized: false -# CHECK: legalized: true -regBankSelected: false -selected: false -tracksRegLiveness: true -registers: - - { id: 0, class: _ } - - { id: 1, class: _ } - - { id: 2, class: _ } - - { id: 3, class: _ } - - { id: 4, class: _ } - - { id: 5, class: _ } -body: | - bb.0: - liveins: $r0, $r1 - - %0(p0) = COPY $r0 - %1(s16) = G_LOAD %0 :: (load 2) - %2(p0) = COPY $r0 - %3(s16) = G_LOAD %2 :: (load 2) - %4(s16) = G_AND %1, %3 - ; G_AND with s16 should widen - ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_AND {{%[0-9]+, %[0-9]+}} - ; CHECK: {{%[0-9]+}}:_(s32) = G_AND {{%[0-9]+, %[0-9]+}} - ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_AND {{%[0-9]+, %[0-9]+}} - %5(s32) = G_SEXT %4(s16) - $r0 = COPY %5(s32) - BX_RET 14, $noreg, implicit $r0 -... ---- -name: test_and_s32 -# CHECK-LABEL: name: test_and_s32 -legalized: false -# CHECK: legalized: true -regBankSelected: false -selected: false -tracksRegLiveness: true -registers: - - { id: 0, class: _ } - - { id: 1, class: _ } - - { id: 2, class: _ } -body: | - bb.0: - liveins: $r0, $r1 - - %0(s32) = COPY $r0 - %1(s32) = COPY $r1 - %2(s32) = G_AND %0, %1 - ; G_AND with s32 is legal, so we should find it unchanged in the output - ; CHECK: {{%[0-9]+}}:_(s32) = G_AND {{%[0-9]+, %[0-9]+}} - $r0 = COPY %2(s32) - BX_RET 14, $noreg, implicit $r0 - -... ---- -name: test_or_s8 -# CHECK-LABEL: name: test_or_s8 -legalized: false -# CHECK: legalized: true -regBankSelected: false -selected: false -tracksRegLiveness: true -registers: - - { id: 0, class: _ } - - { id: 1, class: _ } - - { id: 2, class: _ } - - { id: 3, class: _ } - - { id: 4, class: _ } - - { id: 5, class: _ } -body: | - bb.0: - liveins: $r0, $r1 - - %0(p0) = COPY $r0 - %1(s8) = G_LOAD %0 :: (load 1) - %2(p0) = COPY $r0 - %3(s8) = G_LOAD %2 :: (load 1) - %4(s8) = G_OR %1, %3 - ; G_OR with s8 should widen - ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_OR {{%[0-9]+, %[0-9]+}} - ; CHECK: {{%[0-9]+}}:_(s32) = G_OR {{%[0-9]+, %[0-9]+}} - ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_OR {{%[0-9]+, %[0-9]+}} - %5(s32) = G_SEXT %4(s8) - $r0 = COPY %5(s32) - BX_RET 14, $noreg, implicit $r0 -... ---- -name: test_or_s16 -# CHECK-LABEL: name: test_or_s16 -legalized: false -# CHECK: legalized: true -regBankSelected: false -selected: false -tracksRegLiveness: true -registers: - - { id: 0, class: _ } - - { id: 1, class: _ } - - { id: 2, class: _ } - - { id: 3, class: _ } - - { id: 4, class: _ } - - { id: 5, class: _ } -body: | - bb.0: - liveins: $r0, $r1 - - %0(p0) = COPY $r0 - %1(s16) = G_LOAD %0 :: (load 2) - %2(p0) = COPY $r0 - %3(s16) = G_LOAD %2 :: (load 2) - %4(s16) = G_OR %1, %3 - ; G_OR with s16 should widen - ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_OR {{%[0-9]+, %[0-9]+}} - ; CHECK: {{%[0-9]+}}:_(s32) = G_OR {{%[0-9]+, %[0-9]+}} - ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_OR {{%[0-9]+, %[0-9]+}} - %5(s32) = G_SEXT %4(s16) - $r0 = COPY %5(s32) - BX_RET 14, $noreg, implicit $r0 -... ---- -name: test_or_s32 -# CHECK-LABEL: name: test_or_s32 -legalized: false -# CHECK: legalized: true -regBankSelected: false -selected: false -tracksRegLiveness: true -registers: - - { id: 0, class: _ } - - { id: 1, class: _ } - - { id: 2, class: _ } -body: | - bb.0: - liveins: $r0, $r1 - - %0(s32) = COPY $r0 - %1(s32) = COPY $r1 - %2(s32) = G_OR %0, %1 - ; G_OR with s32 is legal, so we should find it unchanged in the output - ; CHECK: {{%[0-9]+}}:_(s32) = G_OR {{%[0-9]+, %[0-9]+}} - $r0 = COPY %2(s32) - BX_RET 14, $noreg, implicit $r0 - -... ---- -name: test_xor_s8 -# CHECK-LABEL: name: test_xor_s8 -legalized: false -# CHECK: legalized: true -regBankSelected: false -selected: false -tracksRegLiveness: true -registers: - - { id: 0, class: _ } - - { id: 1, class: _ } - - { id: 2, class: _ } - - { id: 3, class: _ } - - { id: 4, class: _ } - - { id: 5, class: _ } -body: | - bb.0: - liveins: $r0, $r1 - - %0(p0) = COPY $r0 - %1(s8) = G_LOAD %0 :: (load 1) - %2(p0) = COPY $r0 - %3(s8) = G_LOAD %2 :: (load 1) - %4(s8) = G_XOR %1, %3 - ; G_XOR with s8 should widen - ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_XOR {{%[0-9]+, %[0-9]+}} - ; CHECK: {{%[0-9]+}}:_(s32) = G_XOR {{%[0-9]+, %[0-9]+}} - ; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_XOR {{%[0-9]+, %[0-9]+}} - %5(s32) = G_SEXT %4(s8) - $r0 = COPY %5(s32) - BX_RET 14, $noreg, implicit $r0 -... ---- -name: test_xor_s16 -# CHECK-LABEL: name: test_xor_s16 -legalized: false -# CHECK: legalized: true -regBankSelected: false -selected: false -tracksRegLiveness: true -registers: - - { id: 0, class: _ } - - { id: 1, class: _ } - - { id: 2, class: _ } - - { id: 3, class: _ } - - { id: 4, class: _ } - - { id: 5, class: _ } -body: | - bb.0: - liveins: $r0, $r1 - - %0(p0) = COPY $r0 - %1(s16) = G_LOAD %0 :: (load 2) - %2(p0) = COPY $r0 - %3(s16) = G_LOAD %2 :: (load 2) - %4(s16) = G_XOR %1, %3 - ; G_XOR with s16 should widen - ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_XOR {{%[0-9]+, %[0-9]+}} - ; CHECK: {{%[0-9]+}}:_(s32) = G_XOR {{%[0-9]+, %[0-9]+}} - ; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_XOR {{%[0-9]+, %[0-9]+}} - %5(s32) = G_SEXT %4(s16) - $r0 = COPY %5(s32) - BX_RET 14, $noreg, implicit $r0 -... ---- -name: test_xor_s32 -# CHECK-LABEL: name: test_xor_s32 -legalized: false -# CHECK: legalized: true -regBankSelected: false -selected: false -tracksRegLiveness: true -registers: - - { id: 0, class: _ } - - { id: 1, class: _ } - - { id: 2, class: _ } -body: | - bb.0: - liveins: $r0, $r1 - - %0(s32) = COPY $r0 - %1(s32) = COPY $r1 - %2(s32) = G_XOR %0, %1 - ; G_XOR with s32 is legal, so we should find it unchanged in the output - ; CHECK: {{%[0-9]+}}:_(s32) = G_XOR {{%[0-9]+, %[0-9]+}} - $r0 = COPY %2(s32) - BX_RET 14, $noreg, implicit $r0 - -... ---- name: test_lshr_s32 # CHECK-LABEL: name: test_lshr_s32 legalized: false diff --git a/llvm/test/CodeGen/ARM/GlobalISel/thumb-select-binops.mir b/llvm/test/CodeGen/ARM/GlobalISel/thumb-select-binops.mir new file mode 100644 index 0000000..f71cc1c --- /dev/null +++ b/llvm/test/CodeGen/ARM/GlobalISel/thumb-select-binops.mir @@ -0,0 +1,135 @@ +# RUN: llc -O0 -mtriple thumb-- -mattr=+v6t2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s +--- | + define void @test_add_regs() { ret void } + + define void @test_mul() { ret void } + define void @test_mla() { ret void } + + define void @test_and_regs() { ret void } +... +--- +name: test_add_regs +# CHECK-LABEL: name: test_add_regs +legalized: true +regBankSelected: true +selected: false +# CHECK: selected: true +registers: + - { id: 0, class: gprb } + - { id: 1, class: gprb } + - { id: 2, class: gprb } +body: | + bb.0: + liveins: $r0, $r1 + + %0(s32) = COPY $r0 + ; CHECK: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0 + + %1(s32) = COPY $r1 + ; CHECK: [[VREGY:%[0-9]+]]:rgpr = COPY $r1 + + %2(s32) = G_ADD %0, %1 + ; CHECK: [[VREGRES:%[0-9]+]]:gprnopc = t2ADDrr [[VREGX]], [[VREGY]], 14, $noreg, $noreg + + $r0 = COPY %2(s32) + ; CHECK: $r0 = COPY [[VREGRES]] + + BX_RET 14, $noreg, implicit $r0 + ; CHECK: BX_RET 14, $noreg, implicit $r0 +... +--- +name: test_mul +# CHECK-LABEL: name: test_mul +legalized: true +regBankSelected: true +selected: false +# CHECK: selected: true +registers: + - { id: 0, class: gprb } + - { id: 1, class: gprb } + - { id: 2, class: gprb } +body: | + bb.0: + liveins: $r0, $r1 + + %0(s32) = COPY $r0 + ; CHECK: [[VREGX:%[0-9]+]]:rgpr = COPY $r0 + + %1(s32) = COPY $r1 + ; CHECK: [[VREGY:%[0-9]+]]:rgpr = COPY $r1 + + %2(s32) = G_MUL %0, %1 + ; CHECK: [[VREGRES:%[0-9]+]]:rgpr = t2MUL [[VREGX]], [[VREGY]], 14, $noreg + + $r0 = COPY %2(s32) + ; CHECK: $r0 = COPY [[VREGRES]] + + BX_RET 14, $noreg, implicit $r0 + ; CHECK: BX_RET 14, $noreg, implicit $r0 +... +--- +name: test_mla +# CHECK-LABEL: name: test_mla +legalized: true +regBankSelected: true +selected: false +# CHECK: selected: true +registers: + - { id: 0, class: gprb } + - { id: 1, class: gprb } + - { id: 2, class: gprb } + - { id: 3, class: gprb } + - { id: 4, class: gprb } +body: | + bb.0: + liveins: $r0, $r1, $r2 + + %0(s32) = COPY $r0 + ; CHECK: [[VREGX:%[0-9]+]]:rgpr = COPY $r0 + + %1(s32) = COPY $r1 + ; CHECK: [[VREGY:%[0-9]+]]:rgpr = COPY $r1 + + %2(s32) = COPY $r2 + ; CHECK: [[VREGZ:%[0-9]+]]:rgpr = COPY $r2 + + %3(s32) = G_MUL %0, %1 + %4(s32) = G_ADD %3, %2 + ; CHECK: [[VREGRES:%[0-9]+]]:rgpr = t2MLA [[VREGX]], [[VREGY]], [[VREGZ]], 14, $noreg + + $r0 = COPY %4(s32) + ; CHECK: $r0 = COPY [[VREGRES]] + + BX_RET 14, $noreg, implicit $r0 + ; CHECK: BX_RET 14, $noreg, implicit $r0 +... +--- +name: test_and_regs +# CHECK-LABEL: name: test_and_regs +legalized: true +regBankSelected: true +selected: false +# CHECK: selected: true +registers: + - { id: 0, class: gprb } + - { id: 1, class: gprb } + - { id: 2, class: gprb } +body: | + bb.0: + liveins: $r0, $r1 + + %0(s32) = COPY $r0 + ; CHECK: [[VREGX:%[0-9]+]]:rgpr = COPY $r0 + + %1(s32) = COPY $r1 + ; CHECK: [[VREGY:%[0-9]+]]:rgpr = COPY $r1 + + %2(s32) = G_AND %0, %1 + ; CHECK: [[VREGRES:%[0-9]+]]:rgpr = t2ANDrr [[VREGX]], [[VREGY]], 14, $noreg, $noreg + + $r0 = COPY %2(s32) + ; CHECK: $r0 = COPY [[VREGRES]] + + BX_RET 14, $noreg, implicit $r0 + ; CHECK: BX_RET 14, $noreg, implicit $r0 +... -- 2.7.4