From 14628aec8415e4847ae7e470b175412896716cd8 Mon Sep 17 00:00:00 2001 From: Alison Schofield Date: Sun, 4 Dec 2022 16:29:51 -0800 Subject: [PATCH] cxl/acpi: Fail decoder add if CXIMS for HBIG is missing The BIOS provided CXIMS (CXL XOR Interleave Math Structure) is required for calculating a targets position in an interleave list during region creation. The CXL driver expects to discover a CXIMS that matches the HBIG (Host Bridge Interleave Granularity) and stores the xormaps found in that CXIMS for retrieval during region creation. If there is no CXIMS for an HBIG, no maps are stored. That leads to a NULL pointer dereference at xormap retrieval during region creation. Add a check during ACPI probe for the case of no matching CXIMS. Emit an error message and fail to add the decoder. Fixes: f9db85bfec0d ("cxl/acpi: Support CXL XOR Interleave Math (CXIMS)") Suggested-by: Dan Williams Signed-off-by: Alison Schofield Reviewed-by: Dave Jiang Link: https://lore.kernel.org/r/20221205002951.1788783-1-alison.schofield@intel.com Signed-off-by: Dan Williams --- drivers/cxl/acpi.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c index 657ef25..420e322 100644 --- a/drivers/cxl/acpi.c +++ b/drivers/cxl/acpi.c @@ -282,6 +282,11 @@ static int cxl_parse_cfmws(union acpi_subtable_headers *header, void *arg, cxl_parse_cxims, &cxims_ctx); if (rc < 0) goto err_xormap; + if (!cxlrd->platform_data) { + dev_err(dev, "No CXIMS for HBIG %u\n", ig); + rc = -EINVAL; + goto err_xormap; + } } } rc = cxl_decoder_add(cxld, target_map); -- 2.7.4