From 137c6b3c7c63944a9cb51de0870b72f62d240f62 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 16 Jul 2013 16:45:37 +0200 Subject: [PATCH] clocksource: sun4i: Add clocksource and sched clock drivers Use the second timer found on the Allwinner SoCs as a clock source and sched clock, that were both not used yet on these platforms. Signed-off-by: Maxime Ripard Signed-off-by: Daniel Lezcano --- drivers/clocksource/sun4i_timer.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/clocksource/sun4i_timer.c b/drivers/clocksource/sun4i_timer.c index f5e227b..b581c93 100644 --- a/drivers/clocksource/sun4i_timer.c +++ b/drivers/clocksource/sun4i_timer.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -96,6 +97,11 @@ static struct irqaction sun4i_timer_irq = { .dev_id = &sun4i_clockevent, }; +static u32 sun4i_timer_sched_read(void) +{ + return ~readl(timer_base + TIMER_CNTVAL_REG(1)); +} + static void __init sun4i_timer_init(struct device_node *node) { unsigned long rate = 0; @@ -117,6 +123,15 @@ static void __init sun4i_timer_init(struct device_node *node) rate = clk_get_rate(clk); + writel(~0, timer_base + TIMER_INTVAL_REG(1)); + writel(TIMER_CTL_ENABLE | TIMER_CTL_RELOAD | + TIMER_CTL_CLK_SRC(TIMER_CTL_CLK_SRC_OSC24M), + timer_base + TIMER_CTL_REG(1)); + + setup_sched_clock(sun4i_timer_sched_read, 32, rate); + clocksource_mmio_init(timer_base + TIMER_CNTVAL_REG(1), node->name, + rate, 300, 32, clocksource_mmio_readl_down); + writel(rate / (TIMER_SCAL * HZ), timer_base + TIMER_INTVAL_REG(0)); -- 2.7.4