From 130e77e4311c74b9ddb7931e1adc89a5d1132c7a Mon Sep 17 00:00:00 2001
From: Juergen Ributzka <juergen@apple.com>
Date: Thu, 31 Jul 2014 06:25:33 +0000
Subject: [PATCH] [FastISel][AArch64] Add sqrt intrinsic support.

Fixes <rdar://problem/17867067>.

llvm-svn: 214388
---
 llvm/lib/Target/AArch64/AArch64FastISel.cpp | 19 +++++++++++++++++++
 llvm/test/CodeGen/AArch64/fast-isel-sqrt.ll | 20 ++++++++++++++++++++
 2 files changed, 39 insertions(+)
 create mode 100644 llvm/test/CodeGen/AArch64/fast-isel-sqrt.ll

diff --git a/llvm/lib/Target/AArch64/AArch64FastISel.cpp b/llvm/lib/Target/AArch64/AArch64FastISel.cpp
index 3d5fb66..647bb57 100644
--- a/llvm/lib/Target/AArch64/AArch64FastISel.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FastISel.cpp
@@ -1708,6 +1708,25 @@ bool AArch64FastISel::FastLowerIntrinsicCall(const IntrinsicInst *II) {
         .addImm(1);
     return true;
   }
+  case Intrinsic::sqrt: {
+    Type *RetTy = II->getCalledFunction()->getReturnType();
+
+    MVT VT;
+    if (!isTypeLegal(RetTy, VT))
+      return false;
+
+    unsigned Op0Reg = getRegForValue(II->getOperand(0));
+    if (!Op0Reg)
+      return false;
+    bool Op0IsKill = hasTrivialKill(II->getOperand(0));
+
+    unsigned ResultReg = FastEmit_r(VT, VT, ISD::FSQRT, Op0Reg, Op0IsKill);
+    if (!ResultReg)
+      return false;
+
+    UpdateValueMap(II, ResultReg);
+    return true;
+  }
   case Intrinsic::sadd_with_overflow:
   case Intrinsic::uadd_with_overflow:
   case Intrinsic::ssub_with_overflow:
diff --git a/llvm/test/CodeGen/AArch64/fast-isel-sqrt.ll b/llvm/test/CodeGen/AArch64/fast-isel-sqrt.ll
new file mode 100644
index 0000000..44ad8ea
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/fast-isel-sqrt.ll
@@ -0,0 +1,20 @@
+; RUN: llc -mtriple=arm64-apple-darwin                             < %s | FileCheck %s
+; RUN: llc -mtriple=arm64-apple-darwin -fast-isel -fast-isel-abort < %s | FileCheck %s
+
+define float @test_sqrt_f32(float %a) {
+; CHECK-LABEL: test_sqrt_f32
+; CHECK:       fsqrt s0, s0
+  %res = call float @llvm.sqrt.f32(float %a)
+  ret float %res
+}
+declare float @llvm.sqrt.f32(float) nounwind readnone
+
+define double @test_sqrt_f64(double %a) {
+; CHECK-LABEL: test_sqrt_f64
+; CHECK:       fsqrt d0, d0
+  %res = call double @llvm.sqrt.f64(double %a)
+  ret double %res
+}
+declare double @llvm.sqrt.f64(double) nounwind readnone
+
+
-- 
2.7.4