From 130432076f3b44dab19a5872b59fcfbb50a4ed2d Mon Sep 17 00:00:00 2001 From: Jianmin Lv Date: Thu, 15 Jul 2021 14:16:37 +0800 Subject: [PATCH] serial: 8250_pnp: Support configurable clock frequency ACPI-based Loongson boards need configurable rather than fixed clock frequency for serial ports. Signed-off-by: Jianmin Lv Signed-off-by: Huacai Chen Link: https://lore.kernel.org/r/20210715061637.134436-1-chenhuacai@loongson.cn Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/8250/8250_pnp.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/tty/serial/8250/8250_pnp.c b/drivers/tty/serial/8250/8250_pnp.c index de90d68..98e5ee4 100644 --- a/drivers/tty/serial/8250/8250_pnp.c +++ b/drivers/tty/serial/8250/8250_pnp.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include @@ -475,6 +476,7 @@ serial_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *dev_id) if (pnp_irq_flags(dev, 0) & IORESOURCE_IRQ_SHAREABLE) uart.port.flags |= UPF_SHARE_IRQ; uart.port.uartclk = 1843200; + device_property_read_u32(&dev->dev, "clock-frequency", &uart.port.uartclk); uart.port.dev = &dev->dev; line = serial8250_register_8250_port(&uart); -- 2.7.4